1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/dma-mapping.h> 34 #include <linux/pagemap.h> 35 #include <linux/pci.h> 36 #include <linux/seq_file.h> 37 #include <linux/slab.h> 38 #include <linux/swap.h> 39 #include <linux/swiotlb.h> 40 41 #include <drm/drm_agpsupport.h> 42 #include <drm/drm_debugfs.h> 43 #include <drm/drm_device.h> 44 #include <drm/drm_file.h> 45 #include <drm/drm_prime.h> 46 #include <drm/radeon_drm.h> 47 #include <drm/ttm/ttm_bo_api.h> 48 #include <drm/ttm/ttm_bo_driver.h> 49 #include <drm/ttm/ttm_placement.h> 50 51 #include "radeon_reg.h" 52 #include "radeon.h" 53 #include "radeon_ttm.h" 54 55 static int radeon_ttm_debugfs_init(struct radeon_device *rdev); 56 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev); 57 58 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm, 59 struct ttm_resource *bo_mem); 60 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm); 61 62 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) 63 { 64 struct radeon_mman *mman; 65 struct radeon_device *rdev; 66 67 mman = container_of(bdev, struct radeon_mman, bdev); 68 rdev = container_of(mman, struct radeon_device, mman); 69 return rdev; 70 } 71 72 static int radeon_ttm_init_vram(struct radeon_device *rdev) 73 { 74 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 75 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 76 } 77 78 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 79 { 80 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 81 true, rdev->mc.gtt_size >> PAGE_SHIFT); 82 } 83 84 static void radeon_evict_flags(struct ttm_buffer_object *bo, 85 struct ttm_placement *placement) 86 { 87 static const struct ttm_place placements = { 88 .fpfn = 0, 89 .lpfn = 0, 90 .mem_type = TTM_PL_SYSTEM, 91 .flags = 0 92 }; 93 94 struct radeon_bo *rbo; 95 96 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 97 placement->placement = &placements; 98 placement->busy_placement = &placements; 99 placement->num_placement = 1; 100 placement->num_busy_placement = 1; 101 return; 102 } 103 rbo = container_of(bo, struct radeon_bo, tbo); 104 switch (bo->mem.mem_type) { 105 case TTM_PL_VRAM: 106 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 107 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 108 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 109 bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 110 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 111 int i; 112 113 /* Try evicting to the CPU inaccessible part of VRAM 114 * first, but only set GTT as busy placement, so this 115 * BO will be evicted to GTT rather than causing other 116 * BOs to be evicted from VRAM 117 */ 118 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 119 RADEON_GEM_DOMAIN_GTT); 120 rbo->placement.num_busy_placement = 0; 121 for (i = 0; i < rbo->placement.num_placement; i++) { 122 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 123 if (rbo->placements[i].fpfn < fpfn) 124 rbo->placements[i].fpfn = fpfn; 125 } else { 126 rbo->placement.busy_placement = 127 &rbo->placements[i]; 128 rbo->placement.num_busy_placement = 1; 129 } 130 } 131 } else 132 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 133 break; 134 case TTM_PL_TT: 135 default: 136 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 137 } 138 *placement = rbo->placement; 139 } 140 141 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp) 142 { 143 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); 144 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 145 146 if (radeon_ttm_tt_has_userptr(rdev, bo->ttm)) 147 return -EPERM; 148 return drm_vma_node_verify_access(&rbo->tbo.base.vma_node, 149 filp->private_data); 150 } 151 152 static int radeon_move_blit(struct ttm_buffer_object *bo, 153 bool evict, 154 struct ttm_resource *new_mem, 155 struct ttm_resource *old_mem) 156 { 157 struct radeon_device *rdev; 158 uint64_t old_start, new_start; 159 struct radeon_fence *fence; 160 unsigned num_pages; 161 int r, ridx; 162 163 rdev = radeon_get_rdev(bo->bdev); 164 ridx = radeon_copy_ring_index(rdev); 165 old_start = (u64)old_mem->start << PAGE_SHIFT; 166 new_start = (u64)new_mem->start << PAGE_SHIFT; 167 168 switch (old_mem->mem_type) { 169 case TTM_PL_VRAM: 170 old_start += rdev->mc.vram_start; 171 break; 172 case TTM_PL_TT: 173 old_start += rdev->mc.gtt_start; 174 break; 175 default: 176 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 177 return -EINVAL; 178 } 179 switch (new_mem->mem_type) { 180 case TTM_PL_VRAM: 181 new_start += rdev->mc.vram_start; 182 break; 183 case TTM_PL_TT: 184 new_start += rdev->mc.gtt_start; 185 break; 186 default: 187 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 188 return -EINVAL; 189 } 190 if (!rdev->ring[ridx].ready) { 191 DRM_ERROR("Trying to move memory with ring turned off.\n"); 192 return -EINVAL; 193 } 194 195 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 196 197 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 198 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 199 if (IS_ERR(fence)) 200 return PTR_ERR(fence); 201 202 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 203 radeon_fence_unref(&fence); 204 return r; 205 } 206 207 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 208 struct ttm_operation_ctx *ctx, 209 struct ttm_resource *new_mem, 210 struct ttm_place *hop) 211 { 212 struct radeon_device *rdev; 213 struct radeon_bo *rbo; 214 struct ttm_resource *old_mem = &bo->mem; 215 int r; 216 217 if (new_mem->mem_type == TTM_PL_TT) { 218 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); 219 if (r) 220 return r; 221 } 222 223 r = ttm_bo_wait_ctx(bo, ctx); 224 if (r) 225 return r; 226 227 /* Can't move a pinned BO */ 228 rbo = container_of(bo, struct radeon_bo, tbo); 229 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) 230 return -EINVAL; 231 232 rdev = radeon_get_rdev(bo->bdev); 233 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { 234 ttm_bo_move_null(bo, new_mem); 235 goto out; 236 } 237 if (old_mem->mem_type == TTM_PL_SYSTEM && 238 new_mem->mem_type == TTM_PL_TT) { 239 ttm_bo_move_null(bo, new_mem); 240 goto out; 241 } 242 243 if (old_mem->mem_type == TTM_PL_TT && 244 new_mem->mem_type == TTM_PL_SYSTEM) { 245 radeon_ttm_tt_unbind(bo->bdev, bo->ttm); 246 ttm_resource_free(bo, &bo->mem); 247 ttm_bo_assign_mem(bo, new_mem); 248 goto out; 249 } 250 if (rdev->ring[radeon_copy_ring_index(rdev)].ready && 251 rdev->asic->copy.copy != NULL) { 252 if ((old_mem->mem_type == TTM_PL_SYSTEM && 253 new_mem->mem_type == TTM_PL_VRAM) || 254 (old_mem->mem_type == TTM_PL_VRAM && 255 new_mem->mem_type == TTM_PL_SYSTEM)) { 256 hop->fpfn = 0; 257 hop->lpfn = 0; 258 hop->mem_type = TTM_PL_TT; 259 hop->flags = 0; 260 return -EMULTIHOP; 261 } 262 263 r = radeon_move_blit(bo, evict, new_mem, old_mem); 264 } else { 265 r = -ENODEV; 266 } 267 268 if (r) { 269 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 270 if (r) 271 return r; 272 } 273 274 out: 275 /* update statistics */ 276 atomic64_add(bo->base.size, &rdev->num_bytes_moved); 277 radeon_bo_move_notify(bo, evict, new_mem); 278 return 0; 279 } 280 281 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) 282 { 283 struct radeon_device *rdev = radeon_get_rdev(bdev); 284 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; 285 286 switch (mem->mem_type) { 287 case TTM_PL_SYSTEM: 288 /* system memory */ 289 return 0; 290 case TTM_PL_TT: 291 #if IS_ENABLED(CONFIG_AGP) 292 if (rdev->flags & RADEON_IS_AGP) { 293 /* RADEON_IS_AGP is set only if AGP is active */ 294 mem->bus.offset = (mem->start << PAGE_SHIFT) + 295 rdev->mc.agp_base; 296 mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture; 297 mem->bus.caching = ttm_write_combined; 298 } 299 #endif 300 break; 301 case TTM_PL_VRAM: 302 mem->bus.offset = mem->start << PAGE_SHIFT; 303 /* check if it's visible */ 304 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 305 return -EINVAL; 306 mem->bus.offset += rdev->mc.aper_base; 307 mem->bus.is_iomem = true; 308 mem->bus.caching = ttm_write_combined; 309 #ifdef __alpha__ 310 /* 311 * Alpha: use bus.addr to hold the ioremap() return, 312 * so we can modify bus.base below. 313 */ 314 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 315 if (!mem->bus.addr) 316 return -ENOMEM; 317 318 /* 319 * Alpha: Use just the bus offset plus 320 * the hose/domain memory base for bus.base. 321 * It then can be used to build PTEs for VRAM 322 * access, as done in ttm_bo_vm_fault(). 323 */ 324 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 325 rdev->hose->dense_mem_base; 326 #endif 327 break; 328 default: 329 return -EINVAL; 330 } 331 return 0; 332 } 333 334 /* 335 * TTM backend functions. 336 */ 337 struct radeon_ttm_tt { 338 struct ttm_tt ttm; 339 u64 offset; 340 341 uint64_t userptr; 342 struct mm_struct *usermm; 343 uint32_t userflags; 344 bool bound; 345 }; 346 347 /* prepare the sg table with the user pages */ 348 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 349 { 350 struct radeon_device *rdev = radeon_get_rdev(bdev); 351 struct radeon_ttm_tt *gtt = (void *)ttm; 352 unsigned pinned = 0; 353 int r; 354 355 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 356 enum dma_data_direction direction = write ? 357 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 358 359 if (current->mm != gtt->usermm) 360 return -EPERM; 361 362 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 363 /* check that we only pin down anonymous memory 364 to prevent problems with writeback */ 365 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE; 366 struct vm_area_struct *vma; 367 vma = find_vma(gtt->usermm, gtt->userptr); 368 if (!vma || vma->vm_file || vma->vm_end < end) 369 return -EPERM; 370 } 371 372 do { 373 unsigned num_pages = ttm->num_pages - pinned; 374 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 375 struct page **pages = ttm->pages + pinned; 376 377 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 378 pages, NULL); 379 if (r < 0) 380 goto release_pages; 381 382 pinned += r; 383 384 } while (pinned < ttm->num_pages); 385 386 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 387 ttm->num_pages << PAGE_SHIFT, 388 GFP_KERNEL); 389 if (r) 390 goto release_sg; 391 392 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 393 if (r) 394 goto release_sg; 395 396 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 397 ttm->num_pages); 398 399 return 0; 400 401 release_sg: 402 kfree(ttm->sg); 403 404 release_pages: 405 release_pages(ttm->pages, pinned); 406 return r; 407 } 408 409 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 410 { 411 struct radeon_device *rdev = radeon_get_rdev(bdev); 412 struct radeon_ttm_tt *gtt = (void *)ttm; 413 struct sg_page_iter sg_iter; 414 415 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 416 enum dma_data_direction direction = write ? 417 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 418 419 /* double check that we don't free the table twice */ 420 if (!ttm->sg->sgl) 421 return; 422 423 /* free the sg table and pages again */ 424 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 425 426 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 427 struct page *page = sg_page_iter_page(&sg_iter); 428 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 429 set_page_dirty(page); 430 431 mark_page_accessed(page); 432 put_page(page); 433 } 434 435 sg_free_table(ttm->sg); 436 } 437 438 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 439 { 440 struct radeon_ttm_tt *gtt = (void*)ttm; 441 442 return (gtt->bound); 443 } 444 445 static int radeon_ttm_backend_bind(struct ttm_device *bdev, 446 struct ttm_tt *ttm, 447 struct ttm_resource *bo_mem) 448 { 449 struct radeon_ttm_tt *gtt = (void*)ttm; 450 struct radeon_device *rdev = radeon_get_rdev(bdev); 451 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 452 RADEON_GART_PAGE_WRITE; 453 int r; 454 455 if (gtt->bound) 456 return 0; 457 458 if (gtt->userptr) { 459 radeon_ttm_tt_pin_userptr(bdev, ttm); 460 flags &= ~RADEON_GART_PAGE_WRITE; 461 } 462 463 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 464 if (!ttm->num_pages) { 465 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", 466 ttm->num_pages, bo_mem, ttm); 467 } 468 if (ttm->caching == ttm_cached) 469 flags |= RADEON_GART_PAGE_SNOOP; 470 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 471 ttm->pages, gtt->ttm.dma_address, flags); 472 if (r) { 473 DRM_ERROR("failed to bind %u pages at 0x%08X\n", 474 ttm->num_pages, (unsigned)gtt->offset); 475 return r; 476 } 477 gtt->bound = true; 478 return 0; 479 } 480 481 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm) 482 { 483 struct radeon_ttm_tt *gtt = (void *)ttm; 484 struct radeon_device *rdev = radeon_get_rdev(bdev); 485 486 if (!gtt->bound) 487 return; 488 489 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 490 491 if (gtt->userptr) 492 radeon_ttm_tt_unpin_userptr(bdev, ttm); 493 gtt->bound = false; 494 } 495 496 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm) 497 { 498 struct radeon_ttm_tt *gtt = (void *)ttm; 499 500 radeon_ttm_backend_unbind(bdev, ttm); 501 ttm_tt_destroy_common(bdev, ttm); 502 503 ttm_tt_fini(>t->ttm); 504 kfree(gtt); 505 } 506 507 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 508 uint32_t page_flags) 509 { 510 struct radeon_ttm_tt *gtt; 511 enum ttm_caching caching; 512 struct radeon_bo *rbo; 513 #if IS_ENABLED(CONFIG_AGP) 514 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 515 516 if (rdev->flags & RADEON_IS_AGP) { 517 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge, 518 page_flags); 519 } 520 #endif 521 rbo = container_of(bo, struct radeon_bo, tbo); 522 523 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 524 if (gtt == NULL) { 525 return NULL; 526 } 527 528 if (rbo->flags & RADEON_GEM_GTT_UC) 529 caching = ttm_uncached; 530 else if (rbo->flags & RADEON_GEM_GTT_WC) 531 caching = ttm_write_combined; 532 else 533 caching = ttm_cached; 534 535 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { 536 kfree(gtt); 537 return NULL; 538 } 539 return >t->ttm; 540 } 541 542 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 543 struct ttm_tt *ttm) 544 { 545 #if IS_ENABLED(CONFIG_AGP) 546 if (rdev->flags & RADEON_IS_AGP) 547 return NULL; 548 #endif 549 550 if (!ttm) 551 return NULL; 552 return container_of(ttm, struct radeon_ttm_tt, ttm); 553 } 554 555 static int radeon_ttm_tt_populate(struct ttm_device *bdev, 556 struct ttm_tt *ttm, 557 struct ttm_operation_ctx *ctx) 558 { 559 struct radeon_device *rdev = radeon_get_rdev(bdev); 560 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 561 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 562 563 if (gtt && gtt->userptr) { 564 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 565 if (!ttm->sg) 566 return -ENOMEM; 567 568 ttm->page_flags |= TTM_PAGE_FLAG_SG; 569 return 0; 570 } 571 572 if (slave && ttm->sg) { 573 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 574 ttm->num_pages); 575 return 0; 576 } 577 578 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); 579 } 580 581 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm) 582 { 583 struct radeon_device *rdev = radeon_get_rdev(bdev); 584 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 585 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 586 587 if (gtt && gtt->userptr) { 588 kfree(ttm->sg); 589 ttm->page_flags &= ~TTM_PAGE_FLAG_SG; 590 return; 591 } 592 593 if (slave) 594 return; 595 596 return ttm_pool_free(&rdev->mman.bdev.pool, ttm); 597 } 598 599 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 600 struct ttm_tt *ttm, uint64_t addr, 601 uint32_t flags) 602 { 603 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 604 605 if (gtt == NULL) 606 return -EINVAL; 607 608 gtt->userptr = addr; 609 gtt->usermm = current->mm; 610 gtt->userflags = flags; 611 return 0; 612 } 613 614 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev, 615 struct ttm_tt *ttm) 616 { 617 #if IS_ENABLED(CONFIG_AGP) 618 struct radeon_device *rdev = radeon_get_rdev(bdev); 619 if (rdev->flags & RADEON_IS_AGP) 620 return ttm_agp_is_bound(ttm); 621 #endif 622 return radeon_ttm_backend_is_bound(ttm); 623 } 624 625 static int radeon_ttm_tt_bind(struct ttm_device *bdev, 626 struct ttm_tt *ttm, 627 struct ttm_resource *bo_mem) 628 { 629 #if IS_ENABLED(CONFIG_AGP) 630 struct radeon_device *rdev = radeon_get_rdev(bdev); 631 #endif 632 633 if (!bo_mem) 634 return -EINVAL; 635 #if IS_ENABLED(CONFIG_AGP) 636 if (rdev->flags & RADEON_IS_AGP) 637 return ttm_agp_bind(ttm, bo_mem); 638 #endif 639 640 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 641 } 642 643 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, 644 struct ttm_tt *ttm) 645 { 646 #if IS_ENABLED(CONFIG_AGP) 647 struct radeon_device *rdev = radeon_get_rdev(bdev); 648 649 if (rdev->flags & RADEON_IS_AGP) { 650 ttm_agp_unbind(ttm); 651 return; 652 } 653 #endif 654 radeon_ttm_backend_unbind(bdev, ttm); 655 } 656 657 static void radeon_ttm_tt_destroy(struct ttm_device *bdev, 658 struct ttm_tt *ttm) 659 { 660 #if IS_ENABLED(CONFIG_AGP) 661 struct radeon_device *rdev = radeon_get_rdev(bdev); 662 663 if (rdev->flags & RADEON_IS_AGP) { 664 ttm_agp_unbind(ttm); 665 ttm_tt_destroy_common(bdev, ttm); 666 ttm_agp_destroy(ttm); 667 return; 668 } 669 #endif 670 radeon_ttm_backend_destroy(bdev, ttm); 671 } 672 673 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 674 struct ttm_tt *ttm) 675 { 676 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 677 678 if (gtt == NULL) 679 return false; 680 681 return !!gtt->userptr; 682 } 683 684 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 685 struct ttm_tt *ttm) 686 { 687 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 688 689 if (gtt == NULL) 690 return false; 691 692 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 693 } 694 695 static void 696 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo) 697 { 698 radeon_bo_move_notify(bo, false, NULL); 699 } 700 701 static struct ttm_device_funcs radeon_bo_driver = { 702 .ttm_tt_create = &radeon_ttm_tt_create, 703 .ttm_tt_populate = &radeon_ttm_tt_populate, 704 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 705 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 706 .eviction_valuable = ttm_bo_eviction_valuable, 707 .evict_flags = &radeon_evict_flags, 708 .move = &radeon_bo_move, 709 .verify_access = &radeon_verify_access, 710 .delete_mem_notify = &radeon_bo_delete_mem_notify, 711 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 712 }; 713 714 int radeon_ttm_init(struct radeon_device *rdev) 715 { 716 int r; 717 718 /* No others user of address space so set it to 0 */ 719 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, 720 rdev->ddev->anon_inode->i_mapping, 721 rdev->ddev->vma_offset_manager, 722 rdev->need_swiotlb, 723 dma_addressing_limited(&rdev->pdev->dev)); 724 if (r) { 725 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 726 return r; 727 } 728 rdev->mman.initialized = true; 729 730 r = radeon_ttm_init_vram(rdev); 731 if (r) { 732 DRM_ERROR("Failed initializing VRAM heap.\n"); 733 return r; 734 } 735 /* Change the size here instead of the init above so only lpfn is affected */ 736 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 737 738 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 739 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 740 NULL, &rdev->stolen_vga_memory); 741 if (r) { 742 return r; 743 } 744 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 745 if (r) 746 return r; 747 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 748 radeon_bo_unreserve(rdev->stolen_vga_memory); 749 if (r) { 750 radeon_bo_unref(&rdev->stolen_vga_memory); 751 return r; 752 } 753 DRM_INFO("radeon: %uM of VRAM memory ready\n", 754 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 755 756 r = radeon_ttm_init_gtt(rdev); 757 if (r) { 758 DRM_ERROR("Failed initializing GTT heap.\n"); 759 return r; 760 } 761 DRM_INFO("radeon: %uM of GTT memory ready.\n", 762 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 763 764 r = radeon_ttm_debugfs_init(rdev); 765 if (r) { 766 DRM_ERROR("Failed to init debugfs\n"); 767 return r; 768 } 769 return 0; 770 } 771 772 void radeon_ttm_fini(struct radeon_device *rdev) 773 { 774 int r; 775 776 if (!rdev->mman.initialized) 777 return; 778 radeon_ttm_debugfs_fini(rdev); 779 if (rdev->stolen_vga_memory) { 780 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 781 if (r == 0) { 782 radeon_bo_unpin(rdev->stolen_vga_memory); 783 radeon_bo_unreserve(rdev->stolen_vga_memory); 784 } 785 radeon_bo_unref(&rdev->stolen_vga_memory); 786 } 787 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 788 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 789 ttm_device_fini(&rdev->mman.bdev); 790 radeon_gart_fini(rdev); 791 rdev->mman.initialized = false; 792 DRM_INFO("radeon: ttm finalized\n"); 793 } 794 795 /* this should only be called at bootup or when userspace 796 * isn't running */ 797 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 798 { 799 struct ttm_resource_manager *man; 800 801 if (!rdev->mman.initialized) 802 return; 803 804 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 805 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 806 man->size = size >> PAGE_SHIFT; 807 } 808 809 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf) 810 { 811 struct ttm_buffer_object *bo = vmf->vma->vm_private_data; 812 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 813 vm_fault_t ret; 814 815 down_read(&rdev->pm.mclk_lock); 816 817 ret = ttm_bo_vm_reserve(bo, vmf); 818 if (ret) 819 goto unlock_mclk; 820 821 ret = radeon_bo_fault_reserve_notify(bo); 822 if (ret) 823 goto unlock_resv; 824 825 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot, 826 TTM_BO_VM_NUM_PREFAULT, 1); 827 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT)) 828 goto unlock_mclk; 829 830 unlock_resv: 831 dma_resv_unlock(bo->base.resv); 832 833 unlock_mclk: 834 up_read(&rdev->pm.mclk_lock); 835 return ret; 836 } 837 838 static const struct vm_operations_struct radeon_ttm_vm_ops = { 839 .fault = radeon_ttm_fault, 840 .open = ttm_bo_vm_open, 841 .close = ttm_bo_vm_close, 842 .access = ttm_bo_vm_access 843 }; 844 845 int radeon_mmap(struct file *filp, struct vm_area_struct *vma) 846 { 847 int r; 848 struct drm_file *file_priv = filp->private_data; 849 struct radeon_device *rdev = file_priv->minor->dev->dev_private; 850 851 if (rdev == NULL) 852 return -EINVAL; 853 854 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev); 855 if (unlikely(r != 0)) 856 return r; 857 858 vma->vm_ops = &radeon_ttm_vm_ops; 859 return 0; 860 } 861 862 #if defined(CONFIG_DEBUG_FS) 863 864 static int radeon_mm_dump_table(struct seq_file *m, void *data) 865 { 866 struct drm_info_node *node = (struct drm_info_node *)m->private; 867 unsigned ttm_pl = *(int*)node->info_ent->data; 868 struct drm_device *dev = node->minor->dev; 869 struct radeon_device *rdev = dev->dev_private; 870 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl); 871 struct drm_printer p = drm_seq_file_printer(m); 872 873 man->func->debug(man, &p); 874 return 0; 875 } 876 877 static int radeon_ttm_pool_debugfs(struct seq_file *m, void *data) 878 { 879 struct drm_info_node *node = (struct drm_info_node *)m->private; 880 struct drm_device *dev = node->minor->dev; 881 struct radeon_device *rdev = dev->dev_private; 882 883 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); 884 } 885 886 static int ttm_pl_vram = TTM_PL_VRAM; 887 static int ttm_pl_tt = TTM_PL_TT; 888 889 static struct drm_info_list radeon_ttm_debugfs_list[] = { 890 {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram}, 891 {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt}, 892 {"ttm_page_pool", radeon_ttm_pool_debugfs, 0, NULL} 893 }; 894 895 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 896 { 897 struct radeon_device *rdev = inode->i_private; 898 i_size_write(inode, rdev->mc.mc_vram_size); 899 filep->private_data = inode->i_private; 900 return 0; 901 } 902 903 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 904 size_t size, loff_t *pos) 905 { 906 struct radeon_device *rdev = f->private_data; 907 ssize_t result = 0; 908 int r; 909 910 if (size & 0x3 || *pos & 0x3) 911 return -EINVAL; 912 913 while (size) { 914 unsigned long flags; 915 uint32_t value; 916 917 if (*pos >= rdev->mc.mc_vram_size) 918 return result; 919 920 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 921 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 922 if (rdev->family >= CHIP_CEDAR) 923 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 924 value = RREG32(RADEON_MM_DATA); 925 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 926 927 r = put_user(value, (uint32_t *)buf); 928 if (r) 929 return r; 930 931 result += 4; 932 buf += 4; 933 *pos += 4; 934 size -= 4; 935 } 936 937 return result; 938 } 939 940 static const struct file_operations radeon_ttm_vram_fops = { 941 .owner = THIS_MODULE, 942 .open = radeon_ttm_vram_open, 943 .read = radeon_ttm_vram_read, 944 .llseek = default_llseek 945 }; 946 947 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 948 { 949 struct radeon_device *rdev = inode->i_private; 950 i_size_write(inode, rdev->mc.gtt_size); 951 filep->private_data = inode->i_private; 952 return 0; 953 } 954 955 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 956 size_t size, loff_t *pos) 957 { 958 struct radeon_device *rdev = f->private_data; 959 ssize_t result = 0; 960 int r; 961 962 while (size) { 963 loff_t p = *pos / PAGE_SIZE; 964 unsigned off = *pos & ~PAGE_MASK; 965 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 966 struct page *page; 967 void *ptr; 968 969 if (p >= rdev->gart.num_cpu_pages) 970 return result; 971 972 page = rdev->gart.pages[p]; 973 if (page) { 974 ptr = kmap(page); 975 ptr += off; 976 977 r = copy_to_user(buf, ptr, cur_size); 978 kunmap(rdev->gart.pages[p]); 979 } else 980 r = clear_user(buf, cur_size); 981 982 if (r) 983 return -EFAULT; 984 985 result += cur_size; 986 buf += cur_size; 987 *pos += cur_size; 988 size -= cur_size; 989 } 990 991 return result; 992 } 993 994 static const struct file_operations radeon_ttm_gtt_fops = { 995 .owner = THIS_MODULE, 996 .open = radeon_ttm_gtt_open, 997 .read = radeon_ttm_gtt_read, 998 .llseek = default_llseek 999 }; 1000 1001 #endif 1002 1003 static int radeon_ttm_debugfs_init(struct radeon_device *rdev) 1004 { 1005 #if defined(CONFIG_DEBUG_FS) 1006 unsigned count; 1007 1008 struct drm_minor *minor = rdev->ddev->primary; 1009 struct dentry *root = minor->debugfs_root; 1010 1011 rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO, 1012 root, rdev, 1013 &radeon_ttm_vram_fops); 1014 1015 rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO, 1016 root, rdev, &radeon_ttm_gtt_fops); 1017 1018 count = ARRAY_SIZE(radeon_ttm_debugfs_list); 1019 1020 return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count); 1021 #else 1022 1023 return 0; 1024 #endif 1025 } 1026 1027 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev) 1028 { 1029 #if defined(CONFIG_DEBUG_FS) 1030 1031 debugfs_remove(rdev->mman.vram); 1032 rdev->mman.vram = NULL; 1033 1034 debugfs_remove(rdev->mman.gtt); 1035 rdev->mman.gtt = NULL; 1036 #endif 1037 } 1038