1 /* 2 * Copyright 2009 Jerome Glisse. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 19 * USE OR OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * The above copyright notice and this permission notice (including the 22 * next paragraph) shall be included in all copies or substantial portions 23 * of the Software. 24 * 25 */ 26 /* 27 * Authors: 28 * Jerome Glisse <glisse@freedesktop.org> 29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> 30 * Dave Airlie 31 */ 32 33 #include <linux/dma-mapping.h> 34 #include <linux/pagemap.h> 35 #include <linux/pci.h> 36 #include <linux/seq_file.h> 37 #include <linux/slab.h> 38 #include <linux/swap.h> 39 #include <linux/swiotlb.h> 40 41 #include <drm/drm_device.h> 42 #include <drm/drm_file.h> 43 #include <drm/drm_prime.h> 44 #include <drm/radeon_drm.h> 45 #include <drm/ttm/ttm_bo_api.h> 46 #include <drm/ttm/ttm_bo_driver.h> 47 #include <drm/ttm/ttm_placement.h> 48 #include <drm/ttm/ttm_range_manager.h> 49 50 #include "radeon_reg.h" 51 #include "radeon.h" 52 #include "radeon_ttm.h" 53 54 static void radeon_ttm_debugfs_init(struct radeon_device *rdev); 55 56 static int radeon_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm, 57 struct ttm_resource *bo_mem); 58 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm); 59 60 struct radeon_device *radeon_get_rdev(struct ttm_device *bdev) 61 { 62 struct radeon_mman *mman; 63 struct radeon_device *rdev; 64 65 mman = container_of(bdev, struct radeon_mman, bdev); 66 rdev = container_of(mman, struct radeon_device, mman); 67 return rdev; 68 } 69 70 static int radeon_ttm_init_vram(struct radeon_device *rdev) 71 { 72 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM, 73 false, rdev->mc.real_vram_size >> PAGE_SHIFT); 74 } 75 76 static int radeon_ttm_init_gtt(struct radeon_device *rdev) 77 { 78 return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT, 79 true, rdev->mc.gtt_size >> PAGE_SHIFT); 80 } 81 82 static void radeon_evict_flags(struct ttm_buffer_object *bo, 83 struct ttm_placement *placement) 84 { 85 static const struct ttm_place placements = { 86 .fpfn = 0, 87 .lpfn = 0, 88 .mem_type = TTM_PL_SYSTEM, 89 .flags = 0 90 }; 91 92 struct radeon_bo *rbo; 93 94 if (!radeon_ttm_bo_is_radeon_bo(bo)) { 95 placement->placement = &placements; 96 placement->busy_placement = &placements; 97 placement->num_placement = 1; 98 placement->num_busy_placement = 1; 99 return; 100 } 101 rbo = container_of(bo, struct radeon_bo, tbo); 102 switch (bo->resource->mem_type) { 103 case TTM_PL_VRAM: 104 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false) 105 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 106 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size && 107 bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) { 108 unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT; 109 int i; 110 111 /* Try evicting to the CPU inaccessible part of VRAM 112 * first, but only set GTT as busy placement, so this 113 * BO will be evicted to GTT rather than causing other 114 * BOs to be evicted from VRAM 115 */ 116 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM | 117 RADEON_GEM_DOMAIN_GTT); 118 rbo->placement.num_busy_placement = 0; 119 for (i = 0; i < rbo->placement.num_placement; i++) { 120 if (rbo->placements[i].mem_type == TTM_PL_VRAM) { 121 if (rbo->placements[i].fpfn < fpfn) 122 rbo->placements[i].fpfn = fpfn; 123 } else { 124 rbo->placement.busy_placement = 125 &rbo->placements[i]; 126 rbo->placement.num_busy_placement = 1; 127 } 128 } 129 } else 130 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 131 break; 132 case TTM_PL_TT: 133 default: 134 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); 135 } 136 *placement = rbo->placement; 137 } 138 139 static int radeon_move_blit(struct ttm_buffer_object *bo, 140 bool evict, 141 struct ttm_resource *new_mem, 142 struct ttm_resource *old_mem) 143 { 144 struct radeon_device *rdev; 145 uint64_t old_start, new_start; 146 struct radeon_fence *fence; 147 unsigned num_pages; 148 int r, ridx; 149 150 rdev = radeon_get_rdev(bo->bdev); 151 ridx = radeon_copy_ring_index(rdev); 152 old_start = (u64)old_mem->start << PAGE_SHIFT; 153 new_start = (u64)new_mem->start << PAGE_SHIFT; 154 155 switch (old_mem->mem_type) { 156 case TTM_PL_VRAM: 157 old_start += rdev->mc.vram_start; 158 break; 159 case TTM_PL_TT: 160 old_start += rdev->mc.gtt_start; 161 break; 162 default: 163 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 164 return -EINVAL; 165 } 166 switch (new_mem->mem_type) { 167 case TTM_PL_VRAM: 168 new_start += rdev->mc.vram_start; 169 break; 170 case TTM_PL_TT: 171 new_start += rdev->mc.gtt_start; 172 break; 173 default: 174 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type); 175 return -EINVAL; 176 } 177 if (!rdev->ring[ridx].ready) { 178 DRM_ERROR("Trying to move memory with ring turned off.\n"); 179 return -EINVAL; 180 } 181 182 BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0); 183 184 num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 185 fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv); 186 if (IS_ERR(fence)) 187 return PTR_ERR(fence); 188 189 r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem); 190 radeon_fence_unref(&fence); 191 return r; 192 } 193 194 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, 195 struct ttm_operation_ctx *ctx, 196 struct ttm_resource *new_mem, 197 struct ttm_place *hop) 198 { 199 struct ttm_resource *old_mem = bo->resource; 200 struct radeon_device *rdev; 201 struct radeon_bo *rbo; 202 int r, old_type; 203 204 if (new_mem->mem_type == TTM_PL_TT) { 205 r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, new_mem); 206 if (r) 207 return r; 208 } 209 210 r = ttm_bo_wait_ctx(bo, ctx); 211 if (r) 212 return r; 213 214 /* Can't move a pinned BO */ 215 rbo = container_of(bo, struct radeon_bo, tbo); 216 if (WARN_ON_ONCE(rbo->tbo.pin_count > 0)) 217 return -EINVAL; 218 219 /* Save old type for statistics update */ 220 old_type = old_mem->mem_type; 221 222 rdev = radeon_get_rdev(bo->bdev); 223 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { 224 ttm_bo_move_null(bo, new_mem); 225 goto out; 226 } 227 if (old_mem->mem_type == TTM_PL_SYSTEM && 228 new_mem->mem_type == TTM_PL_TT) { 229 ttm_bo_move_null(bo, new_mem); 230 goto out; 231 } 232 233 if (old_mem->mem_type == TTM_PL_TT && 234 new_mem->mem_type == TTM_PL_SYSTEM) { 235 radeon_ttm_tt_unbind(bo->bdev, bo->ttm); 236 ttm_resource_free(bo, &bo->resource); 237 ttm_bo_assign_mem(bo, new_mem); 238 goto out; 239 } 240 if (rdev->ring[radeon_copy_ring_index(rdev)].ready && 241 rdev->asic->copy.copy != NULL) { 242 if ((old_mem->mem_type == TTM_PL_SYSTEM && 243 new_mem->mem_type == TTM_PL_VRAM) || 244 (old_mem->mem_type == TTM_PL_VRAM && 245 new_mem->mem_type == TTM_PL_SYSTEM)) { 246 hop->fpfn = 0; 247 hop->lpfn = 0; 248 hop->mem_type = TTM_PL_TT; 249 hop->flags = 0; 250 return -EMULTIHOP; 251 } 252 253 r = radeon_move_blit(bo, evict, new_mem, old_mem); 254 } else { 255 r = -ENODEV; 256 } 257 258 if (r) { 259 r = ttm_bo_move_memcpy(bo, ctx, new_mem); 260 if (r) 261 return r; 262 } 263 264 out: 265 /* update statistics */ 266 atomic64_add(bo->base.size, &rdev->num_bytes_moved); 267 radeon_bo_move_notify(bo, old_type, new_mem); 268 return 0; 269 } 270 271 static int radeon_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *mem) 272 { 273 struct radeon_device *rdev = radeon_get_rdev(bdev); 274 size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT; 275 276 switch (mem->mem_type) { 277 case TTM_PL_SYSTEM: 278 /* system memory */ 279 return 0; 280 case TTM_PL_TT: 281 #if IS_ENABLED(CONFIG_AGP) 282 if (rdev->flags & RADEON_IS_AGP) { 283 /* RADEON_IS_AGP is set only if AGP is active */ 284 mem->bus.offset = (mem->start << PAGE_SHIFT) + 285 rdev->mc.agp_base; 286 mem->bus.is_iomem = !rdev->agp->cant_use_aperture; 287 mem->bus.caching = ttm_write_combined; 288 } 289 #endif 290 break; 291 case TTM_PL_VRAM: 292 mem->bus.offset = mem->start << PAGE_SHIFT; 293 /* check if it's visible */ 294 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size) 295 return -EINVAL; 296 mem->bus.offset += rdev->mc.aper_base; 297 mem->bus.is_iomem = true; 298 mem->bus.caching = ttm_write_combined; 299 #ifdef __alpha__ 300 /* 301 * Alpha: use bus.addr to hold the ioremap() return, 302 * so we can modify bus.base below. 303 */ 304 mem->bus.addr = ioremap_wc(mem->bus.offset, bus_size); 305 if (!mem->bus.addr) 306 return -ENOMEM; 307 308 /* 309 * Alpha: Use just the bus offset plus 310 * the hose/domain memory base for bus.base. 311 * It then can be used to build PTEs for VRAM 312 * access, as done in ttm_bo_vm_fault(). 313 */ 314 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) + 315 rdev->hose->dense_mem_base; 316 #endif 317 break; 318 default: 319 return -EINVAL; 320 } 321 return 0; 322 } 323 324 /* 325 * TTM backend functions. 326 */ 327 struct radeon_ttm_tt { 328 struct ttm_tt ttm; 329 u64 offset; 330 331 uint64_t userptr; 332 struct mm_struct *usermm; 333 uint32_t userflags; 334 bool bound; 335 }; 336 337 /* prepare the sg table with the user pages */ 338 static int radeon_ttm_tt_pin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 339 { 340 struct radeon_device *rdev = radeon_get_rdev(bdev); 341 struct radeon_ttm_tt *gtt = (void *)ttm; 342 unsigned pinned = 0; 343 int r; 344 345 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 346 enum dma_data_direction direction = write ? 347 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 348 349 if (current->mm != gtt->usermm) 350 return -EPERM; 351 352 if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) { 353 /* check that we only pin down anonymous memory 354 to prevent problems with writeback */ 355 unsigned long end = gtt->userptr + (u64)ttm->num_pages * PAGE_SIZE; 356 struct vm_area_struct *vma; 357 vma = find_vma(gtt->usermm, gtt->userptr); 358 if (!vma || vma->vm_file || vma->vm_end < end) 359 return -EPERM; 360 } 361 362 do { 363 unsigned num_pages = ttm->num_pages - pinned; 364 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE; 365 struct page **pages = ttm->pages + pinned; 366 367 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0, 368 pages, NULL); 369 if (r < 0) 370 goto release_pages; 371 372 pinned += r; 373 374 } while (pinned < ttm->num_pages); 375 376 r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0, 377 (u64)ttm->num_pages << PAGE_SHIFT, 378 GFP_KERNEL); 379 if (r) 380 goto release_sg; 381 382 r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0); 383 if (r) 384 goto release_sg; 385 386 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 387 ttm->num_pages); 388 389 return 0; 390 391 release_sg: 392 kfree(ttm->sg); 393 394 release_pages: 395 release_pages(ttm->pages, pinned); 396 return r; 397 } 398 399 static void radeon_ttm_tt_unpin_userptr(struct ttm_device *bdev, struct ttm_tt *ttm) 400 { 401 struct radeon_device *rdev = radeon_get_rdev(bdev); 402 struct radeon_ttm_tt *gtt = (void *)ttm; 403 struct sg_page_iter sg_iter; 404 405 int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 406 enum dma_data_direction direction = write ? 407 DMA_BIDIRECTIONAL : DMA_TO_DEVICE; 408 409 /* double check that we don't free the table twice */ 410 if (!ttm->sg || !ttm->sg->sgl) 411 return; 412 413 /* free the sg table and pages again */ 414 dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0); 415 416 for_each_sgtable_page(ttm->sg, &sg_iter, 0) { 417 struct page *page = sg_page_iter_page(&sg_iter); 418 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY)) 419 set_page_dirty(page); 420 421 mark_page_accessed(page); 422 put_page(page); 423 } 424 425 sg_free_table(ttm->sg); 426 } 427 428 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm) 429 { 430 struct radeon_ttm_tt *gtt = (void*)ttm; 431 432 return (gtt->bound); 433 } 434 435 static int radeon_ttm_backend_bind(struct ttm_device *bdev, 436 struct ttm_tt *ttm, 437 struct ttm_resource *bo_mem) 438 { 439 struct radeon_ttm_tt *gtt = (void*)ttm; 440 struct radeon_device *rdev = radeon_get_rdev(bdev); 441 uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ | 442 RADEON_GART_PAGE_WRITE; 443 int r; 444 445 if (gtt->bound) 446 return 0; 447 448 if (gtt->userptr) { 449 radeon_ttm_tt_pin_userptr(bdev, ttm); 450 flags &= ~RADEON_GART_PAGE_WRITE; 451 } 452 453 gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT); 454 if (!ttm->num_pages) { 455 WARN(1, "nothing to bind %u pages for mreg %p back %p!\n", 456 ttm->num_pages, bo_mem, ttm); 457 } 458 if (ttm->caching == ttm_cached) 459 flags |= RADEON_GART_PAGE_SNOOP; 460 r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages, 461 ttm->pages, gtt->ttm.dma_address, flags); 462 if (r) { 463 DRM_ERROR("failed to bind %u pages at 0x%08X\n", 464 ttm->num_pages, (unsigned)gtt->offset); 465 return r; 466 } 467 gtt->bound = true; 468 return 0; 469 } 470 471 static void radeon_ttm_backend_unbind(struct ttm_device *bdev, struct ttm_tt *ttm) 472 { 473 struct radeon_ttm_tt *gtt = (void *)ttm; 474 struct radeon_device *rdev = radeon_get_rdev(bdev); 475 476 if (gtt->userptr) 477 radeon_ttm_tt_unpin_userptr(bdev, ttm); 478 479 if (!gtt->bound) 480 return; 481 482 radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages); 483 484 gtt->bound = false; 485 } 486 487 static void radeon_ttm_backend_destroy(struct ttm_device *bdev, struct ttm_tt *ttm) 488 { 489 struct radeon_ttm_tt *gtt = (void *)ttm; 490 491 ttm_tt_fini(>t->ttm); 492 kfree(gtt); 493 } 494 495 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo, 496 uint32_t page_flags) 497 { 498 struct radeon_ttm_tt *gtt; 499 enum ttm_caching caching; 500 struct radeon_bo *rbo; 501 #if IS_ENABLED(CONFIG_AGP) 502 struct radeon_device *rdev = radeon_get_rdev(bo->bdev); 503 504 if (rdev->flags & RADEON_IS_AGP) { 505 return ttm_agp_tt_create(bo, rdev->agp->bridge, page_flags); 506 } 507 #endif 508 rbo = container_of(bo, struct radeon_bo, tbo); 509 510 gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL); 511 if (gtt == NULL) { 512 return NULL; 513 } 514 515 if (rbo->flags & RADEON_GEM_GTT_UC) 516 caching = ttm_uncached; 517 else if (rbo->flags & RADEON_GEM_GTT_WC) 518 caching = ttm_write_combined; 519 else 520 caching = ttm_cached; 521 522 if (ttm_sg_tt_init(>t->ttm, bo, page_flags, caching)) { 523 kfree(gtt); 524 return NULL; 525 } 526 return >t->ttm; 527 } 528 529 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev, 530 struct ttm_tt *ttm) 531 { 532 #if IS_ENABLED(CONFIG_AGP) 533 if (rdev->flags & RADEON_IS_AGP) 534 return NULL; 535 #endif 536 537 if (!ttm) 538 return NULL; 539 return container_of(ttm, struct radeon_ttm_tt, ttm); 540 } 541 542 static int radeon_ttm_tt_populate(struct ttm_device *bdev, 543 struct ttm_tt *ttm, 544 struct ttm_operation_ctx *ctx) 545 { 546 struct radeon_device *rdev = radeon_get_rdev(bdev); 547 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 548 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 549 550 if (gtt && gtt->userptr) { 551 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL); 552 if (!ttm->sg) 553 return -ENOMEM; 554 555 ttm->page_flags |= TTM_PAGE_FLAG_SG; 556 return 0; 557 } 558 559 if (slave && ttm->sg) { 560 drm_prime_sg_to_dma_addr_array(ttm->sg, gtt->ttm.dma_address, 561 ttm->num_pages); 562 return 0; 563 } 564 565 return ttm_pool_alloc(&rdev->mman.bdev.pool, ttm, ctx); 566 } 567 568 static void radeon_ttm_tt_unpopulate(struct ttm_device *bdev, struct ttm_tt *ttm) 569 { 570 struct radeon_device *rdev = radeon_get_rdev(bdev); 571 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 572 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); 573 574 radeon_ttm_tt_unbind(bdev, ttm); 575 576 if (gtt && gtt->userptr) { 577 kfree(ttm->sg); 578 ttm->page_flags &= ~TTM_PAGE_FLAG_SG; 579 return; 580 } 581 582 if (slave) 583 return; 584 585 return ttm_pool_free(&rdev->mman.bdev.pool, ttm); 586 } 587 588 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev, 589 struct ttm_tt *ttm, uint64_t addr, 590 uint32_t flags) 591 { 592 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 593 594 if (gtt == NULL) 595 return -EINVAL; 596 597 gtt->userptr = addr; 598 gtt->usermm = current->mm; 599 gtt->userflags = flags; 600 return 0; 601 } 602 603 bool radeon_ttm_tt_is_bound(struct ttm_device *bdev, 604 struct ttm_tt *ttm) 605 { 606 #if IS_ENABLED(CONFIG_AGP) 607 struct radeon_device *rdev = radeon_get_rdev(bdev); 608 if (rdev->flags & RADEON_IS_AGP) 609 return ttm_agp_is_bound(ttm); 610 #endif 611 return radeon_ttm_backend_is_bound(ttm); 612 } 613 614 static int radeon_ttm_tt_bind(struct ttm_device *bdev, 615 struct ttm_tt *ttm, 616 struct ttm_resource *bo_mem) 617 { 618 #if IS_ENABLED(CONFIG_AGP) 619 struct radeon_device *rdev = radeon_get_rdev(bdev); 620 #endif 621 622 if (!bo_mem) 623 return -EINVAL; 624 #if IS_ENABLED(CONFIG_AGP) 625 if (rdev->flags & RADEON_IS_AGP) 626 return ttm_agp_bind(ttm, bo_mem); 627 #endif 628 629 return radeon_ttm_backend_bind(bdev, ttm, bo_mem); 630 } 631 632 static void radeon_ttm_tt_unbind(struct ttm_device *bdev, 633 struct ttm_tt *ttm) 634 { 635 #if IS_ENABLED(CONFIG_AGP) 636 struct radeon_device *rdev = radeon_get_rdev(bdev); 637 638 if (rdev->flags & RADEON_IS_AGP) { 639 ttm_agp_unbind(ttm); 640 return; 641 } 642 #endif 643 radeon_ttm_backend_unbind(bdev, ttm); 644 } 645 646 static void radeon_ttm_tt_destroy(struct ttm_device *bdev, 647 struct ttm_tt *ttm) 648 { 649 #if IS_ENABLED(CONFIG_AGP) 650 struct radeon_device *rdev = radeon_get_rdev(bdev); 651 652 if (rdev->flags & RADEON_IS_AGP) { 653 ttm_agp_destroy(ttm); 654 return; 655 } 656 #endif 657 radeon_ttm_backend_destroy(bdev, ttm); 658 } 659 660 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev, 661 struct ttm_tt *ttm) 662 { 663 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 664 665 if (gtt == NULL) 666 return false; 667 668 return !!gtt->userptr; 669 } 670 671 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev, 672 struct ttm_tt *ttm) 673 { 674 struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm); 675 676 if (gtt == NULL) 677 return false; 678 679 return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY); 680 } 681 682 static void 683 radeon_bo_delete_mem_notify(struct ttm_buffer_object *bo) 684 { 685 unsigned int old_type = TTM_PL_SYSTEM; 686 687 if (bo->resource) 688 old_type = bo->resource->mem_type; 689 radeon_bo_move_notify(bo, old_type, NULL); 690 } 691 692 static struct ttm_device_funcs radeon_bo_driver = { 693 .ttm_tt_create = &radeon_ttm_tt_create, 694 .ttm_tt_populate = &radeon_ttm_tt_populate, 695 .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate, 696 .ttm_tt_destroy = &radeon_ttm_tt_destroy, 697 .eviction_valuable = ttm_bo_eviction_valuable, 698 .evict_flags = &radeon_evict_flags, 699 .move = &radeon_bo_move, 700 .delete_mem_notify = &radeon_bo_delete_mem_notify, 701 .io_mem_reserve = &radeon_ttm_io_mem_reserve, 702 }; 703 704 int radeon_ttm_init(struct radeon_device *rdev) 705 { 706 int r; 707 708 /* No others user of address space so set it to 0 */ 709 r = ttm_device_init(&rdev->mman.bdev, &radeon_bo_driver, rdev->dev, 710 rdev->ddev->anon_inode->i_mapping, 711 rdev->ddev->vma_offset_manager, 712 rdev->need_swiotlb, 713 dma_addressing_limited(&rdev->pdev->dev)); 714 if (r) { 715 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 716 return r; 717 } 718 rdev->mman.initialized = true; 719 720 r = radeon_ttm_init_vram(rdev); 721 if (r) { 722 DRM_ERROR("Failed initializing VRAM heap.\n"); 723 return r; 724 } 725 /* Change the size here instead of the init above so only lpfn is affected */ 726 radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size); 727 728 r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true, 729 RADEON_GEM_DOMAIN_VRAM, 0, NULL, 730 NULL, &rdev->stolen_vga_memory); 731 if (r) { 732 return r; 733 } 734 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 735 if (r) 736 return r; 737 r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL); 738 radeon_bo_unreserve(rdev->stolen_vga_memory); 739 if (r) { 740 radeon_bo_unref(&rdev->stolen_vga_memory); 741 return r; 742 } 743 DRM_INFO("radeon: %uM of VRAM memory ready\n", 744 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024))); 745 746 r = radeon_ttm_init_gtt(rdev); 747 if (r) { 748 DRM_ERROR("Failed initializing GTT heap.\n"); 749 return r; 750 } 751 DRM_INFO("radeon: %uM of GTT memory ready.\n", 752 (unsigned)(rdev->mc.gtt_size / (1024 * 1024))); 753 754 radeon_ttm_debugfs_init(rdev); 755 756 return 0; 757 } 758 759 void radeon_ttm_fini(struct radeon_device *rdev) 760 { 761 int r; 762 763 if (!rdev->mman.initialized) 764 return; 765 766 if (rdev->stolen_vga_memory) { 767 r = radeon_bo_reserve(rdev->stolen_vga_memory, false); 768 if (r == 0) { 769 radeon_bo_unpin(rdev->stolen_vga_memory); 770 radeon_bo_unreserve(rdev->stolen_vga_memory); 771 } 772 radeon_bo_unref(&rdev->stolen_vga_memory); 773 } 774 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM); 775 ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT); 776 ttm_device_fini(&rdev->mman.bdev); 777 radeon_gart_fini(rdev); 778 rdev->mman.initialized = false; 779 DRM_INFO("radeon: ttm finalized\n"); 780 } 781 782 /* this should only be called at bootup or when userspace 783 * isn't running */ 784 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size) 785 { 786 struct ttm_resource_manager *man; 787 788 if (!rdev->mman.initialized) 789 return; 790 791 man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM); 792 /* this just adjusts TTM size idea, which sets lpfn to the correct value */ 793 man->size = size >> PAGE_SHIFT; 794 } 795 796 #if defined(CONFIG_DEBUG_FS) 797 798 static int radeon_mm_vram_dump_table_show(struct seq_file *m, void *unused) 799 { 800 struct radeon_device *rdev = (struct radeon_device *)m->private; 801 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, 802 TTM_PL_VRAM); 803 struct drm_printer p = drm_seq_file_printer(m); 804 805 man->func->debug(man, &p); 806 return 0; 807 } 808 809 static int radeon_ttm_page_pool_show(struct seq_file *m, void *data) 810 { 811 struct radeon_device *rdev = (struct radeon_device *)m->private; 812 813 return ttm_pool_debugfs(&rdev->mman.bdev.pool, m); 814 } 815 816 static int radeon_mm_gtt_dump_table_show(struct seq_file *m, void *unused) 817 { 818 struct radeon_device *rdev = (struct radeon_device *)m->private; 819 struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, 820 TTM_PL_TT); 821 struct drm_printer p = drm_seq_file_printer(m); 822 823 man->func->debug(man, &p); 824 return 0; 825 } 826 827 DEFINE_SHOW_ATTRIBUTE(radeon_mm_vram_dump_table); 828 DEFINE_SHOW_ATTRIBUTE(radeon_mm_gtt_dump_table); 829 DEFINE_SHOW_ATTRIBUTE(radeon_ttm_page_pool); 830 831 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep) 832 { 833 struct radeon_device *rdev = inode->i_private; 834 i_size_write(inode, rdev->mc.mc_vram_size); 835 filep->private_data = inode->i_private; 836 return 0; 837 } 838 839 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf, 840 size_t size, loff_t *pos) 841 { 842 struct radeon_device *rdev = f->private_data; 843 ssize_t result = 0; 844 int r; 845 846 if (size & 0x3 || *pos & 0x3) 847 return -EINVAL; 848 849 while (size) { 850 unsigned long flags; 851 uint32_t value; 852 853 if (*pos >= rdev->mc.mc_vram_size) 854 return result; 855 856 spin_lock_irqsave(&rdev->mmio_idx_lock, flags); 857 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000); 858 if (rdev->family >= CHIP_CEDAR) 859 WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31); 860 value = RREG32(RADEON_MM_DATA); 861 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags); 862 863 r = put_user(value, (uint32_t __user *)buf); 864 if (r) 865 return r; 866 867 result += 4; 868 buf += 4; 869 *pos += 4; 870 size -= 4; 871 } 872 873 return result; 874 } 875 876 static const struct file_operations radeon_ttm_vram_fops = { 877 .owner = THIS_MODULE, 878 .open = radeon_ttm_vram_open, 879 .read = radeon_ttm_vram_read, 880 .llseek = default_llseek 881 }; 882 883 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep) 884 { 885 struct radeon_device *rdev = inode->i_private; 886 i_size_write(inode, rdev->mc.gtt_size); 887 filep->private_data = inode->i_private; 888 return 0; 889 } 890 891 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf, 892 size_t size, loff_t *pos) 893 { 894 struct radeon_device *rdev = f->private_data; 895 ssize_t result = 0; 896 int r; 897 898 while (size) { 899 loff_t p = *pos / PAGE_SIZE; 900 unsigned off = *pos & ~PAGE_MASK; 901 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off); 902 struct page *page; 903 void *ptr; 904 905 if (p >= rdev->gart.num_cpu_pages) 906 return result; 907 908 page = rdev->gart.pages[p]; 909 if (page) { 910 ptr = kmap(page); 911 ptr += off; 912 913 r = copy_to_user(buf, ptr, cur_size); 914 kunmap(rdev->gart.pages[p]); 915 } else 916 r = clear_user(buf, cur_size); 917 918 if (r) 919 return -EFAULT; 920 921 result += cur_size; 922 buf += cur_size; 923 *pos += cur_size; 924 size -= cur_size; 925 } 926 927 return result; 928 } 929 930 static const struct file_operations radeon_ttm_gtt_fops = { 931 .owner = THIS_MODULE, 932 .open = radeon_ttm_gtt_open, 933 .read = radeon_ttm_gtt_read, 934 .llseek = default_llseek 935 }; 936 937 #endif 938 939 static void radeon_ttm_debugfs_init(struct radeon_device *rdev) 940 { 941 #if defined(CONFIG_DEBUG_FS) 942 struct drm_minor *minor = rdev->ddev->primary; 943 struct dentry *root = minor->debugfs_root; 944 945 debugfs_create_file("radeon_vram", 0444, root, rdev, 946 &radeon_ttm_vram_fops); 947 948 debugfs_create_file("radeon_gtt", 0444, root, rdev, 949 &radeon_ttm_gtt_fops); 950 951 debugfs_create_file("radeon_vram_mm", 0444, root, rdev, 952 &radeon_mm_vram_dump_table_fops); 953 debugfs_create_file("radeon_gtt_mm", 0444, root, rdev, 954 &radeon_mm_gtt_dump_table_fops); 955 debugfs_create_file("ttm_page_pool", 0444, root, rdev, 956 &radeon_ttm_page_pool_fops); 957 #endif 958 } 959