xref: /linux/drivers/gpu/drm/radeon/radeon_ring.c (revision ec8a42e7343234802b9054874fe01810880289ce)
1 /*
2  * Copyright 2008 Advanced Micro Devices, Inc.
3  * Copyright 2008 Red Hat Inc.
4  * Copyright 2009 Jerome Glisse.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  *          Christian König
28  */
29 
30 #include <drm/drm_debugfs.h>
31 #include <drm/drm_device.h>
32 #include <drm/drm_file.h>
33 
34 #include "radeon.h"
35 
36 /*
37  * Rings
38  * Most engines on the GPU are fed via ring buffers.  Ring
39  * buffers are areas of GPU accessible memory that the host
40  * writes commands into and the GPU reads commands out of.
41  * There is a rptr (read pointer) that determines where the
42  * GPU is currently reading, and a wptr (write pointer)
43  * which determines where the host has written.  When the
44  * pointers are equal, the ring is idle.  When the host
45  * writes commands to the ring buffer, it increments the
46  * wptr.  The GPU then starts fetching commands and executes
47  * them until the pointers are equal again.
48  */
49 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
50 
51 /**
52  * radeon_ring_supports_scratch_reg - check if the ring supports
53  * writing to scratch registers
54  *
55  * @rdev: radeon_device pointer
56  * @ring: radeon_ring structure holding ring information
57  *
58  * Check if a specific ring supports writing to scratch registers (all asics).
59  * Returns true if the ring supports writing to scratch regs, false if not.
60  */
61 bool radeon_ring_supports_scratch_reg(struct radeon_device *rdev,
62 				      struct radeon_ring *ring)
63 {
64 	switch (ring->idx) {
65 	case RADEON_RING_TYPE_GFX_INDEX:
66 	case CAYMAN_RING_TYPE_CP1_INDEX:
67 	case CAYMAN_RING_TYPE_CP2_INDEX:
68 		return true;
69 	default:
70 		return false;
71 	}
72 }
73 
74 /**
75  * radeon_ring_free_size - update the free size
76  *
77  * @rdev: radeon_device pointer
78  * @ring: radeon_ring structure holding ring information
79  *
80  * Update the free dw slots in the ring buffer (all asics).
81  */
82 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
83 {
84 	uint32_t rptr = radeon_ring_get_rptr(rdev, ring);
85 
86 	/* This works because ring_size is a power of 2 */
87 	ring->ring_free_dw = rptr + (ring->ring_size / 4);
88 	ring->ring_free_dw -= ring->wptr;
89 	ring->ring_free_dw &= ring->ptr_mask;
90 	if (!ring->ring_free_dw) {
91 		/* this is an empty ring */
92 		ring->ring_free_dw = ring->ring_size / 4;
93 		/*  update lockup info to avoid false positive */
94 		radeon_ring_lockup_update(rdev, ring);
95 	}
96 }
97 
98 /**
99  * radeon_ring_alloc - allocate space on the ring buffer
100  *
101  * @rdev: radeon_device pointer
102  * @ring: radeon_ring structure holding ring information
103  * @ndw: number of dwords to allocate in the ring buffer
104  *
105  * Allocate @ndw dwords in the ring buffer (all asics).
106  * Returns 0 on success, error on failure.
107  */
108 int radeon_ring_alloc(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
109 {
110 	int r;
111 
112 	/* make sure we aren't trying to allocate more space than there is on the ring */
113 	if (ndw > (ring->ring_size / 4))
114 		return -ENOMEM;
115 	/* Align requested size with padding so unlock_commit can
116 	 * pad safely */
117 	radeon_ring_free_size(rdev, ring);
118 	ndw = (ndw + ring->align_mask) & ~ring->align_mask;
119 	while (ndw > (ring->ring_free_dw - 1)) {
120 		radeon_ring_free_size(rdev, ring);
121 		if (ndw < ring->ring_free_dw) {
122 			break;
123 		}
124 		r = radeon_fence_wait_next(rdev, ring->idx);
125 		if (r)
126 			return r;
127 	}
128 	ring->count_dw = ndw;
129 	ring->wptr_old = ring->wptr;
130 	return 0;
131 }
132 
133 /**
134  * radeon_ring_lock - lock the ring and allocate space on it
135  *
136  * @rdev: radeon_device pointer
137  * @ring: radeon_ring structure holding ring information
138  * @ndw: number of dwords to allocate in the ring buffer
139  *
140  * Lock the ring and allocate @ndw dwords in the ring buffer
141  * (all asics).
142  * Returns 0 on success, error on failure.
143  */
144 int radeon_ring_lock(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ndw)
145 {
146 	int r;
147 
148 	mutex_lock(&rdev->ring_lock);
149 	r = radeon_ring_alloc(rdev, ring, ndw);
150 	if (r) {
151 		mutex_unlock(&rdev->ring_lock);
152 		return r;
153 	}
154 	return 0;
155 }
156 
157 /**
158  * radeon_ring_commit - tell the GPU to execute the new
159  * commands on the ring buffer
160  *
161  * @rdev: radeon_device pointer
162  * @ring: radeon_ring structure holding ring information
163  * @hdp_flush: Whether or not to perform an HDP cache flush
164  *
165  * Update the wptr (write pointer) to tell the GPU to
166  * execute new commands on the ring buffer (all asics).
167  */
168 void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring,
169 			bool hdp_flush)
170 {
171 	/* If we are emitting the HDP flush via the ring buffer, we need to
172 	 * do it before padding.
173 	 */
174 	if (hdp_flush && rdev->asic->ring[ring->idx]->hdp_flush)
175 		rdev->asic->ring[ring->idx]->hdp_flush(rdev, ring);
176 	/* We pad to match fetch size */
177 	while (ring->wptr & ring->align_mask) {
178 		radeon_ring_write(ring, ring->nop);
179 	}
180 	mb();
181 	/* If we are emitting the HDP flush via MMIO, we need to do it after
182 	 * all CPU writes to VRAM finished.
183 	 */
184 	if (hdp_flush && rdev->asic->mmio_hdp_flush)
185 		rdev->asic->mmio_hdp_flush(rdev);
186 	radeon_ring_set_wptr(rdev, ring);
187 }
188 
189 /**
190  * radeon_ring_unlock_commit - tell the GPU to execute the new
191  * commands on the ring buffer and unlock it
192  *
193  * @rdev: radeon_device pointer
194  * @ring: radeon_ring structure holding ring information
195  * @hdp_flush: Whether or not to perform an HDP cache flush
196  *
197  * Call radeon_ring_commit() then unlock the ring (all asics).
198  */
199 void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *ring,
200 			       bool hdp_flush)
201 {
202 	radeon_ring_commit(rdev, ring, hdp_flush);
203 	mutex_unlock(&rdev->ring_lock);
204 }
205 
206 /**
207  * radeon_ring_undo - reset the wptr
208  *
209  * @ring: radeon_ring structure holding ring information
210  *
211  * Reset the driver's copy of the wptr (all asics).
212  */
213 void radeon_ring_undo(struct radeon_ring *ring)
214 {
215 	ring->wptr = ring->wptr_old;
216 }
217 
218 /**
219  * radeon_ring_unlock_undo - reset the wptr and unlock the ring
220  *
221  * @rdev:       radeon device structure
222  * @ring: radeon_ring structure holding ring information
223  *
224  * Call radeon_ring_undo() then unlock the ring (all asics).
225  */
226 void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *ring)
227 {
228 	radeon_ring_undo(ring);
229 	mutex_unlock(&rdev->ring_lock);
230 }
231 
232 /**
233  * radeon_ring_lockup_update - update lockup variables
234  *
235  * @rdev:       radeon device structure
236  * @ring: radeon_ring structure holding ring information
237  *
238  * Update the last rptr value and timestamp (all asics).
239  */
240 void radeon_ring_lockup_update(struct radeon_device *rdev,
241 			       struct radeon_ring *ring)
242 {
243 	atomic_set(&ring->last_rptr, radeon_ring_get_rptr(rdev, ring));
244 	atomic64_set(&ring->last_activity, jiffies_64);
245 }
246 
247 /**
248  * radeon_ring_test_lockup() - check if ring is lockedup by recording information
249  * @rdev:       radeon device structure
250  * @ring:       radeon_ring structure holding ring information
251  *
252  */
253 bool radeon_ring_test_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
254 {
255 	uint32_t rptr = radeon_ring_get_rptr(rdev, ring);
256 	uint64_t last = atomic64_read(&ring->last_activity);
257 	uint64_t elapsed;
258 
259 	if (rptr != atomic_read(&ring->last_rptr)) {
260 		/* ring is still working, no lockup */
261 		radeon_ring_lockup_update(rdev, ring);
262 		return false;
263 	}
264 
265 	elapsed = jiffies_to_msecs(jiffies_64 - last);
266 	if (radeon_lockup_timeout && elapsed >= radeon_lockup_timeout) {
267 		dev_err(rdev->dev, "ring %d stalled for more than %llumsec\n",
268 			ring->idx, elapsed);
269 		return true;
270 	}
271 	/* give a chance to the GPU ... */
272 	return false;
273 }
274 
275 /**
276  * radeon_ring_backup - Back up the content of a ring
277  *
278  * @rdev: radeon_device pointer
279  * @ring: the ring we want to back up
280  * @data: placeholder for returned commit data
281  *
282  * Saves all unprocessed commits from a ring, returns the number of dwords saved.
283  */
284 unsigned radeon_ring_backup(struct radeon_device *rdev, struct radeon_ring *ring,
285 			    uint32_t **data)
286 {
287 	unsigned size, ptr, i;
288 
289 	/* just in case lock the ring */
290 	mutex_lock(&rdev->ring_lock);
291 	*data = NULL;
292 
293 	if (ring->ring_obj == NULL) {
294 		mutex_unlock(&rdev->ring_lock);
295 		return 0;
296 	}
297 
298 	/* it doesn't make sense to save anything if all fences are signaled */
299 	if (!radeon_fence_count_emitted(rdev, ring->idx)) {
300 		mutex_unlock(&rdev->ring_lock);
301 		return 0;
302 	}
303 
304 	/* calculate the number of dw on the ring */
305 	if (ring->rptr_save_reg)
306 		ptr = RREG32(ring->rptr_save_reg);
307 	else if (rdev->wb.enabled)
308 		ptr = le32_to_cpu(*ring->next_rptr_cpu_addr);
309 	else {
310 		/* no way to read back the next rptr */
311 		mutex_unlock(&rdev->ring_lock);
312 		return 0;
313 	}
314 
315 	size = ring->wptr + (ring->ring_size / 4);
316 	size -= ptr;
317 	size &= ring->ptr_mask;
318 	if (size == 0) {
319 		mutex_unlock(&rdev->ring_lock);
320 		return 0;
321 	}
322 
323 	/* and then save the content of the ring */
324 	*data = kvmalloc_array(size, sizeof(uint32_t), GFP_KERNEL);
325 	if (!*data) {
326 		mutex_unlock(&rdev->ring_lock);
327 		return 0;
328 	}
329 	for (i = 0; i < size; ++i) {
330 		(*data)[i] = ring->ring[ptr++];
331 		ptr &= ring->ptr_mask;
332 	}
333 
334 	mutex_unlock(&rdev->ring_lock);
335 	return size;
336 }
337 
338 /**
339  * radeon_ring_restore - append saved commands to the ring again
340  *
341  * @rdev: radeon_device pointer
342  * @ring: ring to append commands to
343  * @size: number of dwords we want to write
344  * @data: saved commands
345  *
346  * Allocates space on the ring and restore the previously saved commands.
347  */
348 int radeon_ring_restore(struct radeon_device *rdev, struct radeon_ring *ring,
349 			unsigned size, uint32_t *data)
350 {
351 	int i, r;
352 
353 	if (!size || !data)
354 		return 0;
355 
356 	/* restore the saved ring content */
357 	r = radeon_ring_lock(rdev, ring, size);
358 	if (r)
359 		return r;
360 
361 	for (i = 0; i < size; ++i) {
362 		radeon_ring_write(ring, data[i]);
363 	}
364 
365 	radeon_ring_unlock_commit(rdev, ring, false);
366 	kvfree(data);
367 	return 0;
368 }
369 
370 /**
371  * radeon_ring_init - init driver ring struct.
372  *
373  * @rdev: radeon_device pointer
374  * @ring: radeon_ring structure holding ring information
375  * @ring_size: size of the ring
376  * @rptr_offs: offset of the rptr writeback location in the WB buffer
377  * @nop: nop packet for this ring
378  *
379  * Initialize the driver information for the selected ring (all asics).
380  * Returns 0 on success, error on failure.
381  */
382 int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
383 		     unsigned rptr_offs, u32 nop)
384 {
385 	int r;
386 
387 	ring->ring_size = ring_size;
388 	ring->rptr_offs = rptr_offs;
389 	ring->nop = nop;
390 	/* Allocate ring buffer */
391 	if (ring->ring_obj == NULL) {
392 		r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
393 				     RADEON_GEM_DOMAIN_GTT, 0, NULL,
394 				     NULL, &ring->ring_obj);
395 		if (r) {
396 			dev_err(rdev->dev, "(%d) ring create failed\n", r);
397 			return r;
398 		}
399 		r = radeon_bo_reserve(ring->ring_obj, false);
400 		if (unlikely(r != 0))
401 			return r;
402 		r = radeon_bo_pin(ring->ring_obj, RADEON_GEM_DOMAIN_GTT,
403 					&ring->gpu_addr);
404 		if (r) {
405 			radeon_bo_unreserve(ring->ring_obj);
406 			dev_err(rdev->dev, "(%d) ring pin failed\n", r);
407 			return r;
408 		}
409 		r = radeon_bo_kmap(ring->ring_obj,
410 				       (void **)&ring->ring);
411 		radeon_bo_unreserve(ring->ring_obj);
412 		if (r) {
413 			dev_err(rdev->dev, "(%d) ring map failed\n", r);
414 			return r;
415 		}
416 	}
417 	ring->ptr_mask = (ring->ring_size / 4) - 1;
418 	ring->ring_free_dw = ring->ring_size / 4;
419 	if (rdev->wb.enabled) {
420 		u32 index = RADEON_WB_RING0_NEXT_RPTR + (ring->idx * 4);
421 		ring->next_rptr_gpu_addr = rdev->wb.gpu_addr + index;
422 		ring->next_rptr_cpu_addr = &rdev->wb.wb[index/4];
423 	}
424 	if (radeon_debugfs_ring_init(rdev, ring)) {
425 		DRM_ERROR("Failed to register debugfs file for rings !\n");
426 	}
427 	radeon_ring_lockup_update(rdev, ring);
428 	return 0;
429 }
430 
431 /**
432  * radeon_ring_fini - tear down the driver ring struct.
433  *
434  * @rdev: radeon_device pointer
435  * @ring: radeon_ring structure holding ring information
436  *
437  * Tear down the driver information for the selected ring (all asics).
438  */
439 void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *ring)
440 {
441 	int r;
442 	struct radeon_bo *ring_obj;
443 
444 	mutex_lock(&rdev->ring_lock);
445 	ring_obj = ring->ring_obj;
446 	ring->ready = false;
447 	ring->ring = NULL;
448 	ring->ring_obj = NULL;
449 	mutex_unlock(&rdev->ring_lock);
450 
451 	if (ring_obj) {
452 		r = radeon_bo_reserve(ring_obj, false);
453 		if (likely(r == 0)) {
454 			radeon_bo_kunmap(ring_obj);
455 			radeon_bo_unpin(ring_obj);
456 			radeon_bo_unreserve(ring_obj);
457 		}
458 		radeon_bo_unref(&ring_obj);
459 	}
460 }
461 
462 /*
463  * Debugfs info
464  */
465 #if defined(CONFIG_DEBUG_FS)
466 
467 static int radeon_debugfs_ring_info(struct seq_file *m, void *data)
468 {
469 	struct drm_info_node *node = (struct drm_info_node *) m->private;
470 	struct drm_device *dev = node->minor->dev;
471 	struct radeon_device *rdev = dev->dev_private;
472 	int ridx = *(int*)node->info_ent->data;
473 	struct radeon_ring *ring = &rdev->ring[ridx];
474 
475 	uint32_t rptr, wptr, rptr_next;
476 	unsigned count, i, j;
477 
478 	radeon_ring_free_size(rdev, ring);
479 	count = (ring->ring_size / 4) - ring->ring_free_dw;
480 
481 	wptr = radeon_ring_get_wptr(rdev, ring);
482 	seq_printf(m, "wptr: 0x%08x [%5d]\n",
483 		   wptr, wptr);
484 
485 	rptr = radeon_ring_get_rptr(rdev, ring);
486 	seq_printf(m, "rptr: 0x%08x [%5d]\n",
487 		   rptr, rptr);
488 
489 	if (ring->rptr_save_reg) {
490 		rptr_next = RREG32(ring->rptr_save_reg);
491 		seq_printf(m, "rptr next(0x%04x): 0x%08x [%5d]\n",
492 			   ring->rptr_save_reg, rptr_next, rptr_next);
493 	} else
494 		rptr_next = ~0;
495 
496 	seq_printf(m, "driver's copy of the wptr: 0x%08x [%5d]\n",
497 		   ring->wptr, ring->wptr);
498 	seq_printf(m, "last semaphore signal addr : 0x%016llx\n",
499 		   ring->last_semaphore_signal_addr);
500 	seq_printf(m, "last semaphore wait addr   : 0x%016llx\n",
501 		   ring->last_semaphore_wait_addr);
502 	seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw);
503 	seq_printf(m, "%u dwords in ring\n", count);
504 
505 	if (!ring->ring)
506 		return 0;
507 
508 	/* print 8 dw before current rptr as often it's the last executed
509 	 * packet that is the root issue
510 	 */
511 	i = (rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask;
512 	for (j = 0; j <= (count + 32); j++) {
513 		seq_printf(m, "r[%5d]=0x%08x", i, ring->ring[i]);
514 		if (rptr == i)
515 			seq_puts(m, " *");
516 		if (rptr_next == i)
517 			seq_puts(m, " #");
518 		seq_puts(m, "\n");
519 		i = (i + 1) & ring->ptr_mask;
520 	}
521 	return 0;
522 }
523 
524 static int radeon_gfx_index = RADEON_RING_TYPE_GFX_INDEX;
525 static int cayman_cp1_index = CAYMAN_RING_TYPE_CP1_INDEX;
526 static int cayman_cp2_index = CAYMAN_RING_TYPE_CP2_INDEX;
527 static int radeon_dma1_index = R600_RING_TYPE_DMA_INDEX;
528 static int radeon_dma2_index = CAYMAN_RING_TYPE_DMA1_INDEX;
529 static int r600_uvd_index = R600_RING_TYPE_UVD_INDEX;
530 static int si_vce1_index = TN_RING_TYPE_VCE1_INDEX;
531 static int si_vce2_index = TN_RING_TYPE_VCE2_INDEX;
532 
533 static struct drm_info_list radeon_debugfs_ring_info_list[] = {
534 	{"radeon_ring_gfx", radeon_debugfs_ring_info, 0, &radeon_gfx_index},
535 	{"radeon_ring_cp1", radeon_debugfs_ring_info, 0, &cayman_cp1_index},
536 	{"radeon_ring_cp2", radeon_debugfs_ring_info, 0, &cayman_cp2_index},
537 	{"radeon_ring_dma1", radeon_debugfs_ring_info, 0, &radeon_dma1_index},
538 	{"radeon_ring_dma2", radeon_debugfs_ring_info, 0, &radeon_dma2_index},
539 	{"radeon_ring_uvd", radeon_debugfs_ring_info, 0, &r600_uvd_index},
540 	{"radeon_ring_vce1", radeon_debugfs_ring_info, 0, &si_vce1_index},
541 	{"radeon_ring_vce2", radeon_debugfs_ring_info, 0, &si_vce2_index},
542 };
543 
544 #endif
545 
546 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring)
547 {
548 #if defined(CONFIG_DEBUG_FS)
549 	unsigned i;
550 	for (i = 0; i < ARRAY_SIZE(radeon_debugfs_ring_info_list); ++i) {
551 		struct drm_info_list *info = &radeon_debugfs_ring_info_list[i];
552 		int ridx = *(int*)radeon_debugfs_ring_info_list[i].data;
553 		unsigned r;
554 
555 		if (&rdev->ring[ridx] != ring)
556 			continue;
557 
558 		r = radeon_debugfs_add_files(rdev, info, 1);
559 		if (r)
560 			return r;
561 	}
562 #endif
563 	return 0;
564 }
565