1 /* 2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3 * VA Linux Systems Inc., Fremont, California. 4 * Copyright 2008 Red Hat Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Original Authors: 25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane 26 * 27 * Kernel port Author: Dave Airlie 28 */ 29 30 #ifndef RADEON_MODE_H 31 #define RADEON_MODE_H 32 33 #include <drm_crtc.h> 34 #include <drm_mode.h> 35 #include <drm_edid.h> 36 #include <linux/i2c.h> 37 #include <linux/i2c-id.h> 38 #include <linux/i2c-algo-bit.h> 39 #include "radeon_fixed.h" 40 41 struct radeon_device; 42 43 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) 44 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base) 45 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) 46 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) 47 48 enum radeon_connector_type { 49 CONNECTOR_NONE, 50 CONNECTOR_VGA, 51 CONNECTOR_DVI_I, 52 CONNECTOR_DVI_D, 53 CONNECTOR_DVI_A, 54 CONNECTOR_STV, 55 CONNECTOR_CTV, 56 CONNECTOR_LVDS, 57 CONNECTOR_DIGITAL, 58 CONNECTOR_SCART, 59 CONNECTOR_HDMI_TYPE_A, 60 CONNECTOR_HDMI_TYPE_B, 61 CONNECTOR_0XC, 62 CONNECTOR_0XD, 63 CONNECTOR_DIN, 64 CONNECTOR_DISPLAY_PORT, 65 CONNECTOR_UNSUPPORTED 66 }; 67 68 enum radeon_dvi_type { 69 DVI_AUTO, 70 DVI_DIGITAL, 71 DVI_ANALOG 72 }; 73 74 enum radeon_rmx_type { 75 RMX_OFF, 76 RMX_FULL, 77 RMX_CENTER, 78 RMX_ASPECT 79 }; 80 81 enum radeon_tv_std { 82 TV_STD_NTSC, 83 TV_STD_PAL, 84 TV_STD_PAL_M, 85 TV_STD_PAL_60, 86 TV_STD_NTSC_J, 87 TV_STD_SCART_PAL, 88 TV_STD_SECAM, 89 TV_STD_PAL_CN, 90 }; 91 92 struct radeon_i2c_bus_rec { 93 bool valid; 94 uint32_t mask_clk_reg; 95 uint32_t mask_data_reg; 96 uint32_t a_clk_reg; 97 uint32_t a_data_reg; 98 uint32_t put_clk_reg; 99 uint32_t put_data_reg; 100 uint32_t get_clk_reg; 101 uint32_t get_data_reg; 102 uint32_t mask_clk_mask; 103 uint32_t mask_data_mask; 104 uint32_t put_clk_mask; 105 uint32_t put_data_mask; 106 uint32_t get_clk_mask; 107 uint32_t get_data_mask; 108 uint32_t a_clk_mask; 109 uint32_t a_data_mask; 110 }; 111 112 struct radeon_tmds_pll { 113 uint32_t freq; 114 uint32_t value; 115 }; 116 117 #define RADEON_MAX_BIOS_CONNECTOR 16 118 119 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0) 120 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) 121 #define RADEON_PLL_USE_REF_DIV (1 << 2) 122 #define RADEON_PLL_LEGACY (1 << 3) 123 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) 124 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) 125 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) 126 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) 127 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) 128 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 129 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 130 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 131 132 struct radeon_pll { 133 uint16_t reference_freq; 134 uint16_t reference_div; 135 uint32_t pll_in_min; 136 uint32_t pll_in_max; 137 uint32_t pll_out_min; 138 uint32_t pll_out_max; 139 uint16_t xclk; 140 141 uint32_t min_ref_div; 142 uint32_t max_ref_div; 143 uint32_t min_post_div; 144 uint32_t max_post_div; 145 uint32_t min_feedback_div; 146 uint32_t max_feedback_div; 147 uint32_t min_frac_feedback_div; 148 uint32_t max_frac_feedback_div; 149 uint32_t best_vco; 150 }; 151 152 struct radeon_i2c_chan { 153 struct drm_device *dev; 154 struct i2c_adapter adapter; 155 struct i2c_algo_bit_data algo; 156 struct radeon_i2c_bus_rec rec; 157 }; 158 159 /* mostly for macs, but really any system without connector tables */ 160 enum radeon_connector_table { 161 CT_NONE, 162 CT_GENERIC, 163 CT_IBOOK, 164 CT_POWERBOOK_EXTERNAL, 165 CT_POWERBOOK_INTERNAL, 166 CT_POWERBOOK_VGA, 167 CT_MINI_EXTERNAL, 168 CT_MINI_INTERNAL, 169 CT_IMAC_G5_ISIGHT, 170 CT_EMAC, 171 }; 172 173 struct radeon_mode_info { 174 struct atom_context *atom_context; 175 enum radeon_connector_table connector_table; 176 bool mode_config_initialized; 177 struct radeon_crtc *crtcs[2]; 178 }; 179 180 struct radeon_native_mode { 181 /* preferred mode */ 182 uint32_t panel_xres, panel_yres; 183 uint32_t hoverplus, hsync_width; 184 uint32_t hblank; 185 uint32_t voverplus, vsync_width; 186 uint32_t vblank; 187 uint32_t dotclock; 188 uint32_t flags; 189 }; 190 191 struct radeon_crtc { 192 struct drm_crtc base; 193 int crtc_id; 194 u16 lut_r[256], lut_g[256], lut_b[256]; 195 bool enabled; 196 bool can_tile; 197 uint32_t crtc_offset; 198 struct radeon_framebuffer *fbdev_fb; 199 struct drm_mode_set mode_set; 200 struct drm_gem_object *cursor_bo; 201 uint64_t cursor_addr; 202 int cursor_width; 203 int cursor_height; 204 uint32_t legacy_display_base_addr; 205 uint32_t legacy_cursor_offset; 206 enum radeon_rmx_type rmx_type; 207 uint32_t devices; 208 fixed20_12 vsc; 209 fixed20_12 hsc; 210 struct radeon_native_mode native_mode; 211 }; 212 213 struct radeon_encoder_primary_dac { 214 /* legacy primary dac */ 215 uint32_t ps2_pdac_adj; 216 }; 217 218 struct radeon_encoder_lvds { 219 /* legacy lvds */ 220 uint16_t panel_vcc_delay; 221 uint8_t panel_pwr_delay; 222 uint8_t panel_digon_delay; 223 uint8_t panel_blon_delay; 224 uint16_t panel_ref_divider; 225 uint8_t panel_post_divider; 226 uint16_t panel_fb_divider; 227 bool use_bios_dividers; 228 uint32_t lvds_gen_cntl; 229 /* panel mode */ 230 struct radeon_native_mode native_mode; 231 }; 232 233 struct radeon_encoder_tv_dac { 234 /* legacy tv dac */ 235 uint32_t ps2_tvdac_adj; 236 uint32_t ntsc_tvdac_adj; 237 uint32_t pal_tvdac_adj; 238 239 enum radeon_tv_std tv_std; 240 }; 241 242 struct radeon_encoder_int_tmds { 243 /* legacy int tmds */ 244 struct radeon_tmds_pll tmds_pll[4]; 245 }; 246 247 struct radeon_encoder_atom_dig { 248 /* atom dig */ 249 bool coherent_mode; 250 int dig_block; 251 /* atom lvds */ 252 uint32_t lvds_misc; 253 uint16_t panel_pwr_delay; 254 /* panel mode */ 255 struct radeon_native_mode native_mode; 256 }; 257 258 struct radeon_encoder { 259 struct drm_encoder base; 260 uint32_t encoder_id; 261 uint32_t devices; 262 uint32_t flags; 263 uint32_t pixel_clock; 264 enum radeon_rmx_type rmx_type; 265 struct radeon_native_mode native_mode; 266 void *enc_priv; 267 }; 268 269 struct radeon_connector_atom_dig { 270 uint32_t igp_lane_info; 271 bool linkb; 272 }; 273 274 struct radeon_connector { 275 struct drm_connector base; 276 uint32_t connector_id; 277 uint32_t devices; 278 struct radeon_i2c_chan *ddc_bus; 279 int use_digital; 280 void *con_priv; 281 }; 282 283 struct radeon_framebuffer { 284 struct drm_framebuffer base; 285 struct drm_gem_object *obj; 286 }; 287 288 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 289 struct radeon_i2c_bus_rec *rec, 290 const char *name); 291 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c); 292 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector); 293 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector); 294 295 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector); 296 297 extern void radeon_compute_pll(struct radeon_pll *pll, 298 uint64_t freq, 299 uint32_t *dot_clock_p, 300 uint32_t *fb_div_p, 301 uint32_t *frac_fb_div_p, 302 uint32_t *ref_div_p, 303 uint32_t *post_div_p, 304 int flags); 305 306 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index); 307 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv); 308 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv); 309 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index); 310 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index); 311 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action); 312 extern int atombios_get_encoder_mode(struct drm_encoder *encoder); 313 314 extern void radeon_crtc_load_lut(struct drm_crtc *crtc); 315 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 316 struct drm_framebuffer *old_fb); 317 extern int atombios_crtc_mode_set(struct drm_crtc *crtc, 318 struct drm_display_mode *mode, 319 struct drm_display_mode *adjusted_mode, 320 int x, int y, 321 struct drm_framebuffer *old_fb); 322 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); 323 324 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 325 struct drm_framebuffer *old_fb); 326 extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); 327 328 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 329 struct drm_file *file_priv, 330 uint32_t handle, 331 uint32_t width, 332 uint32_t height); 333 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc, 334 int x, int y); 335 336 extern bool radeon_atom_get_clock_info(struct drm_device *dev); 337 extern bool radeon_combios_get_clock_info(struct drm_device *dev); 338 extern struct radeon_encoder_atom_dig * 339 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder); 340 extern struct radeon_encoder_int_tmds * 341 radeon_atombios_get_tmds_info(struct radeon_encoder *encoder); 342 extern struct radeon_encoder_primary_dac * 343 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder); 344 extern struct radeon_encoder_tv_dac * 345 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder); 346 extern struct radeon_encoder_lvds * 347 radeon_combios_get_lvds_info(struct radeon_encoder *encoder); 348 extern struct radeon_encoder_int_tmds * 349 radeon_combios_get_tmds_info(struct radeon_encoder *encoder); 350 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder); 351 extern struct radeon_encoder_tv_dac * 352 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder); 353 extern struct radeon_encoder_primary_dac * 354 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder); 355 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock); 356 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev); 357 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock); 358 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev); 359 extern void 360 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 361 extern void 362 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 363 extern void 364 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc); 365 extern void 366 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on); 367 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 368 u16 blue, int regno); 369 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev, 370 struct drm_mode_fb_cmd *mode_cmd, 371 struct drm_gem_object *obj); 372 373 int radeonfb_probe(struct drm_device *dev); 374 375 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); 376 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev); 377 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev); 378 void radeon_atombios_init_crtc(struct drm_device *dev, 379 struct radeon_crtc *radeon_crtc); 380 void radeon_legacy_init_crtc(struct drm_device *dev, 381 struct radeon_crtc *radeon_crtc); 382 void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state); 383 384 void radeon_get_clock_info(struct drm_device *dev); 385 386 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev); 387 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev); 388 389 void radeon_rmx_mode_fixup(struct drm_encoder *encoder, 390 struct drm_display_mode *mode, 391 struct drm_display_mode *adjusted_mode); 392 void radeon_enc_destroy(struct drm_encoder *encoder); 393 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); 394 void radeon_combios_asic_init(struct drm_device *dev); 395 extern int radeon_static_clocks_init(struct drm_device *dev); 396 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 397 struct drm_display_mode *mode, 398 struct drm_display_mode *adjusted_mode); 399 void atom_rv515_force_tv_scaler(struct radeon_device *rdev); 400 401 #endif 402