xref: /linux/drivers/gpu/drm/radeon/radeon_drv.c (revision d0b73b488c55df905ea8faaad079f8535629ed26)
1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
35 
36 #include <drm/drm_pciids.h>
37 #include <linux/console.h>
38 #include <linux/module.h>
39 
40 
41 /*
42  * KMS wrapper.
43  * - 2.0.0 - initial interface
44  * - 2.1.0 - add square tiling interface
45  * - 2.2.0 - add r6xx/r7xx const buffer support
46  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47  * - 2.4.0 - add crtc id query
48  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
50  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
51  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
52  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
53  *   2.10.0 - fusion 2D tiling
54  *   2.11.0 - backend map, initial compute support for the CS checker
55  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
56  *   2.13.0 - virtual memory support, streamout
57  *   2.14.0 - add evergreen tiling informations
58  *   2.15.0 - add max_pipes query
59  *   2.16.0 - fix evergreen 2D tiled surface calculation
60  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
61  *   2.18.0 - r600-eg: allow "invalid" DB formats
62  *   2.19.0 - r600-eg: MSAA textures
63  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
64  *   2.21.0 - r600-r700: FMASK and CMASK
65  *   2.22.0 - r600 only: RESOLVE_BOX allowed
66  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
67  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
68  *   2.25.0 - eg+: new info request for num SE and num SH
69  *   2.26.0 - r600-eg: fix htile size computation
70  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
71  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
72  *   2.29.0 - R500 FP16 color clear registers
73  */
74 #define KMS_DRIVER_MAJOR	2
75 #define KMS_DRIVER_MINOR	29
76 #define KMS_DRIVER_PATCHLEVEL	0
77 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
78 int radeon_driver_unload_kms(struct drm_device *dev);
79 int radeon_driver_firstopen_kms(struct drm_device *dev);
80 void radeon_driver_lastclose_kms(struct drm_device *dev);
81 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
82 void radeon_driver_postclose_kms(struct drm_device *dev,
83 				 struct drm_file *file_priv);
84 void radeon_driver_preclose_kms(struct drm_device *dev,
85 				struct drm_file *file_priv);
86 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
87 int radeon_resume_kms(struct drm_device *dev);
88 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
89 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
90 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
91 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
92 				    int *max_error,
93 				    struct timeval *vblank_time,
94 				    unsigned flags);
95 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
96 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
97 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
98 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
99 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
100 			 struct drm_file *file_priv);
101 int radeon_gem_object_init(struct drm_gem_object *obj);
102 void radeon_gem_object_free(struct drm_gem_object *obj);
103 int radeon_gem_object_open(struct drm_gem_object *obj,
104 				struct drm_file *file_priv);
105 void radeon_gem_object_close(struct drm_gem_object *obj,
106 				struct drm_file *file_priv);
107 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
108 				      int *vpos, int *hpos);
109 extern struct drm_ioctl_desc radeon_ioctls_kms[];
110 extern int radeon_max_kms_ioctl;
111 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
112 int radeon_mode_dumb_mmap(struct drm_file *filp,
113 			  struct drm_device *dev,
114 			  uint32_t handle, uint64_t *offset_p);
115 int radeon_mode_dumb_create(struct drm_file *file_priv,
116 			    struct drm_device *dev,
117 			    struct drm_mode_create_dumb *args);
118 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
119 			     struct drm_device *dev,
120 			     uint32_t handle);
121 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
122 					struct drm_gem_object *obj,
123 					int flags);
124 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
125 					       struct dma_buf *dma_buf);
126 
127 #if defined(CONFIG_DEBUG_FS)
128 int radeon_debugfs_init(struct drm_minor *minor);
129 void radeon_debugfs_cleanup(struct drm_minor *minor);
130 #endif
131 
132 
133 int radeon_no_wb;
134 int radeon_modeset = -1;
135 int radeon_dynclks = -1;
136 int radeon_r4xx_atom = 0;
137 int radeon_agpmode = 0;
138 int radeon_vram_limit = 0;
139 int radeon_gart_size = 512; /* default gart size */
140 int radeon_benchmarking = 0;
141 int radeon_testing = 0;
142 int radeon_connector_table = 0;
143 int radeon_tv = 1;
144 int radeon_audio = 0;
145 int radeon_disp_priority = 0;
146 int radeon_hw_i2c = 0;
147 int radeon_pcie_gen2 = -1;
148 int radeon_msi = -1;
149 int radeon_lockup_timeout = 10000;
150 
151 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
152 module_param_named(no_wb, radeon_no_wb, int, 0444);
153 
154 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
155 module_param_named(modeset, radeon_modeset, int, 0400);
156 
157 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
158 module_param_named(dynclks, radeon_dynclks, int, 0444);
159 
160 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
161 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
162 
163 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
164 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
165 
166 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
167 module_param_named(agpmode, radeon_agpmode, int, 0444);
168 
169 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
170 module_param_named(gartsize, radeon_gart_size, int, 0600);
171 
172 MODULE_PARM_DESC(benchmark, "Run benchmark");
173 module_param_named(benchmark, radeon_benchmarking, int, 0444);
174 
175 MODULE_PARM_DESC(test, "Run tests");
176 module_param_named(test, radeon_testing, int, 0444);
177 
178 MODULE_PARM_DESC(connector_table, "Force connector table");
179 module_param_named(connector_table, radeon_connector_table, int, 0444);
180 
181 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
182 module_param_named(tv, radeon_tv, int, 0444);
183 
184 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
185 module_param_named(audio, radeon_audio, int, 0444);
186 
187 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
188 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
189 
190 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
191 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
192 
193 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
194 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
195 
196 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
197 module_param_named(msi, radeon_msi, int, 0444);
198 
199 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
200 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
201 
202 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
203 {
204 	drm_radeon_private_t *dev_priv = dev->dev_private;
205 
206 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
207 		return 0;
208 
209 	/* Disable *all* interrupts */
210 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
211 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
212 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
213 	return 0;
214 }
215 
216 static int radeon_resume(struct drm_device *dev)
217 {
218 	drm_radeon_private_t *dev_priv = dev->dev_private;
219 
220 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
221 		return 0;
222 
223 	/* Restore interrupt registers */
224 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
225 		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
226 	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
227 	return 0;
228 }
229 
230 static struct pci_device_id pciidlist[] = {
231 	radeon_PCI_IDS
232 };
233 
234 #if defined(CONFIG_DRM_RADEON_KMS)
235 MODULE_DEVICE_TABLE(pci, pciidlist);
236 #endif
237 
238 static const struct file_operations radeon_driver_old_fops = {
239 	.owner = THIS_MODULE,
240 	.open = drm_open,
241 	.release = drm_release,
242 	.unlocked_ioctl = drm_ioctl,
243 	.mmap = drm_mmap,
244 	.poll = drm_poll,
245 	.fasync = drm_fasync,
246 	.read = drm_read,
247 #ifdef CONFIG_COMPAT
248 	.compat_ioctl = radeon_compat_ioctl,
249 #endif
250 	.llseek = noop_llseek,
251 };
252 
253 static struct drm_driver driver_old = {
254 	.driver_features =
255 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
256 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
257 	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
258 	.load = radeon_driver_load,
259 	.firstopen = radeon_driver_firstopen,
260 	.open = radeon_driver_open,
261 	.preclose = radeon_driver_preclose,
262 	.postclose = radeon_driver_postclose,
263 	.lastclose = radeon_driver_lastclose,
264 	.unload = radeon_driver_unload,
265 	.suspend = radeon_suspend,
266 	.resume = radeon_resume,
267 	.get_vblank_counter = radeon_get_vblank_counter,
268 	.enable_vblank = radeon_enable_vblank,
269 	.disable_vblank = radeon_disable_vblank,
270 	.master_create = radeon_master_create,
271 	.master_destroy = radeon_master_destroy,
272 	.irq_preinstall = radeon_driver_irq_preinstall,
273 	.irq_postinstall = radeon_driver_irq_postinstall,
274 	.irq_uninstall = radeon_driver_irq_uninstall,
275 	.irq_handler = radeon_driver_irq_handler,
276 	.ioctls = radeon_ioctls,
277 	.dma_ioctl = radeon_cp_buffers,
278 	.fops = &radeon_driver_old_fops,
279 	.name = DRIVER_NAME,
280 	.desc = DRIVER_DESC,
281 	.date = DRIVER_DATE,
282 	.major = DRIVER_MAJOR,
283 	.minor = DRIVER_MINOR,
284 	.patchlevel = DRIVER_PATCHLEVEL,
285 };
286 
287 static struct drm_driver kms_driver;
288 
289 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
290 {
291 	struct apertures_struct *ap;
292 	bool primary = false;
293 
294 	ap = alloc_apertures(1);
295 	if (!ap)
296 		return -ENOMEM;
297 
298 	ap->ranges[0].base = pci_resource_start(pdev, 0);
299 	ap->ranges[0].size = pci_resource_len(pdev, 0);
300 
301 #ifdef CONFIG_X86
302 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
303 #endif
304 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
305 	kfree(ap);
306 
307 	return 0;
308 }
309 
310 static int radeon_pci_probe(struct pci_dev *pdev,
311 			    const struct pci_device_id *ent)
312 {
313 	int ret;
314 
315 	/* Get rid of things like offb */
316 	ret = radeon_kick_out_firmware_fb(pdev);
317 	if (ret)
318 		return ret;
319 
320 	return drm_get_pci_dev(pdev, ent, &kms_driver);
321 }
322 
323 static void
324 radeon_pci_remove(struct pci_dev *pdev)
325 {
326 	struct drm_device *dev = pci_get_drvdata(pdev);
327 
328 	drm_put_dev(dev);
329 }
330 
331 static int
332 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
333 {
334 	struct drm_device *dev = pci_get_drvdata(pdev);
335 	return radeon_suspend_kms(dev, state);
336 }
337 
338 static int
339 radeon_pci_resume(struct pci_dev *pdev)
340 {
341 	struct drm_device *dev = pci_get_drvdata(pdev);
342 	return radeon_resume_kms(dev);
343 }
344 
345 static const struct file_operations radeon_driver_kms_fops = {
346 	.owner = THIS_MODULE,
347 	.open = drm_open,
348 	.release = drm_release,
349 	.unlocked_ioctl = drm_ioctl,
350 	.mmap = radeon_mmap,
351 	.poll = drm_poll,
352 	.fasync = drm_fasync,
353 	.read = drm_read,
354 #ifdef CONFIG_COMPAT
355 	.compat_ioctl = radeon_kms_compat_ioctl,
356 #endif
357 };
358 
359 static struct drm_driver kms_driver = {
360 	.driver_features =
361 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
362 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
363 	    DRIVER_PRIME,
364 	.dev_priv_size = 0,
365 	.load = radeon_driver_load_kms,
366 	.firstopen = radeon_driver_firstopen_kms,
367 	.open = radeon_driver_open_kms,
368 	.preclose = radeon_driver_preclose_kms,
369 	.postclose = radeon_driver_postclose_kms,
370 	.lastclose = radeon_driver_lastclose_kms,
371 	.unload = radeon_driver_unload_kms,
372 	.suspend = radeon_suspend_kms,
373 	.resume = radeon_resume_kms,
374 	.get_vblank_counter = radeon_get_vblank_counter_kms,
375 	.enable_vblank = radeon_enable_vblank_kms,
376 	.disable_vblank = radeon_disable_vblank_kms,
377 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
378 	.get_scanout_position = radeon_get_crtc_scanoutpos,
379 #if defined(CONFIG_DEBUG_FS)
380 	.debugfs_init = radeon_debugfs_init,
381 	.debugfs_cleanup = radeon_debugfs_cleanup,
382 #endif
383 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
384 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
385 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
386 	.irq_handler = radeon_driver_irq_handler_kms,
387 	.ioctls = radeon_ioctls_kms,
388 	.gem_init_object = radeon_gem_object_init,
389 	.gem_free_object = radeon_gem_object_free,
390 	.gem_open_object = radeon_gem_object_open,
391 	.gem_close_object = radeon_gem_object_close,
392 	.dma_ioctl = radeon_dma_ioctl_kms,
393 	.dumb_create = radeon_mode_dumb_create,
394 	.dumb_map_offset = radeon_mode_dumb_mmap,
395 	.dumb_destroy = radeon_mode_dumb_destroy,
396 	.fops = &radeon_driver_kms_fops,
397 
398 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
399 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
400 	.gem_prime_export = radeon_gem_prime_export,
401 	.gem_prime_import = radeon_gem_prime_import,
402 
403 	.name = DRIVER_NAME,
404 	.desc = DRIVER_DESC,
405 	.date = DRIVER_DATE,
406 	.major = KMS_DRIVER_MAJOR,
407 	.minor = KMS_DRIVER_MINOR,
408 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
409 };
410 
411 static struct drm_driver *driver;
412 static struct pci_driver *pdriver;
413 
414 static struct pci_driver radeon_pci_driver = {
415 	.name = DRIVER_NAME,
416 	.id_table = pciidlist,
417 };
418 
419 static struct pci_driver radeon_kms_pci_driver = {
420 	.name = DRIVER_NAME,
421 	.id_table = pciidlist,
422 	.probe = radeon_pci_probe,
423 	.remove = radeon_pci_remove,
424 	.suspend = radeon_pci_suspend,
425 	.resume = radeon_pci_resume,
426 };
427 
428 static int __init radeon_init(void)
429 {
430 	driver = &driver_old;
431 	pdriver = &radeon_pci_driver;
432 	driver->num_ioctls = radeon_max_ioctl;
433 #ifdef CONFIG_VGA_CONSOLE
434 	if (vgacon_text_force() && radeon_modeset == -1) {
435 		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
436 		driver = &driver_old;
437 		pdriver = &radeon_pci_driver;
438 		driver->driver_features &= ~DRIVER_MODESET;
439 		radeon_modeset = 0;
440 	}
441 #endif
442 	/* if enabled by default */
443 	if (radeon_modeset == -1) {
444 #ifdef CONFIG_DRM_RADEON_KMS
445 		DRM_INFO("radeon defaulting to kernel modesetting.\n");
446 		radeon_modeset = 1;
447 #else
448 		DRM_INFO("radeon defaulting to userspace modesetting.\n");
449 		radeon_modeset = 0;
450 #endif
451 	}
452 	if (radeon_modeset == 1) {
453 		DRM_INFO("radeon kernel modesetting enabled.\n");
454 		driver = &kms_driver;
455 		pdriver = &radeon_kms_pci_driver;
456 		driver->driver_features |= DRIVER_MODESET;
457 		driver->num_ioctls = radeon_max_kms_ioctl;
458 		radeon_register_atpx_handler();
459 	}
460 	/* if the vga console setting is enabled still
461 	 * let modprobe override it */
462 	return drm_pci_init(driver, pdriver);
463 }
464 
465 static void __exit radeon_exit(void)
466 {
467 	drm_pci_exit(driver, pdriver);
468 	radeon_unregister_atpx_handler();
469 }
470 
471 module_init(radeon_init);
472 module_exit(radeon_exit);
473 
474 MODULE_AUTHOR(DRIVER_AUTHOR);
475 MODULE_DESCRIPTION(DRIVER_DESC);
476 MODULE_LICENSE("GPL and additional rights");
477