xref: /linux/drivers/gpu/drm/radeon/radeon_drv.c (revision 5ba0a3be6ecc3a0b0d52c2a818b05564c6b42510)
1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
35 
36 #include <drm/drm_pciids.h>
37 #include <linux/console.h>
38 #include <linux/module.h>
39 
40 
41 /*
42  * KMS wrapper.
43  * - 2.0.0 - initial interface
44  * - 2.1.0 - add square tiling interface
45  * - 2.2.0 - add r6xx/r7xx const buffer support
46  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47  * - 2.4.0 - add crtc id query
48  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
50  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
51  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
52  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
53  *   2.10.0 - fusion 2D tiling
54  *   2.11.0 - backend map, initial compute support for the CS checker
55  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
56  *   2.13.0 - virtual memory support, streamout
57  *   2.14.0 - add evergreen tiling informations
58  *   2.15.0 - add max_pipes query
59  *   2.16.0 - fix evergreen 2D tiled surface calculation
60  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
61  *   2.18.0 - r600-eg: allow "invalid" DB formats
62  *   2.19.0 - r600-eg: MSAA textures
63  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
64  *   2.21.0 - r600-r700: FMASK and CMASK
65  *   2.22.0 - r600 only: RESOLVE_BOX allowed
66  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
67  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
68  *   2.25.0 - eg+: new info request for num SE and num SH
69  *   2.26.0 - r600-eg: fix htile size computation
70  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
71  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
72  */
73 #define KMS_DRIVER_MAJOR	2
74 #define KMS_DRIVER_MINOR	28
75 #define KMS_DRIVER_PATCHLEVEL	0
76 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
77 int radeon_driver_unload_kms(struct drm_device *dev);
78 int radeon_driver_firstopen_kms(struct drm_device *dev);
79 void radeon_driver_lastclose_kms(struct drm_device *dev);
80 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
81 void radeon_driver_postclose_kms(struct drm_device *dev,
82 				 struct drm_file *file_priv);
83 void radeon_driver_preclose_kms(struct drm_device *dev,
84 				struct drm_file *file_priv);
85 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
86 int radeon_resume_kms(struct drm_device *dev);
87 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
88 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
89 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
90 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
91 				    int *max_error,
92 				    struct timeval *vblank_time,
93 				    unsigned flags);
94 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
95 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
96 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
97 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
98 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
99 			 struct drm_file *file_priv);
100 int radeon_gem_object_init(struct drm_gem_object *obj);
101 void radeon_gem_object_free(struct drm_gem_object *obj);
102 int radeon_gem_object_open(struct drm_gem_object *obj,
103 				struct drm_file *file_priv);
104 void radeon_gem_object_close(struct drm_gem_object *obj,
105 				struct drm_file *file_priv);
106 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
107 				      int *vpos, int *hpos);
108 extern struct drm_ioctl_desc radeon_ioctls_kms[];
109 extern int radeon_max_kms_ioctl;
110 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
111 int radeon_mode_dumb_mmap(struct drm_file *filp,
112 			  struct drm_device *dev,
113 			  uint32_t handle, uint64_t *offset_p);
114 int radeon_mode_dumb_create(struct drm_file *file_priv,
115 			    struct drm_device *dev,
116 			    struct drm_mode_create_dumb *args);
117 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
118 			     struct drm_device *dev,
119 			     uint32_t handle);
120 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
121 					struct drm_gem_object *obj,
122 					int flags);
123 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
124 					       struct dma_buf *dma_buf);
125 
126 #if defined(CONFIG_DEBUG_FS)
127 int radeon_debugfs_init(struct drm_minor *minor);
128 void radeon_debugfs_cleanup(struct drm_minor *minor);
129 #endif
130 
131 
132 int radeon_no_wb;
133 int radeon_modeset = -1;
134 int radeon_dynclks = -1;
135 int radeon_r4xx_atom = 0;
136 int radeon_agpmode = 0;
137 int radeon_vram_limit = 0;
138 int radeon_gart_size = 512; /* default gart size */
139 int radeon_benchmarking = 0;
140 int radeon_testing = 0;
141 int radeon_connector_table = 0;
142 int radeon_tv = 1;
143 int radeon_audio = 0;
144 int radeon_disp_priority = 0;
145 int radeon_hw_i2c = 0;
146 int radeon_pcie_gen2 = -1;
147 int radeon_msi = -1;
148 int radeon_lockup_timeout = 10000;
149 
150 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
151 module_param_named(no_wb, radeon_no_wb, int, 0444);
152 
153 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
154 module_param_named(modeset, radeon_modeset, int, 0400);
155 
156 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
157 module_param_named(dynclks, radeon_dynclks, int, 0444);
158 
159 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
160 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
161 
162 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
163 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
164 
165 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
166 module_param_named(agpmode, radeon_agpmode, int, 0444);
167 
168 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
169 module_param_named(gartsize, radeon_gart_size, int, 0600);
170 
171 MODULE_PARM_DESC(benchmark, "Run benchmark");
172 module_param_named(benchmark, radeon_benchmarking, int, 0444);
173 
174 MODULE_PARM_DESC(test, "Run tests");
175 module_param_named(test, radeon_testing, int, 0444);
176 
177 MODULE_PARM_DESC(connector_table, "Force connector table");
178 module_param_named(connector_table, radeon_connector_table, int, 0444);
179 
180 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
181 module_param_named(tv, radeon_tv, int, 0444);
182 
183 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
184 module_param_named(audio, radeon_audio, int, 0444);
185 
186 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
187 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
188 
189 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
190 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
191 
192 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
193 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
194 
195 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
196 module_param_named(msi, radeon_msi, int, 0444);
197 
198 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
199 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
200 
201 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
202 {
203 	drm_radeon_private_t *dev_priv = dev->dev_private;
204 
205 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
206 		return 0;
207 
208 	/* Disable *all* interrupts */
209 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
210 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
211 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
212 	return 0;
213 }
214 
215 static int radeon_resume(struct drm_device *dev)
216 {
217 	drm_radeon_private_t *dev_priv = dev->dev_private;
218 
219 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
220 		return 0;
221 
222 	/* Restore interrupt registers */
223 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
224 		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
225 	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
226 	return 0;
227 }
228 
229 static struct pci_device_id pciidlist[] = {
230 	radeon_PCI_IDS
231 };
232 
233 #if defined(CONFIG_DRM_RADEON_KMS)
234 MODULE_DEVICE_TABLE(pci, pciidlist);
235 #endif
236 
237 static const struct file_operations radeon_driver_old_fops = {
238 	.owner = THIS_MODULE,
239 	.open = drm_open,
240 	.release = drm_release,
241 	.unlocked_ioctl = drm_ioctl,
242 	.mmap = drm_mmap,
243 	.poll = drm_poll,
244 	.fasync = drm_fasync,
245 	.read = drm_read,
246 #ifdef CONFIG_COMPAT
247 	.compat_ioctl = radeon_compat_ioctl,
248 #endif
249 	.llseek = noop_llseek,
250 };
251 
252 static struct drm_driver driver_old = {
253 	.driver_features =
254 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
255 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
256 	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
257 	.load = radeon_driver_load,
258 	.firstopen = radeon_driver_firstopen,
259 	.open = radeon_driver_open,
260 	.preclose = radeon_driver_preclose,
261 	.postclose = radeon_driver_postclose,
262 	.lastclose = radeon_driver_lastclose,
263 	.unload = radeon_driver_unload,
264 	.suspend = radeon_suspend,
265 	.resume = radeon_resume,
266 	.get_vblank_counter = radeon_get_vblank_counter,
267 	.enable_vblank = radeon_enable_vblank,
268 	.disable_vblank = radeon_disable_vblank,
269 	.master_create = radeon_master_create,
270 	.master_destroy = radeon_master_destroy,
271 	.irq_preinstall = radeon_driver_irq_preinstall,
272 	.irq_postinstall = radeon_driver_irq_postinstall,
273 	.irq_uninstall = radeon_driver_irq_uninstall,
274 	.irq_handler = radeon_driver_irq_handler,
275 	.ioctls = radeon_ioctls,
276 	.dma_ioctl = radeon_cp_buffers,
277 	.fops = &radeon_driver_old_fops,
278 	.name = DRIVER_NAME,
279 	.desc = DRIVER_DESC,
280 	.date = DRIVER_DATE,
281 	.major = DRIVER_MAJOR,
282 	.minor = DRIVER_MINOR,
283 	.patchlevel = DRIVER_PATCHLEVEL,
284 };
285 
286 static struct drm_driver kms_driver;
287 
288 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
289 {
290 	struct apertures_struct *ap;
291 	bool primary = false;
292 
293 	ap = alloc_apertures(1);
294 	if (!ap)
295 		return -ENOMEM;
296 
297 	ap->ranges[0].base = pci_resource_start(pdev, 0);
298 	ap->ranges[0].size = pci_resource_len(pdev, 0);
299 
300 #ifdef CONFIG_X86
301 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
302 #endif
303 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
304 	kfree(ap);
305 
306 	return 0;
307 }
308 
309 static int radeon_pci_probe(struct pci_dev *pdev,
310 			    const struct pci_device_id *ent)
311 {
312 	int ret;
313 
314 	/* Get rid of things like offb */
315 	ret = radeon_kick_out_firmware_fb(pdev);
316 	if (ret)
317 		return ret;
318 
319 	return drm_get_pci_dev(pdev, ent, &kms_driver);
320 }
321 
322 static void
323 radeon_pci_remove(struct pci_dev *pdev)
324 {
325 	struct drm_device *dev = pci_get_drvdata(pdev);
326 
327 	drm_put_dev(dev);
328 }
329 
330 static int
331 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
332 {
333 	struct drm_device *dev = pci_get_drvdata(pdev);
334 	return radeon_suspend_kms(dev, state);
335 }
336 
337 static int
338 radeon_pci_resume(struct pci_dev *pdev)
339 {
340 	struct drm_device *dev = pci_get_drvdata(pdev);
341 	return radeon_resume_kms(dev);
342 }
343 
344 static const struct file_operations radeon_driver_kms_fops = {
345 	.owner = THIS_MODULE,
346 	.open = drm_open,
347 	.release = drm_release,
348 	.unlocked_ioctl = drm_ioctl,
349 	.mmap = radeon_mmap,
350 	.poll = drm_poll,
351 	.fasync = drm_fasync,
352 	.read = drm_read,
353 #ifdef CONFIG_COMPAT
354 	.compat_ioctl = radeon_kms_compat_ioctl,
355 #endif
356 };
357 
358 static struct drm_driver kms_driver = {
359 	.driver_features =
360 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
361 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
362 	    DRIVER_PRIME,
363 	.dev_priv_size = 0,
364 	.load = radeon_driver_load_kms,
365 	.firstopen = radeon_driver_firstopen_kms,
366 	.open = radeon_driver_open_kms,
367 	.preclose = radeon_driver_preclose_kms,
368 	.postclose = radeon_driver_postclose_kms,
369 	.lastclose = radeon_driver_lastclose_kms,
370 	.unload = radeon_driver_unload_kms,
371 	.suspend = radeon_suspend_kms,
372 	.resume = radeon_resume_kms,
373 	.get_vblank_counter = radeon_get_vblank_counter_kms,
374 	.enable_vblank = radeon_enable_vblank_kms,
375 	.disable_vblank = radeon_disable_vblank_kms,
376 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
377 	.get_scanout_position = radeon_get_crtc_scanoutpos,
378 #if defined(CONFIG_DEBUG_FS)
379 	.debugfs_init = radeon_debugfs_init,
380 	.debugfs_cleanup = radeon_debugfs_cleanup,
381 #endif
382 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
383 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
384 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
385 	.irq_handler = radeon_driver_irq_handler_kms,
386 	.ioctls = radeon_ioctls_kms,
387 	.gem_init_object = radeon_gem_object_init,
388 	.gem_free_object = radeon_gem_object_free,
389 	.gem_open_object = radeon_gem_object_open,
390 	.gem_close_object = radeon_gem_object_close,
391 	.dma_ioctl = radeon_dma_ioctl_kms,
392 	.dumb_create = radeon_mode_dumb_create,
393 	.dumb_map_offset = radeon_mode_dumb_mmap,
394 	.dumb_destroy = radeon_mode_dumb_destroy,
395 	.fops = &radeon_driver_kms_fops,
396 
397 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
398 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
399 	.gem_prime_export = radeon_gem_prime_export,
400 	.gem_prime_import = radeon_gem_prime_import,
401 
402 	.name = DRIVER_NAME,
403 	.desc = DRIVER_DESC,
404 	.date = DRIVER_DATE,
405 	.major = KMS_DRIVER_MAJOR,
406 	.minor = KMS_DRIVER_MINOR,
407 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
408 };
409 
410 static struct drm_driver *driver;
411 static struct pci_driver *pdriver;
412 
413 static struct pci_driver radeon_pci_driver = {
414 	.name = DRIVER_NAME,
415 	.id_table = pciidlist,
416 };
417 
418 static struct pci_driver radeon_kms_pci_driver = {
419 	.name = DRIVER_NAME,
420 	.id_table = pciidlist,
421 	.probe = radeon_pci_probe,
422 	.remove = radeon_pci_remove,
423 	.suspend = radeon_pci_suspend,
424 	.resume = radeon_pci_resume,
425 };
426 
427 static int __init radeon_init(void)
428 {
429 	driver = &driver_old;
430 	pdriver = &radeon_pci_driver;
431 	driver->num_ioctls = radeon_max_ioctl;
432 #ifdef CONFIG_VGA_CONSOLE
433 	if (vgacon_text_force() && radeon_modeset == -1) {
434 		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
435 		driver = &driver_old;
436 		pdriver = &radeon_pci_driver;
437 		driver->driver_features &= ~DRIVER_MODESET;
438 		radeon_modeset = 0;
439 	}
440 #endif
441 	/* if enabled by default */
442 	if (radeon_modeset == -1) {
443 #ifdef CONFIG_DRM_RADEON_KMS
444 		DRM_INFO("radeon defaulting to kernel modesetting.\n");
445 		radeon_modeset = 1;
446 #else
447 		DRM_INFO("radeon defaulting to userspace modesetting.\n");
448 		radeon_modeset = 0;
449 #endif
450 	}
451 	if (radeon_modeset == 1) {
452 		DRM_INFO("radeon kernel modesetting enabled.\n");
453 		driver = &kms_driver;
454 		pdriver = &radeon_kms_pci_driver;
455 		driver->driver_features |= DRIVER_MODESET;
456 		driver->num_ioctls = radeon_max_kms_ioctl;
457 		radeon_register_atpx_handler();
458 	}
459 	/* if the vga console setting is enabled still
460 	 * let modprobe override it */
461 	return drm_pci_init(driver, pdriver);
462 }
463 
464 static void __exit radeon_exit(void)
465 {
466 	drm_pci_exit(driver, pdriver);
467 	radeon_unregister_atpx_handler();
468 }
469 
470 module_init(radeon_init);
471 module_exit(radeon_exit);
472 
473 MODULE_AUTHOR(DRIVER_AUTHOR);
474 MODULE_DESCRIPTION(DRIVER_DESC);
475 MODULE_LICENSE("GPL and additional rights");
476