xref: /linux/drivers/gpu/drm/radeon/radeon_drv.c (revision 148f9bb87745ed45f7a11b2cbd3bc0f017d5d257)
1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
35 
36 #include <drm/drm_pciids.h>
37 #include <linux/console.h>
38 #include <linux/module.h>
39 
40 
41 /*
42  * KMS wrapper.
43  * - 2.0.0 - initial interface
44  * - 2.1.0 - add square tiling interface
45  * - 2.2.0 - add r6xx/r7xx const buffer support
46  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47  * - 2.4.0 - add crtc id query
48  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
50  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
51  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
52  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
53  *   2.10.0 - fusion 2D tiling
54  *   2.11.0 - backend map, initial compute support for the CS checker
55  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
56  *   2.13.0 - virtual memory support, streamout
57  *   2.14.0 - add evergreen tiling informations
58  *   2.15.0 - add max_pipes query
59  *   2.16.0 - fix evergreen 2D tiled surface calculation
60  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
61  *   2.18.0 - r600-eg: allow "invalid" DB formats
62  *   2.19.0 - r600-eg: MSAA textures
63  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
64  *   2.21.0 - r600-r700: FMASK and CMASK
65  *   2.22.0 - r600 only: RESOLVE_BOX allowed
66  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
67  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
68  *   2.25.0 - eg+: new info request for num SE and num SH
69  *   2.26.0 - r600-eg: fix htile size computation
70  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
71  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
72  *   2.29.0 - R500 FP16 color clear registers
73  *   2.30.0 - fix for FMASK texturing
74  *   2.31.0 - Add fastfb support for rs690
75  *   2.32.0 - new info request for rings working
76  *   2.33.0 - Add SI tiling mode array query
77  *   2.34.0 - Add CIK tiling mode array query
78  */
79 #define KMS_DRIVER_MAJOR	2
80 #define KMS_DRIVER_MINOR	34
81 #define KMS_DRIVER_PATCHLEVEL	0
82 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
83 int radeon_driver_unload_kms(struct drm_device *dev);
84 int radeon_driver_firstopen_kms(struct drm_device *dev);
85 void radeon_driver_lastclose_kms(struct drm_device *dev);
86 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
87 void radeon_driver_postclose_kms(struct drm_device *dev,
88 				 struct drm_file *file_priv);
89 void radeon_driver_preclose_kms(struct drm_device *dev,
90 				struct drm_file *file_priv);
91 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
92 int radeon_resume_kms(struct drm_device *dev);
93 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
94 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
95 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
96 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
97 				    int *max_error,
98 				    struct timeval *vblank_time,
99 				    unsigned flags);
100 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
101 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
102 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
103 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
104 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
105 			 struct drm_file *file_priv);
106 int radeon_gem_object_init(struct drm_gem_object *obj);
107 void radeon_gem_object_free(struct drm_gem_object *obj);
108 int radeon_gem_object_open(struct drm_gem_object *obj,
109 				struct drm_file *file_priv);
110 void radeon_gem_object_close(struct drm_gem_object *obj,
111 				struct drm_file *file_priv);
112 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
113 				      int *vpos, int *hpos);
114 extern struct drm_ioctl_desc radeon_ioctls_kms[];
115 extern int radeon_max_kms_ioctl;
116 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
117 int radeon_mode_dumb_mmap(struct drm_file *filp,
118 			  struct drm_device *dev,
119 			  uint32_t handle, uint64_t *offset_p);
120 int radeon_mode_dumb_create(struct drm_file *file_priv,
121 			    struct drm_device *dev,
122 			    struct drm_mode_create_dumb *args);
123 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
124 			     struct drm_device *dev,
125 			     uint32_t handle);
126 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
127 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
128 							size_t size,
129 							struct sg_table *sg);
130 int radeon_gem_prime_pin(struct drm_gem_object *obj);
131 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
132 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
133 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
134 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
135 				    unsigned long arg);
136 
137 #if defined(CONFIG_DEBUG_FS)
138 int radeon_debugfs_init(struct drm_minor *minor);
139 void radeon_debugfs_cleanup(struct drm_minor *minor);
140 #endif
141 
142 /* atpx handler */
143 #if defined(CONFIG_VGA_SWITCHEROO)
144 void radeon_register_atpx_handler(void);
145 void radeon_unregister_atpx_handler(void);
146 #else
147 static inline void radeon_register_atpx_handler(void) {}
148 static inline void radeon_unregister_atpx_handler(void) {}
149 #endif
150 
151 int radeon_no_wb;
152 int radeon_modeset = -1;
153 int radeon_dynclks = -1;
154 int radeon_r4xx_atom = 0;
155 int radeon_agpmode = 0;
156 int radeon_vram_limit = 0;
157 int radeon_gart_size = 512; /* default gart size */
158 int radeon_benchmarking = 0;
159 int radeon_testing = 0;
160 int radeon_connector_table = 0;
161 int radeon_tv = 1;
162 int radeon_audio = 0;
163 int radeon_disp_priority = 0;
164 int radeon_hw_i2c = 0;
165 int radeon_pcie_gen2 = -1;
166 int radeon_msi = -1;
167 int radeon_lockup_timeout = 10000;
168 int radeon_fastfb = 0;
169 int radeon_dpm = -1;
170 
171 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
172 module_param_named(no_wb, radeon_no_wb, int, 0444);
173 
174 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
175 module_param_named(modeset, radeon_modeset, int, 0400);
176 
177 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
178 module_param_named(dynclks, radeon_dynclks, int, 0444);
179 
180 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
181 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
182 
183 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
184 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
185 
186 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
187 module_param_named(agpmode, radeon_agpmode, int, 0444);
188 
189 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
190 module_param_named(gartsize, radeon_gart_size, int, 0600);
191 
192 MODULE_PARM_DESC(benchmark, "Run benchmark");
193 module_param_named(benchmark, radeon_benchmarking, int, 0444);
194 
195 MODULE_PARM_DESC(test, "Run tests");
196 module_param_named(test, radeon_testing, int, 0444);
197 
198 MODULE_PARM_DESC(connector_table, "Force connector table");
199 module_param_named(connector_table, radeon_connector_table, int, 0444);
200 
201 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
202 module_param_named(tv, radeon_tv, int, 0444);
203 
204 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
205 module_param_named(audio, radeon_audio, int, 0444);
206 
207 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
208 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
209 
210 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
211 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
212 
213 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
214 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
215 
216 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
217 module_param_named(msi, radeon_msi, int, 0444);
218 
219 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
220 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
221 
222 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
223 module_param_named(fastfb, radeon_fastfb, int, 0444);
224 
225 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
226 module_param_named(dpm, radeon_dpm, int, 0444);
227 
228 static struct pci_device_id pciidlist[] = {
229 	radeon_PCI_IDS
230 };
231 
232 MODULE_DEVICE_TABLE(pci, pciidlist);
233 
234 #ifdef CONFIG_DRM_RADEON_UMS
235 
236 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
237 {
238 	drm_radeon_private_t *dev_priv = dev->dev_private;
239 
240 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
241 		return 0;
242 
243 	/* Disable *all* interrupts */
244 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
245 		RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
246 	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
247 	return 0;
248 }
249 
250 static int radeon_resume(struct drm_device *dev)
251 {
252 	drm_radeon_private_t *dev_priv = dev->dev_private;
253 
254 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
255 		return 0;
256 
257 	/* Restore interrupt registers */
258 	if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
259 		RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
260 	RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
261 	return 0;
262 }
263 
264 static const struct file_operations radeon_driver_old_fops = {
265 	.owner = THIS_MODULE,
266 	.open = drm_open,
267 	.release = drm_release,
268 	.unlocked_ioctl = drm_ioctl,
269 	.mmap = drm_mmap,
270 	.poll = drm_poll,
271 	.fasync = drm_fasync,
272 	.read = drm_read,
273 #ifdef CONFIG_COMPAT
274 	.compat_ioctl = radeon_compat_ioctl,
275 #endif
276 	.llseek = noop_llseek,
277 };
278 
279 static struct drm_driver driver_old = {
280 	.driver_features =
281 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
282 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
283 	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
284 	.load = radeon_driver_load,
285 	.firstopen = radeon_driver_firstopen,
286 	.open = radeon_driver_open,
287 	.preclose = radeon_driver_preclose,
288 	.postclose = radeon_driver_postclose,
289 	.lastclose = radeon_driver_lastclose,
290 	.unload = radeon_driver_unload,
291 	.suspend = radeon_suspend,
292 	.resume = radeon_resume,
293 	.get_vblank_counter = radeon_get_vblank_counter,
294 	.enable_vblank = radeon_enable_vblank,
295 	.disable_vblank = radeon_disable_vblank,
296 	.master_create = radeon_master_create,
297 	.master_destroy = radeon_master_destroy,
298 	.irq_preinstall = radeon_driver_irq_preinstall,
299 	.irq_postinstall = radeon_driver_irq_postinstall,
300 	.irq_uninstall = radeon_driver_irq_uninstall,
301 	.irq_handler = radeon_driver_irq_handler,
302 	.ioctls = radeon_ioctls,
303 	.dma_ioctl = radeon_cp_buffers,
304 	.fops = &radeon_driver_old_fops,
305 	.name = DRIVER_NAME,
306 	.desc = DRIVER_DESC,
307 	.date = DRIVER_DATE,
308 	.major = DRIVER_MAJOR,
309 	.minor = DRIVER_MINOR,
310 	.patchlevel = DRIVER_PATCHLEVEL,
311 };
312 
313 #endif
314 
315 static struct drm_driver kms_driver;
316 
317 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
318 {
319 	struct apertures_struct *ap;
320 	bool primary = false;
321 
322 	ap = alloc_apertures(1);
323 	if (!ap)
324 		return -ENOMEM;
325 
326 	ap->ranges[0].base = pci_resource_start(pdev, 0);
327 	ap->ranges[0].size = pci_resource_len(pdev, 0);
328 
329 #ifdef CONFIG_X86
330 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
331 #endif
332 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
333 	kfree(ap);
334 
335 	return 0;
336 }
337 
338 static int radeon_pci_probe(struct pci_dev *pdev,
339 			    const struct pci_device_id *ent)
340 {
341 	int ret;
342 
343 	/* Get rid of things like offb */
344 	ret = radeon_kick_out_firmware_fb(pdev);
345 	if (ret)
346 		return ret;
347 
348 	return drm_get_pci_dev(pdev, ent, &kms_driver);
349 }
350 
351 static void
352 radeon_pci_remove(struct pci_dev *pdev)
353 {
354 	struct drm_device *dev = pci_get_drvdata(pdev);
355 
356 	drm_put_dev(dev);
357 }
358 
359 static int
360 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
361 {
362 	struct drm_device *dev = pci_get_drvdata(pdev);
363 	return radeon_suspend_kms(dev, state);
364 }
365 
366 static int
367 radeon_pci_resume(struct pci_dev *pdev)
368 {
369 	struct drm_device *dev = pci_get_drvdata(pdev);
370 	return radeon_resume_kms(dev);
371 }
372 
373 static const struct file_operations radeon_driver_kms_fops = {
374 	.owner = THIS_MODULE,
375 	.open = drm_open,
376 	.release = drm_release,
377 	.unlocked_ioctl = drm_ioctl,
378 	.mmap = radeon_mmap,
379 	.poll = drm_poll,
380 	.fasync = drm_fasync,
381 	.read = drm_read,
382 #ifdef CONFIG_COMPAT
383 	.compat_ioctl = radeon_kms_compat_ioctl,
384 #endif
385 };
386 
387 static struct drm_driver kms_driver = {
388 	.driver_features =
389 	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
390 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
391 	    DRIVER_PRIME,
392 	.dev_priv_size = 0,
393 	.load = radeon_driver_load_kms,
394 	.firstopen = radeon_driver_firstopen_kms,
395 	.open = radeon_driver_open_kms,
396 	.preclose = radeon_driver_preclose_kms,
397 	.postclose = radeon_driver_postclose_kms,
398 	.lastclose = radeon_driver_lastclose_kms,
399 	.unload = radeon_driver_unload_kms,
400 	.suspend = radeon_suspend_kms,
401 	.resume = radeon_resume_kms,
402 	.get_vblank_counter = radeon_get_vblank_counter_kms,
403 	.enable_vblank = radeon_enable_vblank_kms,
404 	.disable_vblank = radeon_disable_vblank_kms,
405 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
406 	.get_scanout_position = radeon_get_crtc_scanoutpos,
407 #if defined(CONFIG_DEBUG_FS)
408 	.debugfs_init = radeon_debugfs_init,
409 	.debugfs_cleanup = radeon_debugfs_cleanup,
410 #endif
411 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
412 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
413 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
414 	.irq_handler = radeon_driver_irq_handler_kms,
415 	.ioctls = radeon_ioctls_kms,
416 	.gem_init_object = radeon_gem_object_init,
417 	.gem_free_object = radeon_gem_object_free,
418 	.gem_open_object = radeon_gem_object_open,
419 	.gem_close_object = radeon_gem_object_close,
420 	.dma_ioctl = radeon_dma_ioctl_kms,
421 	.dumb_create = radeon_mode_dumb_create,
422 	.dumb_map_offset = radeon_mode_dumb_mmap,
423 	.dumb_destroy = radeon_mode_dumb_destroy,
424 	.fops = &radeon_driver_kms_fops,
425 
426 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
427 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
428 	.gem_prime_export = drm_gem_prime_export,
429 	.gem_prime_import = drm_gem_prime_import,
430 	.gem_prime_pin = radeon_gem_prime_pin,
431 	.gem_prime_unpin = radeon_gem_prime_unpin,
432 	.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
433 	.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
434 	.gem_prime_vmap = radeon_gem_prime_vmap,
435 	.gem_prime_vunmap = radeon_gem_prime_vunmap,
436 
437 	.name = DRIVER_NAME,
438 	.desc = DRIVER_DESC,
439 	.date = DRIVER_DATE,
440 	.major = KMS_DRIVER_MAJOR,
441 	.minor = KMS_DRIVER_MINOR,
442 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
443 };
444 
445 static struct drm_driver *driver;
446 static struct pci_driver *pdriver;
447 
448 #ifdef CONFIG_DRM_RADEON_UMS
449 static struct pci_driver radeon_pci_driver = {
450 	.name = DRIVER_NAME,
451 	.id_table = pciidlist,
452 };
453 #endif
454 
455 static struct pci_driver radeon_kms_pci_driver = {
456 	.name = DRIVER_NAME,
457 	.id_table = pciidlist,
458 	.probe = radeon_pci_probe,
459 	.remove = radeon_pci_remove,
460 	.suspend = radeon_pci_suspend,
461 	.resume = radeon_pci_resume,
462 };
463 
464 static int __init radeon_init(void)
465 {
466 #ifdef CONFIG_VGA_CONSOLE
467 	if (vgacon_text_force() && radeon_modeset == -1) {
468 		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
469 		radeon_modeset = 0;
470 	}
471 #endif
472 	/* set to modesetting by default if not nomodeset */
473 	if (radeon_modeset == -1)
474 		radeon_modeset = 1;
475 
476 	if (radeon_modeset == 1) {
477 		DRM_INFO("radeon kernel modesetting enabled.\n");
478 		driver = &kms_driver;
479 		pdriver = &radeon_kms_pci_driver;
480 		driver->driver_features |= DRIVER_MODESET;
481 		driver->num_ioctls = radeon_max_kms_ioctl;
482 		radeon_register_atpx_handler();
483 
484 	} else {
485 #ifdef CONFIG_DRM_RADEON_UMS
486 		DRM_INFO("radeon userspace modesetting enabled.\n");
487 		driver = &driver_old;
488 		pdriver = &radeon_pci_driver;
489 		driver->driver_features &= ~DRIVER_MODESET;
490 		driver->num_ioctls = radeon_max_ioctl;
491 #else
492 		DRM_ERROR("No UMS support in radeon module!\n");
493 		return -EINVAL;
494 #endif
495 	}
496 
497 	/* let modprobe override vga console setting */
498 	return drm_pci_init(driver, pdriver);
499 }
500 
501 static void __exit radeon_exit(void)
502 {
503 	drm_pci_exit(driver, pdriver);
504 	radeon_unregister_atpx_handler();
505 }
506 
507 module_init(radeon_init);
508 module_exit(radeon_exit);
509 
510 MODULE_AUTHOR(DRIVER_AUTHOR);
511 MODULE_DESCRIPTION(DRIVER_DESC);
512 MODULE_LICENSE("GPL and additional rights");
513