xref: /linux/drivers/gpu/drm/radeon/radeon_drv.c (revision 110e6f26af80dfd90b6e5c645b1aed7228aa580d)
1 /**
2  * \file radeon_drv.c
3  * ATI Radeon driver
4  *
5  * \author Gareth Hughes <gareth@valinux.com>
6  */
7 
8 /*
9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10  * All Rights Reserved.
11  *
12  * Permission is hereby granted, free of charge, to any person obtaining a
13  * copy of this software and associated documentation files (the "Software"),
14  * to deal in the Software without restriction, including without limitation
15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16  * and/or sell copies of the Software, and to permit persons to whom the
17  * Software is furnished to do so, subject to the following conditions:
18  *
19  * The above copyright notice and this permission notice (including the next
20  * paragraph) shall be included in all copies or substantial portions of the
21  * Software.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29  * OTHER DEALINGS IN THE SOFTWARE.
30  */
31 
32 #include <drm/drmP.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
35 
36 #include <drm/drm_pciids.h>
37 #include <linux/apple-gmux.h>
38 #include <linux/console.h>
39 #include <linux/module.h>
40 #include <linux/pm_runtime.h>
41 #include <linux/vgaarb.h>
42 #include <linux/vga_switcheroo.h>
43 #include <drm/drm_gem.h>
44 
45 #include "drm_crtc_helper.h"
46 #include "radeon_kfd.h"
47 
48 /*
49  * KMS wrapper.
50  * - 2.0.0 - initial interface
51  * - 2.1.0 - add square tiling interface
52  * - 2.2.0 - add r6xx/r7xx const buffer support
53  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
54  * - 2.4.0 - add crtc id query
55  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
56  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
57  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
59  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
60  *   2.10.0 - fusion 2D tiling
61  *   2.11.0 - backend map, initial compute support for the CS checker
62  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
63  *   2.13.0 - virtual memory support, streamout
64  *   2.14.0 - add evergreen tiling informations
65  *   2.15.0 - add max_pipes query
66  *   2.16.0 - fix evergreen 2D tiled surface calculation
67  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
68  *   2.18.0 - r600-eg: allow "invalid" DB formats
69  *   2.19.0 - r600-eg: MSAA textures
70  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
71  *   2.21.0 - r600-r700: FMASK and CMASK
72  *   2.22.0 - r600 only: RESOLVE_BOX allowed
73  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
74  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
75  *   2.25.0 - eg+: new info request for num SE and num SH
76  *   2.26.0 - r600-eg: fix htile size computation
77  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
78  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
79  *   2.29.0 - R500 FP16 color clear registers
80  *   2.30.0 - fix for FMASK texturing
81  *   2.31.0 - Add fastfb support for rs690
82  *   2.32.0 - new info request for rings working
83  *   2.33.0 - Add SI tiling mode array query
84  *   2.34.0 - Add CIK tiling mode array query
85  *   2.35.0 - Add CIK macrotile mode array query
86  *   2.36.0 - Fix CIK DCE tiling setup
87  *   2.37.0 - allow GS ring setup on r6xx/r7xx
88  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
89  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
90  *   2.39.0 - Add INFO query for number of active CUs
91  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
92  *            CS to GPU on >= r600
93  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
94  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
95  *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
96  *   2.44.0 - SET_APPEND_CNT packet3 support
97  */
98 #define KMS_DRIVER_MAJOR	2
99 #define KMS_DRIVER_MINOR	44
100 #define KMS_DRIVER_PATCHLEVEL	0
101 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
102 int radeon_driver_unload_kms(struct drm_device *dev);
103 void radeon_driver_lastclose_kms(struct drm_device *dev);
104 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
105 void radeon_driver_postclose_kms(struct drm_device *dev,
106 				 struct drm_file *file_priv);
107 void radeon_driver_preclose_kms(struct drm_device *dev,
108 				struct drm_file *file_priv);
109 int radeon_suspend_kms(struct drm_device *dev, bool suspend,
110 		       bool fbcon, bool freeze);
111 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
112 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
113 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
114 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
115 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
116 				    int *max_error,
117 				    struct timeval *vblank_time,
118 				    unsigned flags);
119 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
120 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
121 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
122 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
123 void radeon_gem_object_free(struct drm_gem_object *obj);
124 int radeon_gem_object_open(struct drm_gem_object *obj,
125 				struct drm_file *file_priv);
126 void radeon_gem_object_close(struct drm_gem_object *obj,
127 				struct drm_file *file_priv);
128 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
129 					struct drm_gem_object *gobj,
130 					int flags);
131 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
132 				      unsigned int flags, int *vpos, int *hpos,
133 				      ktime_t *stime, ktime_t *etime,
134 				      const struct drm_display_mode *mode);
135 extern bool radeon_is_px(struct drm_device *dev);
136 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
137 extern int radeon_max_kms_ioctl;
138 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
139 int radeon_mode_dumb_mmap(struct drm_file *filp,
140 			  struct drm_device *dev,
141 			  uint32_t handle, uint64_t *offset_p);
142 int radeon_mode_dumb_create(struct drm_file *file_priv,
143 			    struct drm_device *dev,
144 			    struct drm_mode_create_dumb *args);
145 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
146 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
147 							struct dma_buf_attachment *,
148 							struct sg_table *sg);
149 int radeon_gem_prime_pin(struct drm_gem_object *obj);
150 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
151 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
152 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
153 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
154 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
155 				    unsigned long arg);
156 
157 #if defined(CONFIG_DEBUG_FS)
158 int radeon_debugfs_init(struct drm_minor *minor);
159 void radeon_debugfs_cleanup(struct drm_minor *minor);
160 #endif
161 
162 /* atpx handler */
163 #if defined(CONFIG_VGA_SWITCHEROO)
164 void radeon_register_atpx_handler(void);
165 void radeon_unregister_atpx_handler(void);
166 #else
167 static inline void radeon_register_atpx_handler(void) {}
168 static inline void radeon_unregister_atpx_handler(void) {}
169 #endif
170 
171 int radeon_no_wb;
172 int radeon_modeset = -1;
173 int radeon_dynclks = -1;
174 int radeon_r4xx_atom = 0;
175 int radeon_agpmode = 0;
176 int radeon_vram_limit = 0;
177 int radeon_gart_size = -1; /* auto */
178 int radeon_benchmarking = 0;
179 int radeon_testing = 0;
180 int radeon_connector_table = 0;
181 int radeon_tv = 1;
182 int radeon_audio = -1;
183 int radeon_disp_priority = 0;
184 int radeon_hw_i2c = 0;
185 int radeon_pcie_gen2 = -1;
186 int radeon_msi = -1;
187 int radeon_lockup_timeout = 10000;
188 int radeon_fastfb = 0;
189 int radeon_dpm = -1;
190 int radeon_aspm = -1;
191 int radeon_runtime_pm = -1;
192 int radeon_hard_reset = 0;
193 int radeon_vm_size = 8;
194 int radeon_vm_block_size = -1;
195 int radeon_deep_color = 0;
196 int radeon_use_pflipirq = 2;
197 int radeon_bapm = -1;
198 int radeon_backlight = -1;
199 int radeon_auxch = -1;
200 int radeon_mst = 0;
201 int radeon_uvd = 1;
202 int radeon_vce = 1;
203 
204 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
205 module_param_named(no_wb, radeon_no_wb, int, 0444);
206 
207 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
208 module_param_named(modeset, radeon_modeset, int, 0400);
209 
210 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
211 module_param_named(dynclks, radeon_dynclks, int, 0444);
212 
213 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
214 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
215 
216 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
217 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
218 
219 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
220 module_param_named(agpmode, radeon_agpmode, int, 0444);
221 
222 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
223 module_param_named(gartsize, radeon_gart_size, int, 0600);
224 
225 MODULE_PARM_DESC(benchmark, "Run benchmark");
226 module_param_named(benchmark, radeon_benchmarking, int, 0444);
227 
228 MODULE_PARM_DESC(test, "Run tests");
229 module_param_named(test, radeon_testing, int, 0444);
230 
231 MODULE_PARM_DESC(connector_table, "Force connector table");
232 module_param_named(connector_table, radeon_connector_table, int, 0444);
233 
234 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
235 module_param_named(tv, radeon_tv, int, 0444);
236 
237 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
238 module_param_named(audio, radeon_audio, int, 0444);
239 
240 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
241 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
242 
243 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
244 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
245 
246 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
247 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
248 
249 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
250 module_param_named(msi, radeon_msi, int, 0444);
251 
252 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
253 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
254 
255 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
256 module_param_named(fastfb, radeon_fastfb, int, 0444);
257 
258 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
259 module_param_named(dpm, radeon_dpm, int, 0444);
260 
261 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
262 module_param_named(aspm, radeon_aspm, int, 0444);
263 
264 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
265 module_param_named(runpm, radeon_runtime_pm, int, 0444);
266 
267 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
268 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
269 
270 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
271 module_param_named(vm_size, radeon_vm_size, int, 0444);
272 
273 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
274 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
275 
276 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
277 module_param_named(deep_color, radeon_deep_color, int, 0444);
278 
279 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
280 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
281 
282 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
283 module_param_named(bapm, radeon_bapm, int, 0444);
284 
285 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
286 module_param_named(backlight, radeon_backlight, int, 0444);
287 
288 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
289 module_param_named(auxch, radeon_auxch, int, 0444);
290 
291 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
292 module_param_named(mst, radeon_mst, int, 0444);
293 
294 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
295 module_param_named(uvd, radeon_uvd, int, 0444);
296 
297 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
298 module_param_named(vce, radeon_vce, int, 0444);
299 
300 static struct pci_device_id pciidlist[] = {
301 	radeon_PCI_IDS
302 };
303 
304 MODULE_DEVICE_TABLE(pci, pciidlist);
305 
306 static struct drm_driver kms_driver;
307 
308 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
309 {
310 	struct apertures_struct *ap;
311 	bool primary = false;
312 
313 	ap = alloc_apertures(1);
314 	if (!ap)
315 		return -ENOMEM;
316 
317 	ap->ranges[0].base = pci_resource_start(pdev, 0);
318 	ap->ranges[0].size = pci_resource_len(pdev, 0);
319 
320 #ifdef CONFIG_X86
321 	primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
322 #endif
323 	remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
324 	kfree(ap);
325 
326 	return 0;
327 }
328 
329 static int radeon_pci_probe(struct pci_dev *pdev,
330 			    const struct pci_device_id *ent)
331 {
332 	int ret;
333 
334 	/*
335 	 * Initialize amdkfd before starting radeon. If it was not loaded yet,
336 	 * defer radeon probing
337 	 */
338 	ret = radeon_kfd_init();
339 	if (ret == -EPROBE_DEFER)
340 		return ret;
341 
342 	/*
343 	 * apple-gmux is needed on dual GPU MacBook Pro
344 	 * to probe the panel if we're the inactive GPU.
345 	 */
346 	if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
347 	    apple_gmux_present() && pdev != vga_default_device() &&
348 	    !vga_switcheroo_handler_flags())
349 		return -EPROBE_DEFER;
350 
351 	/* Get rid of things like offb */
352 	ret = radeon_kick_out_firmware_fb(pdev);
353 	if (ret)
354 		return ret;
355 
356 	return drm_get_pci_dev(pdev, ent, &kms_driver);
357 }
358 
359 static void
360 radeon_pci_remove(struct pci_dev *pdev)
361 {
362 	struct drm_device *dev = pci_get_drvdata(pdev);
363 
364 	drm_put_dev(dev);
365 }
366 
367 static int radeon_pmops_suspend(struct device *dev)
368 {
369 	struct pci_dev *pdev = to_pci_dev(dev);
370 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
371 	return radeon_suspend_kms(drm_dev, true, true, false);
372 }
373 
374 static int radeon_pmops_resume(struct device *dev)
375 {
376 	struct pci_dev *pdev = to_pci_dev(dev);
377 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
378 	return radeon_resume_kms(drm_dev, true, true);
379 }
380 
381 static int radeon_pmops_freeze(struct device *dev)
382 {
383 	struct pci_dev *pdev = to_pci_dev(dev);
384 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
385 	return radeon_suspend_kms(drm_dev, false, true, true);
386 }
387 
388 static int radeon_pmops_thaw(struct device *dev)
389 {
390 	struct pci_dev *pdev = to_pci_dev(dev);
391 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
392 	return radeon_resume_kms(drm_dev, false, true);
393 }
394 
395 static int radeon_pmops_runtime_suspend(struct device *dev)
396 {
397 	struct pci_dev *pdev = to_pci_dev(dev);
398 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
399 	int ret;
400 
401 	if (!radeon_is_px(drm_dev)) {
402 		pm_runtime_forbid(dev);
403 		return -EBUSY;
404 	}
405 
406 	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
407 	drm_kms_helper_poll_disable(drm_dev);
408 	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
409 
410 	ret = radeon_suspend_kms(drm_dev, false, false, false);
411 	pci_save_state(pdev);
412 	pci_disable_device(pdev);
413 	pci_ignore_hotplug(pdev);
414 	pci_set_power_state(pdev, PCI_D3cold);
415 	drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
416 
417 	return 0;
418 }
419 
420 static int radeon_pmops_runtime_resume(struct device *dev)
421 {
422 	struct pci_dev *pdev = to_pci_dev(dev);
423 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
424 	int ret;
425 
426 	if (!radeon_is_px(drm_dev))
427 		return -EINVAL;
428 
429 	drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
430 
431 	pci_set_power_state(pdev, PCI_D0);
432 	pci_restore_state(pdev);
433 	ret = pci_enable_device(pdev);
434 	if (ret)
435 		return ret;
436 	pci_set_master(pdev);
437 
438 	ret = radeon_resume_kms(drm_dev, false, false);
439 	drm_kms_helper_poll_enable(drm_dev);
440 	vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
441 	drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
442 	return 0;
443 }
444 
445 static int radeon_pmops_runtime_idle(struct device *dev)
446 {
447 	struct pci_dev *pdev = to_pci_dev(dev);
448 	struct drm_device *drm_dev = pci_get_drvdata(pdev);
449 	struct drm_crtc *crtc;
450 
451 	if (!radeon_is_px(drm_dev)) {
452 		pm_runtime_forbid(dev);
453 		return -EBUSY;
454 	}
455 
456 	list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
457 		if (crtc->enabled) {
458 			DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
459 			return -EBUSY;
460 		}
461 	}
462 
463 	pm_runtime_mark_last_busy(dev);
464 	pm_runtime_autosuspend(dev);
465 	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */
466 	return 1;
467 }
468 
469 long radeon_drm_ioctl(struct file *filp,
470 		      unsigned int cmd, unsigned long arg)
471 {
472 	struct drm_file *file_priv = filp->private_data;
473 	struct drm_device *dev;
474 	long ret;
475 	dev = file_priv->minor->dev;
476 	ret = pm_runtime_get_sync(dev->dev);
477 	if (ret < 0)
478 		return ret;
479 
480 	ret = drm_ioctl(filp, cmd, arg);
481 
482 	pm_runtime_mark_last_busy(dev->dev);
483 	pm_runtime_put_autosuspend(dev->dev);
484 	return ret;
485 }
486 
487 static const struct dev_pm_ops radeon_pm_ops = {
488 	.suspend = radeon_pmops_suspend,
489 	.resume = radeon_pmops_resume,
490 	.freeze = radeon_pmops_freeze,
491 	.thaw = radeon_pmops_thaw,
492 	.poweroff = radeon_pmops_freeze,
493 	.restore = radeon_pmops_resume,
494 	.runtime_suspend = radeon_pmops_runtime_suspend,
495 	.runtime_resume = radeon_pmops_runtime_resume,
496 	.runtime_idle = radeon_pmops_runtime_idle,
497 };
498 
499 static const struct file_operations radeon_driver_kms_fops = {
500 	.owner = THIS_MODULE,
501 	.open = drm_open,
502 	.release = drm_release,
503 	.unlocked_ioctl = radeon_drm_ioctl,
504 	.mmap = radeon_mmap,
505 	.poll = drm_poll,
506 	.read = drm_read,
507 #ifdef CONFIG_COMPAT
508 	.compat_ioctl = radeon_kms_compat_ioctl,
509 #endif
510 };
511 
512 static struct drm_driver kms_driver = {
513 	.driver_features =
514 	    DRIVER_USE_AGP |
515 	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
516 	    DRIVER_PRIME | DRIVER_RENDER,
517 	.load = radeon_driver_load_kms,
518 	.open = radeon_driver_open_kms,
519 	.preclose = radeon_driver_preclose_kms,
520 	.postclose = radeon_driver_postclose_kms,
521 	.lastclose = radeon_driver_lastclose_kms,
522 	.set_busid = drm_pci_set_busid,
523 	.unload = radeon_driver_unload_kms,
524 	.get_vblank_counter = radeon_get_vblank_counter_kms,
525 	.enable_vblank = radeon_enable_vblank_kms,
526 	.disable_vblank = radeon_disable_vblank_kms,
527 	.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
528 	.get_scanout_position = radeon_get_crtc_scanoutpos,
529 #if defined(CONFIG_DEBUG_FS)
530 	.debugfs_init = radeon_debugfs_init,
531 	.debugfs_cleanup = radeon_debugfs_cleanup,
532 #endif
533 	.irq_preinstall = radeon_driver_irq_preinstall_kms,
534 	.irq_postinstall = radeon_driver_irq_postinstall_kms,
535 	.irq_uninstall = radeon_driver_irq_uninstall_kms,
536 	.irq_handler = radeon_driver_irq_handler_kms,
537 	.ioctls = radeon_ioctls_kms,
538 	.gem_free_object = radeon_gem_object_free,
539 	.gem_open_object = radeon_gem_object_open,
540 	.gem_close_object = radeon_gem_object_close,
541 	.dumb_create = radeon_mode_dumb_create,
542 	.dumb_map_offset = radeon_mode_dumb_mmap,
543 	.dumb_destroy = drm_gem_dumb_destroy,
544 	.fops = &radeon_driver_kms_fops,
545 
546 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
547 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
548 	.gem_prime_export = radeon_gem_prime_export,
549 	.gem_prime_import = drm_gem_prime_import,
550 	.gem_prime_pin = radeon_gem_prime_pin,
551 	.gem_prime_unpin = radeon_gem_prime_unpin,
552 	.gem_prime_res_obj = radeon_gem_prime_res_obj,
553 	.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
554 	.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
555 	.gem_prime_vmap = radeon_gem_prime_vmap,
556 	.gem_prime_vunmap = radeon_gem_prime_vunmap,
557 
558 	.name = DRIVER_NAME,
559 	.desc = DRIVER_DESC,
560 	.date = DRIVER_DATE,
561 	.major = KMS_DRIVER_MAJOR,
562 	.minor = KMS_DRIVER_MINOR,
563 	.patchlevel = KMS_DRIVER_PATCHLEVEL,
564 };
565 
566 static struct drm_driver *driver;
567 static struct pci_driver *pdriver;
568 
569 static struct pci_driver radeon_kms_pci_driver = {
570 	.name = DRIVER_NAME,
571 	.id_table = pciidlist,
572 	.probe = radeon_pci_probe,
573 	.remove = radeon_pci_remove,
574 	.driver.pm = &radeon_pm_ops,
575 };
576 
577 static int __init radeon_init(void)
578 {
579 	if (vgacon_text_force() && radeon_modeset == -1) {
580 		DRM_INFO("VGACON disable radeon kernel modesetting.\n");
581 		radeon_modeset = 0;
582 	}
583 	/* set to modesetting by default if not nomodeset */
584 	if (radeon_modeset == -1)
585 		radeon_modeset = 1;
586 
587 	if (radeon_modeset == 1) {
588 		DRM_INFO("radeon kernel modesetting enabled.\n");
589 		driver = &kms_driver;
590 		pdriver = &radeon_kms_pci_driver;
591 		driver->driver_features |= DRIVER_MODESET;
592 		driver->num_ioctls = radeon_max_kms_ioctl;
593 		radeon_register_atpx_handler();
594 
595 	} else {
596 		DRM_ERROR("No UMS support in radeon module!\n");
597 		return -EINVAL;
598 	}
599 
600 	/* let modprobe override vga console setting */
601 	return drm_pci_init(driver, pdriver);
602 }
603 
604 static void __exit radeon_exit(void)
605 {
606 	radeon_kfd_fini();
607 	drm_pci_exit(driver, pdriver);
608 	radeon_unregister_atpx_handler();
609 }
610 
611 module_init(radeon_init);
612 module_exit(radeon_exit);
613 
614 MODULE_AUTHOR(DRIVER_AUTHOR);
615 MODULE_DESCRIPTION(DRIVER_DESC);
616 MODULE_LICENSE("GPL and additional rights");
617