1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Slava Grigorev <slava.grigorev@amd.com> 23 */ 24 25 #include <linux/gcd.h> 26 #include <drm/drmP.h> 27 #include <drm/drm_crtc.h> 28 #include "radeon.h" 29 #include "atom.h" 30 #include "radeon_audio.h" 31 32 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 33 u8 enable_mask); 34 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 35 u8 enable_mask); 36 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin, 37 u8 enable_mask); 38 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg); 39 void dce6_endpoint_wreg(struct radeon_device *rdev, 40 u32 offset, u32 reg, u32 v); 41 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder, 42 struct cea_sad *sads, int sad_count); 43 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder, 44 struct cea_sad *sads, int sad_count); 45 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder, 46 struct cea_sad *sads, int sad_count); 47 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 48 u8 *sadb, int sad_count); 49 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 50 u8 *sadb, int sad_count); 51 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 52 u8 *sadb, int sad_count); 53 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 54 u8 *sadb, int sad_count); 55 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder, 56 u8 *sadb, int sad_count); 57 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder, 58 u8 *sadb, int sad_count); 59 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder, 60 struct drm_connector *connector, struct drm_display_mode *mode); 61 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 62 struct drm_connector *connector, struct drm_display_mode *mode); 63 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev); 64 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev); 65 void dce6_afmt_select_pin(struct drm_encoder *encoder); 66 void r600_hdmi_audio_set_dto(struct radeon_device *rdev, 67 struct radeon_crtc *crtc, unsigned int clock); 68 void dce3_2_audio_set_dto(struct radeon_device *rdev, 69 struct radeon_crtc *crtc, unsigned int clock); 70 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, 71 struct radeon_crtc *crtc, unsigned int clock); 72 void dce4_dp_audio_set_dto(struct radeon_device *rdev, 73 struct radeon_crtc *crtc, unsigned int clock); 74 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 75 struct radeon_crtc *crtc, unsigned int clock); 76 void dce6_dp_audio_set_dto(struct radeon_device *rdev, 77 struct radeon_crtc *crtc, unsigned int clock); 78 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, 79 unsigned char *buffer, size_t size); 80 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, 81 unsigned char *buffer, size_t size); 82 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, 83 const struct radeon_hdmi_acr *acr); 84 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset, 85 const struct radeon_hdmi_acr *acr); 86 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, 87 const struct radeon_hdmi_acr *acr); 88 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 89 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset); 90 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, 91 u32 offset, int bpc); 92 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset); 93 void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset); 94 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset); 95 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 96 void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 97 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute); 98 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 99 struct drm_display_mode *mode); 100 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 101 struct drm_display_mode *mode); 102 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 103 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 104 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 105 106 static const u32 pin_offsets[7] = 107 { 108 (0x5e00 - 0x5e00), 109 (0x5e18 - 0x5e00), 110 (0x5e30 - 0x5e00), 111 (0x5e48 - 0x5e00), 112 (0x5e60 - 0x5e00), 113 (0x5e78 - 0x5e00), 114 (0x5e90 - 0x5e00), 115 }; 116 117 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 118 { 119 return RREG32(reg); 120 } 121 122 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset, 123 u32 reg, u32 v) 124 { 125 WREG32(reg, v); 126 } 127 128 static struct radeon_audio_basic_funcs r600_funcs = { 129 .endpoint_rreg = radeon_audio_rreg, 130 .endpoint_wreg = radeon_audio_wreg, 131 .enable = r600_audio_enable, 132 }; 133 134 static struct radeon_audio_basic_funcs dce32_funcs = { 135 .endpoint_rreg = radeon_audio_rreg, 136 .endpoint_wreg = radeon_audio_wreg, 137 .enable = r600_audio_enable, 138 }; 139 140 static struct radeon_audio_basic_funcs dce4_funcs = { 141 .endpoint_rreg = radeon_audio_rreg, 142 .endpoint_wreg = radeon_audio_wreg, 143 .enable = dce4_audio_enable, 144 }; 145 146 static struct radeon_audio_basic_funcs dce6_funcs = { 147 .endpoint_rreg = dce6_endpoint_rreg, 148 .endpoint_wreg = dce6_endpoint_wreg, 149 .enable = dce6_audio_enable, 150 }; 151 152 static struct radeon_audio_funcs r600_hdmi_funcs = { 153 .get_pin = r600_audio_get_pin, 154 .set_dto = r600_hdmi_audio_set_dto, 155 .update_acr = r600_hdmi_update_acr, 156 .set_vbi_packet = r600_set_vbi_packet, 157 .set_avi_packet = r600_set_avi_packet, 158 .set_audio_packet = r600_set_audio_packet, 159 .set_mute = r600_set_mute, 160 .mode_set = radeon_audio_hdmi_mode_set, 161 .dpms = r600_hdmi_enable, 162 }; 163 164 static struct radeon_audio_funcs dce32_hdmi_funcs = { 165 .get_pin = r600_audio_get_pin, 166 .write_sad_regs = dce3_2_afmt_write_sad_regs, 167 .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation, 168 .set_dto = dce3_2_audio_set_dto, 169 .update_acr = dce3_2_hdmi_update_acr, 170 .set_vbi_packet = r600_set_vbi_packet, 171 .set_avi_packet = r600_set_avi_packet, 172 .set_audio_packet = dce3_2_set_audio_packet, 173 .set_mute = dce3_2_set_mute, 174 .mode_set = radeon_audio_hdmi_mode_set, 175 .dpms = r600_hdmi_enable, 176 }; 177 178 static struct radeon_audio_funcs dce32_dp_funcs = { 179 .get_pin = r600_audio_get_pin, 180 .write_sad_regs = dce3_2_afmt_write_sad_regs, 181 .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation, 182 .set_dto = dce3_2_audio_set_dto, 183 .set_avi_packet = r600_set_avi_packet, 184 .set_audio_packet = dce3_2_set_audio_packet, 185 }; 186 187 static struct radeon_audio_funcs dce4_hdmi_funcs = { 188 .get_pin = r600_audio_get_pin, 189 .write_sad_regs = evergreen_hdmi_write_sad_regs, 190 .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation, 191 .write_latency_fields = dce4_afmt_write_latency_fields, 192 .set_dto = dce4_hdmi_audio_set_dto, 193 .update_acr = evergreen_hdmi_update_acr, 194 .set_vbi_packet = dce4_set_vbi_packet, 195 .set_color_depth = dce4_hdmi_set_color_depth, 196 .set_avi_packet = evergreen_set_avi_packet, 197 .set_audio_packet = dce4_set_audio_packet, 198 .set_mute = dce4_set_mute, 199 .mode_set = radeon_audio_hdmi_mode_set, 200 .dpms = evergreen_hdmi_enable, 201 }; 202 203 static struct radeon_audio_funcs dce4_dp_funcs = { 204 .get_pin = r600_audio_get_pin, 205 .write_sad_regs = evergreen_hdmi_write_sad_regs, 206 .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation, 207 .write_latency_fields = dce4_afmt_write_latency_fields, 208 .set_dto = dce4_dp_audio_set_dto, 209 .set_avi_packet = evergreen_set_avi_packet, 210 .set_audio_packet = dce4_set_audio_packet, 211 .mode_set = radeon_audio_dp_mode_set, 212 .dpms = evergreen_dp_enable, 213 }; 214 215 static struct radeon_audio_funcs dce6_hdmi_funcs = { 216 .select_pin = dce6_afmt_select_pin, 217 .get_pin = dce6_audio_get_pin, 218 .write_sad_regs = dce6_afmt_write_sad_regs, 219 .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation, 220 .write_latency_fields = dce6_afmt_write_latency_fields, 221 .set_dto = dce6_hdmi_audio_set_dto, 222 .update_acr = evergreen_hdmi_update_acr, 223 .set_vbi_packet = dce4_set_vbi_packet, 224 .set_color_depth = dce4_hdmi_set_color_depth, 225 .set_avi_packet = evergreen_set_avi_packet, 226 .set_audio_packet = dce4_set_audio_packet, 227 .set_mute = dce4_set_mute, 228 .mode_set = radeon_audio_hdmi_mode_set, 229 .dpms = evergreen_hdmi_enable, 230 }; 231 232 static struct radeon_audio_funcs dce6_dp_funcs = { 233 .select_pin = dce6_afmt_select_pin, 234 .get_pin = dce6_audio_get_pin, 235 .write_sad_regs = dce6_afmt_write_sad_regs, 236 .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation, 237 .write_latency_fields = dce6_afmt_write_latency_fields, 238 .set_dto = dce6_dp_audio_set_dto, 239 .set_avi_packet = evergreen_set_avi_packet, 240 .set_audio_packet = dce4_set_audio_packet, 241 .mode_set = radeon_audio_dp_mode_set, 242 .dpms = evergreen_dp_enable, 243 }; 244 245 static void radeon_audio_enable(struct radeon_device *rdev, 246 struct r600_audio_pin *pin, u8 enable_mask) 247 { 248 if (rdev->audio.funcs->enable) 249 rdev->audio.funcs->enable(rdev, pin, enable_mask); 250 } 251 252 static void radeon_audio_interface_init(struct radeon_device *rdev) 253 { 254 if (ASIC_IS_DCE6(rdev)) { 255 rdev->audio.funcs = &dce6_funcs; 256 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs; 257 rdev->audio.dp_funcs = &dce6_dp_funcs; 258 } else if (ASIC_IS_DCE4(rdev)) { 259 rdev->audio.funcs = &dce4_funcs; 260 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs; 261 rdev->audio.dp_funcs = &dce4_dp_funcs; 262 } else if (ASIC_IS_DCE32(rdev)) { 263 rdev->audio.funcs = &dce32_funcs; 264 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs; 265 rdev->audio.dp_funcs = &dce32_dp_funcs; 266 } else { 267 rdev->audio.funcs = &r600_funcs; 268 rdev->audio.hdmi_funcs = &r600_hdmi_funcs; 269 rdev->audio.dp_funcs = 0; 270 } 271 } 272 273 static int radeon_audio_chipset_supported(struct radeon_device *rdev) 274 { 275 return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev); 276 } 277 278 int radeon_audio_init(struct radeon_device *rdev) 279 { 280 int i; 281 282 if (!radeon_audio || !radeon_audio_chipset_supported(rdev)) 283 return 0; 284 285 rdev->audio.enabled = true; 286 287 if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */ 288 rdev->audio.num_pins = 3; 289 else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */ 290 rdev->audio.num_pins = 7; 291 else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */ 292 rdev->audio.num_pins = 7; 293 else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */ 294 rdev->audio.num_pins = 2; 295 else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */ 296 rdev->audio.num_pins = 6; 297 else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */ 298 rdev->audio.num_pins = 6; 299 else 300 rdev->audio.num_pins = 1; 301 302 for (i = 0; i < rdev->audio.num_pins; i++) { 303 rdev->audio.pin[i].channels = -1; 304 rdev->audio.pin[i].rate = -1; 305 rdev->audio.pin[i].bits_per_sample = -1; 306 rdev->audio.pin[i].status_bits = 0; 307 rdev->audio.pin[i].category_code = 0; 308 rdev->audio.pin[i].connected = false; 309 rdev->audio.pin[i].offset = pin_offsets[i]; 310 rdev->audio.pin[i].id = i; 311 } 312 313 radeon_audio_interface_init(rdev); 314 315 /* disable audio. it will be set up later */ 316 for (i = 0; i < rdev->audio.num_pins; i++) 317 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 318 319 return 0; 320 } 321 322 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg) 323 { 324 if (rdev->audio.funcs->endpoint_rreg) 325 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg); 326 327 return 0; 328 } 329 330 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset, 331 u32 reg, u32 v) 332 { 333 if (rdev->audio.funcs->endpoint_wreg) 334 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v); 335 } 336 337 static void radeon_audio_write_sad_regs(struct drm_encoder *encoder) 338 { 339 struct radeon_encoder *radeon_encoder; 340 struct drm_connector *connector; 341 struct radeon_connector *radeon_connector = NULL; 342 struct cea_sad *sads; 343 int sad_count; 344 345 list_for_each_entry(connector, 346 &encoder->dev->mode_config.connector_list, head) { 347 if (connector->encoder == encoder) { 348 radeon_connector = to_radeon_connector(connector); 349 break; 350 } 351 } 352 353 if (!radeon_connector) { 354 DRM_ERROR("Couldn't find encoder's connector\n"); 355 return; 356 } 357 358 sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads); 359 if (sad_count <= 0) { 360 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 361 return; 362 } 363 BUG_ON(!sads); 364 365 radeon_encoder = to_radeon_encoder(encoder); 366 367 if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs) 368 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count); 369 370 kfree(sads); 371 } 372 373 static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder) 374 { 375 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 376 struct drm_connector *connector; 377 struct radeon_connector *radeon_connector = NULL; 378 u8 *sadb = NULL; 379 int sad_count; 380 381 list_for_each_entry(connector, 382 &encoder->dev->mode_config.connector_list, head) { 383 if (connector->encoder == encoder) { 384 radeon_connector = to_radeon_connector(connector); 385 break; 386 } 387 } 388 389 if (!radeon_connector) { 390 DRM_ERROR("Couldn't find encoder's connector\n"); 391 return; 392 } 393 394 sad_count = drm_edid_to_speaker_allocation( 395 radeon_connector_edid(connector), &sadb); 396 if (sad_count < 0) { 397 DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n", 398 sad_count); 399 sad_count = 0; 400 } 401 402 if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation) 403 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count); 404 405 kfree(sadb); 406 } 407 408 static void radeon_audio_write_latency_fields(struct drm_encoder *encoder, 409 struct drm_display_mode *mode) 410 { 411 struct radeon_encoder *radeon_encoder; 412 struct drm_connector *connector; 413 struct radeon_connector *radeon_connector = 0; 414 415 list_for_each_entry(connector, 416 &encoder->dev->mode_config.connector_list, head) { 417 if (connector->encoder == encoder) { 418 radeon_connector = to_radeon_connector(connector); 419 break; 420 } 421 } 422 423 if (!radeon_connector) { 424 DRM_ERROR("Couldn't find encoder's connector\n"); 425 return; 426 } 427 428 radeon_encoder = to_radeon_encoder(encoder); 429 430 if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields) 431 radeon_encoder->audio->write_latency_fields(encoder, connector, mode); 432 } 433 434 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder) 435 { 436 struct radeon_device *rdev = encoder->dev->dev_private; 437 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 438 439 if (radeon_encoder->audio && radeon_encoder->audio->get_pin) 440 return radeon_encoder->audio->get_pin(rdev); 441 442 return NULL; 443 } 444 445 static void radeon_audio_select_pin(struct drm_encoder *encoder) 446 { 447 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 448 449 if (radeon_encoder->audio && radeon_encoder->audio->select_pin) 450 radeon_encoder->audio->select_pin(encoder); 451 } 452 453 void radeon_audio_detect(struct drm_connector *connector, 454 enum drm_connector_status status) 455 { 456 struct radeon_device *rdev; 457 struct radeon_encoder *radeon_encoder; 458 struct radeon_encoder_atom_dig *dig; 459 460 if (!connector || !connector->encoder) 461 return; 462 463 rdev = connector->encoder->dev->dev_private; 464 465 if (!radeon_audio_chipset_supported(rdev)) 466 return; 467 468 radeon_encoder = to_radeon_encoder(connector->encoder); 469 dig = radeon_encoder->enc_priv; 470 471 if (status == connector_status_connected) { 472 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) { 473 radeon_encoder->audio = NULL; 474 return; 475 } 476 477 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 478 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 479 480 if (radeon_dp_getsinktype(radeon_connector) == 481 CONNECTOR_OBJECT_ID_DISPLAYPORT) 482 radeon_encoder->audio = rdev->audio.dp_funcs; 483 else 484 radeon_encoder->audio = rdev->audio.hdmi_funcs; 485 } else { 486 radeon_encoder->audio = rdev->audio.hdmi_funcs; 487 } 488 489 dig->afmt->pin = radeon_audio_get_pin(connector->encoder); 490 radeon_audio_enable(rdev, dig->afmt->pin, 0xf); 491 } else { 492 radeon_audio_enable(rdev, dig->afmt->pin, 0); 493 dig->afmt->pin = NULL; 494 } 495 } 496 497 void radeon_audio_fini(struct radeon_device *rdev) 498 { 499 int i; 500 501 if (!rdev->audio.enabled) 502 return; 503 504 for (i = 0; i < rdev->audio.num_pins; i++) 505 radeon_audio_enable(rdev, &rdev->audio.pin[i], 0); 506 507 rdev->audio.enabled = false; 508 } 509 510 static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock) 511 { 512 struct radeon_device *rdev = encoder->dev->dev_private; 513 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 514 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); 515 516 if (radeon_encoder->audio && radeon_encoder->audio->set_dto) 517 radeon_encoder->audio->set_dto(rdev, crtc, clock); 518 } 519 520 static int radeon_audio_set_avi_packet(struct drm_encoder *encoder, 521 struct drm_display_mode *mode) 522 { 523 struct radeon_device *rdev = encoder->dev->dev_private; 524 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 525 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 526 struct drm_connector *connector; 527 struct radeon_connector *radeon_connector = NULL; 528 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE]; 529 struct hdmi_avi_infoframe frame; 530 int err; 531 532 list_for_each_entry(connector, 533 &encoder->dev->mode_config.connector_list, head) { 534 if (connector->encoder == encoder) { 535 radeon_connector = to_radeon_connector(connector); 536 break; 537 } 538 } 539 540 if (!radeon_connector) { 541 DRM_ERROR("Couldn't find encoder's connector\n"); 542 return -ENOENT; 543 } 544 545 err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode); 546 if (err < 0) { 547 DRM_ERROR("failed to setup AVI infoframe: %d\n", err); 548 return err; 549 } 550 551 if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) { 552 if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB) 553 frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED; 554 else 555 frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL; 556 } else { 557 frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 558 } 559 560 err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer)); 561 if (err < 0) { 562 DRM_ERROR("failed to pack AVI infoframe: %d\n", err); 563 return err; 564 } 565 566 if (dig && dig->afmt && 567 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet) 568 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset, 569 buffer, sizeof(buffer)); 570 571 return 0; 572 } 573 574 /* 575 * calculate CTS and N values if they are not found in the table 576 */ 577 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq) 578 { 579 int n, cts; 580 unsigned long div, mul; 581 582 /* Safe, but overly large values */ 583 n = 128 * freq; 584 cts = clock * 1000; 585 586 /* Smallest valid fraction */ 587 div = gcd(n, cts); 588 589 n /= div; 590 cts /= div; 591 592 /* 593 * The optimal N is 128*freq/1000. Calculate the closest larger 594 * value that doesn't truncate any bits. 595 */ 596 mul = ((128*freq/1000) + (n-1))/n; 597 598 n *= mul; 599 cts *= mul; 600 601 /* Check that we are in spec (not always possible) */ 602 if (n < (128*freq/1500)) 603 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n"); 604 if (n > (128*freq/300)) 605 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n"); 606 607 *N = n; 608 *CTS = cts; 609 610 DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n", 611 *N, *CTS, freq); 612 } 613 614 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock) 615 { 616 static struct radeon_hdmi_acr res; 617 u8 i; 618 619 static const struct radeon_hdmi_acr hdmi_predefined_acr[] = { 620 /* 32kHz 44.1kHz 48kHz */ 621 /* Clock N CTS N CTS N CTS */ 622 { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */ 623 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */ 624 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */ 625 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */ 626 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */ 627 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */ 628 { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */ 629 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */ 630 { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */ 631 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */ 632 }; 633 634 /* Precalculated values for common clocks */ 635 for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++) 636 if (hdmi_predefined_acr[i].clock == clock) 637 return &hdmi_predefined_acr[i]; 638 639 /* And odd clocks get manually calculated */ 640 radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000); 641 radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100); 642 radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000); 643 644 return &res; 645 } 646 647 /* 648 * update the N and CTS parameters for a given pixel clock rate 649 */ 650 static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock) 651 { 652 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); 653 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 654 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 655 656 if (!dig || !dig->afmt) 657 return; 658 659 if (radeon_encoder->audio && radeon_encoder->audio->update_acr) 660 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); 661 } 662 663 static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder) 664 { 665 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 666 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 667 668 if (!dig || !dig->afmt) 669 return; 670 671 if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet) 672 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset); 673 } 674 675 static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder) 676 { 677 int bpc = 8; 678 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 679 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 680 681 if (!dig || !dig->afmt) 682 return; 683 684 if (encoder->crtc) { 685 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); 686 bpc = radeon_crtc->bpc; 687 } 688 689 if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth) 690 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc); 691 } 692 693 static void radeon_audio_set_audio_packet(struct drm_encoder *encoder) 694 { 695 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 696 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 697 698 if (!dig || !dig->afmt) 699 return; 700 701 if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet) 702 radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset); 703 } 704 705 static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute) 706 { 707 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 708 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 709 710 if (!dig || !dig->afmt) 711 return; 712 713 if (radeon_encoder->audio && radeon_encoder->audio->set_mute) 714 radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute); 715 } 716 717 /* 718 * update the info frames with the data from the current display mode 719 */ 720 static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 721 struct drm_display_mode *mode) 722 { 723 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 724 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 725 726 if (!dig || !dig->afmt) 727 return; 728 729 radeon_audio_set_mute(encoder, true); 730 731 radeon_audio_write_speaker_allocation(encoder); 732 radeon_audio_write_sad_regs(encoder); 733 radeon_audio_write_latency_fields(encoder, mode); 734 radeon_audio_set_dto(encoder, mode->clock); 735 radeon_audio_set_vbi_packet(encoder); 736 radeon_hdmi_set_color_depth(encoder); 737 radeon_audio_update_acr(encoder, mode->clock); 738 radeon_audio_set_audio_packet(encoder); 739 radeon_audio_select_pin(encoder); 740 741 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 742 return; 743 744 radeon_audio_set_mute(encoder, false); 745 } 746 747 static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 748 struct drm_display_mode *mode) 749 { 750 struct drm_device *dev = encoder->dev; 751 struct radeon_device *rdev = dev->dev_private; 752 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 753 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 754 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 755 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 756 struct radeon_connector_atom_dig *dig_connector = 757 radeon_connector->con_priv; 758 759 if (!dig || !dig->afmt) 760 return; 761 762 radeon_audio_write_speaker_allocation(encoder); 763 radeon_audio_write_sad_regs(encoder); 764 radeon_audio_write_latency_fields(encoder, mode); 765 if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev)) 766 radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10); 767 else 768 radeon_audio_set_dto(encoder, dig_connector->dp_clock); 769 radeon_audio_set_audio_packet(encoder); 770 radeon_audio_select_pin(encoder); 771 772 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 773 return; 774 } 775 776 void radeon_audio_mode_set(struct drm_encoder *encoder, 777 struct drm_display_mode *mode) 778 { 779 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 780 781 if (radeon_encoder->audio && radeon_encoder->audio->mode_set) 782 radeon_encoder->audio->mode_set(encoder, mode); 783 } 784 785 void radeon_audio_dpms(struct drm_encoder *encoder, int mode) 786 { 787 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 788 789 if (radeon_encoder->audio && radeon_encoder->audio->dpms) 790 radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON); 791 } 792