1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2010 Red Hat Inc. 4 * Author : Dave Airlie <airlied@redhat.com> 5 * 6 * ATPX support for both Intel/ATI 7 */ 8 #include <linux/vga_switcheroo.h> 9 #include <linux/slab.h> 10 #include <linux/acpi.h> 11 #include <linux/pci.h> 12 #include <linux/delay.h> 13 14 #include "radeon_acpi.h" 15 16 struct radeon_atpx_functions { 17 bool px_params; 18 bool power_cntl; 19 bool disp_mux_cntl; 20 bool i2c_mux_cntl; 21 bool switch_start; 22 bool switch_end; 23 bool disp_connectors_mapping; 24 bool disp_detetion_ports; 25 }; 26 27 struct radeon_atpx { 28 acpi_handle handle; 29 struct radeon_atpx_functions functions; 30 bool is_hybrid; 31 bool dgpu_req_power_for_displays; 32 }; 33 34 static struct radeon_atpx_priv { 35 bool atpx_detected; 36 bool bridge_pm_usable; 37 /* handle for device - and atpx */ 38 acpi_handle dhandle; 39 struct radeon_atpx atpx; 40 } radeon_atpx_priv; 41 42 struct atpx_verify_interface { 43 u16 size; /* structure size in bytes (includes size field) */ 44 u16 version; /* version */ 45 u32 function_bits; /* supported functions bit vector */ 46 } __packed; 47 48 struct atpx_px_params { 49 u16 size; /* structure size in bytes (includes size field) */ 50 u32 valid_flags; /* which flags are valid */ 51 u32 flags; /* flags */ 52 } __packed; 53 54 struct atpx_power_control { 55 u16 size; 56 u8 dgpu_state; 57 } __packed; 58 59 struct atpx_mux { 60 u16 size; 61 u16 mux; 62 } __packed; 63 64 bool radeon_has_atpx(void) 65 { 66 return radeon_atpx_priv.atpx_detected; 67 } 68 69 bool radeon_has_atpx_dgpu_power_cntl(void) 70 { 71 return radeon_atpx_priv.atpx.functions.power_cntl; 72 } 73 74 bool radeon_is_atpx_hybrid(void) 75 { 76 return radeon_atpx_priv.atpx.is_hybrid; 77 } 78 79 bool radeon_atpx_dgpu_req_power_for_displays(void) 80 { 81 return radeon_atpx_priv.atpx.dgpu_req_power_for_displays; 82 } 83 84 /** 85 * radeon_atpx_call - call an ATPX method 86 * 87 * @handle: acpi handle 88 * @function: the ATPX function to execute 89 * @params: ATPX function params 90 * 91 * Executes the requested ATPX function (all asics). 92 * Returns a pointer to the acpi output buffer. 93 */ 94 static union acpi_object *radeon_atpx_call(acpi_handle handle, int function, 95 struct acpi_buffer *params) 96 { 97 acpi_status status; 98 union acpi_object atpx_arg_elements[2]; 99 struct acpi_object_list atpx_arg; 100 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 101 102 atpx_arg.count = 2; 103 atpx_arg.pointer = &atpx_arg_elements[0]; 104 105 atpx_arg_elements[0].type = ACPI_TYPE_INTEGER; 106 atpx_arg_elements[0].integer.value = function; 107 108 if (params) { 109 atpx_arg_elements[1].type = ACPI_TYPE_BUFFER; 110 atpx_arg_elements[1].buffer.length = params->length; 111 atpx_arg_elements[1].buffer.pointer = params->pointer; 112 } else { 113 /* We need a second fake parameter */ 114 atpx_arg_elements[1].type = ACPI_TYPE_INTEGER; 115 atpx_arg_elements[1].integer.value = 0; 116 } 117 118 status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer); 119 120 /* Fail only if calling the method fails and ATPX is supported */ 121 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { 122 pr_err("failed to evaluate ATPX got %s\n", 123 acpi_format_exception(status)); 124 kfree(buffer.pointer); 125 return NULL; 126 } 127 128 return buffer.pointer; 129 } 130 131 /** 132 * radeon_atpx_parse_functions - parse supported functions 133 * 134 * @f: supported functions struct 135 * @mask: supported functions mask from ATPX 136 * 137 * Use the supported functions mask from ATPX function 138 * ATPX_FUNCTION_VERIFY_INTERFACE to determine what functions 139 * are supported (all asics). 140 */ 141 static void radeon_atpx_parse_functions(struct radeon_atpx_functions *f, u32 mask) 142 { 143 f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; 144 f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; 145 f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; 146 f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; 147 f->switch_start = mask & ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED; 148 f->switch_end = mask & ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED; 149 f->disp_connectors_mapping = mask & ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED; 150 f->disp_detetion_ports = mask & ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED; 151 } 152 153 /** 154 * radeon_atpx_validate() - validate ATPX functions 155 * 156 * @atpx: radeon atpx struct 157 * 158 * Validate that required functions are enabled (all asics). 159 * returns 0 on success, error on failure. 160 */ 161 static int radeon_atpx_validate(struct radeon_atpx *atpx) 162 { 163 u32 valid_bits = 0; 164 165 if (atpx->functions.px_params) { 166 union acpi_object *info; 167 struct atpx_px_params output; 168 size_t size; 169 170 info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_GET_PX_PARAMETERS, NULL); 171 if (!info) 172 return -EIO; 173 174 memset(&output, 0, sizeof(output)); 175 176 size = *(u16 *) info->buffer.pointer; 177 if (size < 10) { 178 pr_err("ATPX buffer is too small: %zu\n", size); 179 kfree(info); 180 return -EINVAL; 181 } 182 size = min(sizeof(output), size); 183 184 memcpy(&output, info->buffer.pointer, size); 185 186 valid_bits = output.flags & output.valid_flags; 187 188 kfree(info); 189 } 190 191 /* if separate mux flag is set, mux controls are required */ 192 if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) { 193 atpx->functions.i2c_mux_cntl = true; 194 atpx->functions.disp_mux_cntl = true; 195 } 196 /* if any outputs are muxed, mux controls are required */ 197 if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED | 198 ATPX_TV_SIGNAL_MUXED | 199 ATPX_DFP_SIGNAL_MUXED)) 200 atpx->functions.disp_mux_cntl = true; 201 202 /* some bioses set these bits rather than flagging power_cntl as supported */ 203 if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED | 204 ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED)) 205 atpx->functions.power_cntl = true; 206 207 atpx->is_hybrid = false; 208 if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { 209 pr_info("ATPX Hybrid Graphics\n"); 210 /* 211 * Disable legacy PM methods only when pcie port PM is usable, 212 * otherwise the device might fail to power off or power on. 213 */ 214 atpx->functions.power_cntl = !radeon_atpx_priv.bridge_pm_usable; 215 atpx->is_hybrid = true; 216 } 217 218 return 0; 219 } 220 221 /** 222 * radeon_atpx_verify_interface - verify ATPX 223 * 224 * @atpx: radeon atpx struct 225 * 226 * Execute the ATPX_FUNCTION_VERIFY_INTERFACE ATPX function 227 * to initialize ATPX and determine what features are supported 228 * (all asics). 229 * returns 0 on success, error on failure. 230 */ 231 static int radeon_atpx_verify_interface(struct radeon_atpx *atpx) 232 { 233 union acpi_object *info; 234 struct atpx_verify_interface output; 235 size_t size; 236 int err = 0; 237 238 info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL); 239 if (!info) 240 return -EIO; 241 242 memset(&output, 0, sizeof(output)); 243 244 size = *(u16 *) info->buffer.pointer; 245 if (size < 8) { 246 pr_err("ATPX buffer is too small: %zu\n", size); 247 err = -EINVAL; 248 goto out; 249 } 250 size = min(sizeof(output), size); 251 252 memcpy(&output, info->buffer.pointer, size); 253 254 /* TODO: check version? */ 255 pr_info("ATPX version %u, functions 0x%08x\n", 256 output.version, output.function_bits); 257 258 radeon_atpx_parse_functions(&atpx->functions, output.function_bits); 259 260 out: 261 kfree(info); 262 return err; 263 } 264 265 /** 266 * radeon_atpx_set_discrete_state - power up/down discrete GPU 267 * 268 * @atpx: atpx info struct 269 * @state: discrete GPU state (0 = power down, 1 = power up) 270 * 271 * Execute the ATPX_FUNCTION_POWER_CONTROL ATPX function to 272 * power down/up the discrete GPU (all asics). 273 * Returns 0 on success, error on failure. 274 */ 275 static int radeon_atpx_set_discrete_state(struct radeon_atpx *atpx, u8 state) 276 { 277 struct acpi_buffer params; 278 union acpi_object *info; 279 struct atpx_power_control input; 280 281 if (atpx->functions.power_cntl) { 282 input.size = 3; 283 input.dgpu_state = state; 284 params.length = input.size; 285 params.pointer = &input; 286 info = radeon_atpx_call(atpx->handle, 287 ATPX_FUNCTION_POWER_CONTROL, 288 ¶ms); 289 if (!info) 290 return -EIO; 291 kfree(info); 292 293 /* 200ms delay is required after off */ 294 if (state == 0) 295 msleep(200); 296 } 297 return 0; 298 } 299 300 /** 301 * radeon_atpx_switch_disp_mux - switch display mux 302 * 303 * @atpx: atpx info struct 304 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) 305 * 306 * Execute the ATPX_FUNCTION_DISPLAY_MUX_CONTROL ATPX function to 307 * switch the display mux between the discrete GPU and integrated GPU 308 * (all asics). 309 * Returns 0 on success, error on failure. 310 */ 311 static int radeon_atpx_switch_disp_mux(struct radeon_atpx *atpx, u16 mux_id) 312 { 313 struct acpi_buffer params; 314 union acpi_object *info; 315 struct atpx_mux input; 316 317 if (atpx->functions.disp_mux_cntl) { 318 input.size = 4; 319 input.mux = mux_id; 320 params.length = input.size; 321 params.pointer = &input; 322 info = radeon_atpx_call(atpx->handle, 323 ATPX_FUNCTION_DISPLAY_MUX_CONTROL, 324 ¶ms); 325 if (!info) 326 return -EIO; 327 kfree(info); 328 } 329 return 0; 330 } 331 332 /** 333 * radeon_atpx_switch_i2c_mux - switch i2c/hpd mux 334 * 335 * @atpx: atpx info struct 336 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) 337 * 338 * Execute the ATPX_FUNCTION_I2C_MUX_CONTROL ATPX function to 339 * switch the i2c/hpd mux between the discrete GPU and integrated GPU 340 * (all asics). 341 * Returns 0 on success, error on failure. 342 */ 343 static int radeon_atpx_switch_i2c_mux(struct radeon_atpx *atpx, u16 mux_id) 344 { 345 struct acpi_buffer params; 346 union acpi_object *info; 347 struct atpx_mux input; 348 349 if (atpx->functions.i2c_mux_cntl) { 350 input.size = 4; 351 input.mux = mux_id; 352 params.length = input.size; 353 params.pointer = &input; 354 info = radeon_atpx_call(atpx->handle, 355 ATPX_FUNCTION_I2C_MUX_CONTROL, 356 ¶ms); 357 if (!info) 358 return -EIO; 359 kfree(info); 360 } 361 return 0; 362 } 363 364 /** 365 * radeon_atpx_switch_start - notify the sbios of a GPU switch 366 * 367 * @atpx: atpx info struct 368 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) 369 * 370 * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION ATPX 371 * function to notify the sbios that a switch between the discrete GPU and 372 * integrated GPU has begun (all asics). 373 * Returns 0 on success, error on failure. 374 */ 375 static int radeon_atpx_switch_start(struct radeon_atpx *atpx, u16 mux_id) 376 { 377 struct acpi_buffer params; 378 union acpi_object *info; 379 struct atpx_mux input; 380 381 if (atpx->functions.switch_start) { 382 input.size = 4; 383 input.mux = mux_id; 384 params.length = input.size; 385 params.pointer = &input; 386 info = radeon_atpx_call(atpx->handle, 387 ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION, 388 ¶ms); 389 if (!info) 390 return -EIO; 391 kfree(info); 392 } 393 return 0; 394 } 395 396 /** 397 * radeon_atpx_switch_end - notify the sbios of a GPU switch 398 * 399 * @atpx: atpx info struct 400 * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) 401 * 402 * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION ATPX 403 * function to notify the sbios that a switch between the discrete GPU and 404 * integrated GPU has ended (all asics). 405 * Returns 0 on success, error on failure. 406 */ 407 static int radeon_atpx_switch_end(struct radeon_atpx *atpx, u16 mux_id) 408 { 409 struct acpi_buffer params; 410 union acpi_object *info; 411 struct atpx_mux input; 412 413 if (atpx->functions.switch_end) { 414 input.size = 4; 415 input.mux = mux_id; 416 params.length = input.size; 417 params.pointer = &input; 418 info = radeon_atpx_call(atpx->handle, 419 ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION, 420 ¶ms); 421 if (!info) 422 return -EIO; 423 kfree(info); 424 } 425 return 0; 426 } 427 428 /** 429 * radeon_atpx_switchto - switch to the requested GPU 430 * 431 * @id: GPU to switch to 432 * 433 * Execute the necessary ATPX functions to switch between the discrete GPU and 434 * integrated GPU (all asics). 435 * Returns 0 on success, error on failure. 436 */ 437 static int radeon_atpx_switchto(enum vga_switcheroo_client_id id) 438 { 439 u16 gpu_id; 440 441 if (id == VGA_SWITCHEROO_IGD) 442 gpu_id = ATPX_INTEGRATED_GPU; 443 else 444 gpu_id = ATPX_DISCRETE_GPU; 445 446 radeon_atpx_switch_start(&radeon_atpx_priv.atpx, gpu_id); 447 radeon_atpx_switch_disp_mux(&radeon_atpx_priv.atpx, gpu_id); 448 radeon_atpx_switch_i2c_mux(&radeon_atpx_priv.atpx, gpu_id); 449 radeon_atpx_switch_end(&radeon_atpx_priv.atpx, gpu_id); 450 451 return 0; 452 } 453 454 /** 455 * radeon_atpx_power_state - power down/up the requested GPU 456 * 457 * @id: GPU to power down/up 458 * @state: requested power state (0 = off, 1 = on) 459 * 460 * Execute the necessary ATPX function to power down/up the discrete GPU 461 * (all asics). 462 * Returns 0 on success, error on failure. 463 */ 464 static int radeon_atpx_power_state(enum vga_switcheroo_client_id id, 465 enum vga_switcheroo_state state) 466 { 467 /* on w500 ACPI can't change intel gpu state */ 468 if (id == VGA_SWITCHEROO_IGD) 469 return 0; 470 471 radeon_atpx_set_discrete_state(&radeon_atpx_priv.atpx, state); 472 return 0; 473 } 474 475 /** 476 * radeon_atpx_pci_probe_handle - look up the ATPX handle 477 * 478 * @pdev: pci device 479 * 480 * Look up the ATPX handles (all asics). 481 * Returns true if the handles are found, false if not. 482 */ 483 static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev) 484 { 485 acpi_handle dhandle, atpx_handle; 486 acpi_status status; 487 488 dhandle = ACPI_HANDLE(&pdev->dev); 489 if (!dhandle) 490 return false; 491 492 status = acpi_get_handle(dhandle, "ATPX", &atpx_handle); 493 if (ACPI_FAILURE(status)) 494 return false; 495 496 radeon_atpx_priv.dhandle = dhandle; 497 radeon_atpx_priv.atpx.handle = atpx_handle; 498 return true; 499 } 500 501 /** 502 * radeon_atpx_init - verify the ATPX interface 503 * 504 * Verify the ATPX interface (all asics). 505 * Returns 0 on success, error on failure. 506 */ 507 static int radeon_atpx_init(void) 508 { 509 int r; 510 511 /* set up the ATPX handle */ 512 r = radeon_atpx_verify_interface(&radeon_atpx_priv.atpx); 513 if (r) 514 return r; 515 516 /* validate the atpx setup */ 517 r = radeon_atpx_validate(&radeon_atpx_priv.atpx); 518 if (r) 519 return r; 520 521 return 0; 522 } 523 524 /** 525 * radeon_atpx_get_client_id - get the client id 526 * 527 * @pdev: pci device 528 * 529 * look up whether we are the integrated or discrete GPU (all asics). 530 * Returns the client id. 531 */ 532 static enum vga_switcheroo_client_id radeon_atpx_get_client_id(struct pci_dev *pdev) 533 { 534 if (radeon_atpx_priv.dhandle == ACPI_HANDLE(&pdev->dev)) 535 return VGA_SWITCHEROO_IGD; 536 else 537 return VGA_SWITCHEROO_DIS; 538 } 539 540 static const struct vga_switcheroo_handler radeon_atpx_handler = { 541 .switchto = radeon_atpx_switchto, 542 .power_state = radeon_atpx_power_state, 543 .get_client_id = radeon_atpx_get_client_id, 544 }; 545 546 /** 547 * radeon_atpx_detect - detect whether we have PX 548 * 549 * Check if we have a PX system (all asics). 550 * Returns true if we have a PX system, false if not. 551 */ 552 static bool radeon_atpx_detect(void) 553 { 554 char acpi_method_name[255] = { 0 }; 555 struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name}; 556 struct pci_dev *pdev = NULL; 557 bool has_atpx = false; 558 int vga_count = 0; 559 bool d3_supported = false; 560 struct pci_dev *parent_pdev; 561 562 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) { 563 vga_count++; 564 565 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true); 566 567 parent_pdev = pci_upstream_bridge(pdev); 568 d3_supported |= parent_pdev && parent_pdev->bridge_d3; 569 } 570 571 /* some newer PX laptops mark the dGPU as a non-VGA display device */ 572 while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) { 573 vga_count++; 574 575 has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true); 576 577 parent_pdev = pci_upstream_bridge(pdev); 578 d3_supported |= parent_pdev && parent_pdev->bridge_d3; 579 } 580 581 if (has_atpx && vga_count == 2) { 582 acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer); 583 pr_info("vga_switcheroo: detected switching method %s handle\n", 584 acpi_method_name); 585 radeon_atpx_priv.atpx_detected = true; 586 radeon_atpx_priv.bridge_pm_usable = d3_supported; 587 radeon_atpx_init(); 588 return true; 589 } 590 return false; 591 } 592 593 /** 594 * radeon_register_atpx_handler - register with vga_switcheroo 595 * 596 * Register the PX callbacks with vga_switcheroo (all asics). 597 */ 598 void radeon_register_atpx_handler(void) 599 { 600 bool r; 601 enum vga_switcheroo_handler_flags_t handler_flags = 0; 602 603 /* detect if we have any ATPX + 2 VGA in the system */ 604 r = radeon_atpx_detect(); 605 if (!r) 606 return; 607 608 vga_switcheroo_register_handler(&radeon_atpx_handler, handler_flags); 609 } 610 611 /** 612 * radeon_unregister_atpx_handler - unregister with vga_switcheroo 613 * 614 * Unregister the PX callbacks with vga_switcheroo (all asics). 615 */ 616 void radeon_unregister_atpx_handler(void) 617 { 618 vga_switcheroo_unregister_handler(); 619 } 620