1 /* 2 * Copyright 2008 Red Hat Inc. 3 * Copyright 2009 Jerome Glisse. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Dave Airlie 25 * Jerome Glisse <glisse@freedesktop.org> 26 */ 27 28 #include <linux/pci.h> 29 30 #include <drm/drm_agpsupport.h> 31 #include <drm/drm_device.h> 32 #include <drm/radeon_drm.h> 33 34 #include "radeon.h" 35 36 #if IS_ENABLED(CONFIG_AGP) 37 38 struct radeon_agpmode_quirk { 39 u32 hostbridge_vendor; 40 u32 hostbridge_device; 41 u32 chip_vendor; 42 u32 chip_device; 43 u32 subsys_vendor; 44 u32 subsys_device; 45 u32 default_mode; 46 }; 47 48 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = { 49 /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */ 50 { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4}, 51 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */ 52 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4}, 53 /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */ 54 { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964, 55 0x148c, 0x2073, 4}, 56 /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */ 57 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59, 58 PCI_VENDOR_ID_IBM, 0x052f, 1}, 59 /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */ 60 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50, 61 PCI_VENDOR_ID_IBM, 0x0550, 1}, 62 /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */ 63 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 64 PCI_VENDOR_ID_IBM, 0x054d, 1}, 65 /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */ 66 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57, 67 PCI_VENDOR_ID_IBM, 0x0530, 1}, 68 /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */ 69 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54, 70 PCI_VENDOR_ID_IBM, 0x054f, 2}, 71 /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */ 72 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 73 PCI_VENDOR_ID_SONY, 0x816b, 2}, 74 /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */ 75 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61, 76 PCI_VENDOR_ID_SONY, 0x8195, 8}, 77 /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/ 78 { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59, 79 PCI_VENDOR_ID_DELL, 0x00e3, 2}, 80 /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */ 81 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66, 82 PCI_VENDOR_ID_DELL, 0x0149, 1}, 83 /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */ 84 { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66, 85 PCI_VENDOR_ID_IBM, 0x0531, 1}, 86 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */ 87 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 88 0x1025, 0x0061, 1}, 89 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */ 90 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 91 0x1025, 0x0064, 1}, 92 /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */ 93 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 94 PCI_VENDOR_ID_ASUSTEK, 0x1942, 1}, 95 /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */ 96 { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50, 97 0x10cf, 0x127f, 1}, 98 /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */ 99 { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 100 0x1787, 0x5960, 4}, 101 /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */ 102 { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960, 103 0x17af, 0x2020, 4}, 104 /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */ 105 { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153, 106 PCI_VENDOR_ID_ASUSTEK, 0x003c, 4}, 107 /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */ 108 { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c, 109 PCI_VENDOR_ID_ATI, 0x013a, 2}, 110 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */ 111 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 112 PCI_VENDOR_ID_ASUSTEK, 0x004c, 2}, 113 /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */ 114 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960, 115 PCI_VENDOR_ID_ASUSTEK, 0x0054, 2}, 116 /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */ 117 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d, 118 0x174b, 0x7149, 4}, 119 /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */ 120 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960, 121 0x1462, 0x0380, 4}, 122 /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */ 123 { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964, 124 0x148c, 0x2073, 4}, 125 /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */ 126 { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61, 127 PCI_VENDOR_ID_SONY, 0x8175, 1}, 128 { 0, 0, 0, 0, 0, 0, 0 }, 129 }; 130 #endif 131 132 int radeon_agp_init(struct radeon_device *rdev) 133 { 134 #if IS_ENABLED(CONFIG_AGP) 135 struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list; 136 struct drm_agp_mode mode; 137 struct drm_agp_info info; 138 uint32_t agp_status; 139 int default_mode; 140 bool is_v3; 141 int ret; 142 143 /* Acquire AGP. */ 144 ret = drm_agp_acquire(rdev->ddev); 145 if (ret) { 146 DRM_ERROR("Unable to acquire AGP: %d\n", ret); 147 return ret; 148 } 149 150 ret = drm_agp_info(rdev->ddev, &info); 151 if (ret) { 152 drm_agp_release(rdev->ddev); 153 DRM_ERROR("Unable to get AGP info: %d\n", ret); 154 return ret; 155 } 156 157 if (rdev->ddev->agp->agp_info.aper_size < 32) { 158 drm_agp_release(rdev->ddev); 159 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " 160 "need at least 32M, disabling AGP\n", 161 rdev->ddev->agp->agp_info.aper_size); 162 return -EINVAL; 163 } 164 165 mode.mode = info.mode; 166 /* chips with the agp to pcie bridge don't have the AGP_STATUS register 167 * Just use the whatever mode the host sets up. 168 */ 169 if (rdev->family <= CHIP_RV350) 170 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 171 else 172 agp_status = mode.mode; 173 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 174 175 if (is_v3) { 176 default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4; 177 } else { 178 if (agp_status & RADEON_AGP_4X_MODE) { 179 default_mode = 4; 180 } else if (agp_status & RADEON_AGP_2X_MODE) { 181 default_mode = 2; 182 } else { 183 default_mode = 1; 184 } 185 } 186 187 /* Apply AGPMode Quirks */ 188 while (p && p->chip_device != 0) { 189 if (info.id_vendor == p->hostbridge_vendor && 190 info.id_device == p->hostbridge_device && 191 rdev->pdev->vendor == p->chip_vendor && 192 rdev->pdev->device == p->chip_device && 193 rdev->pdev->subsystem_vendor == p->subsys_vendor && 194 rdev->pdev->subsystem_device == p->subsys_device) { 195 default_mode = p->default_mode; 196 } 197 ++p; 198 } 199 200 if (radeon_agpmode > 0) { 201 if ((radeon_agpmode < (is_v3 ? 4 : 1)) || 202 (radeon_agpmode > (is_v3 ? 8 : 4)) || 203 (radeon_agpmode & (radeon_agpmode - 1))) { 204 DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n", 205 radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4", 206 default_mode); 207 radeon_agpmode = default_mode; 208 } else { 209 DRM_INFO("AGP mode requested: %d\n", radeon_agpmode); 210 } 211 } else { 212 radeon_agpmode = default_mode; 213 } 214 215 mode.mode &= ~RADEON_AGP_MODE_MASK; 216 if (is_v3) { 217 switch (radeon_agpmode) { 218 case 8: 219 mode.mode |= RADEON_AGPv3_8X_MODE; 220 break; 221 case 4: 222 default: 223 mode.mode |= RADEON_AGPv3_4X_MODE; 224 break; 225 } 226 } else { 227 switch (radeon_agpmode) { 228 case 4: 229 mode.mode |= RADEON_AGP_4X_MODE; 230 break; 231 case 2: 232 mode.mode |= RADEON_AGP_2X_MODE; 233 break; 234 case 1: 235 default: 236 mode.mode |= RADEON_AGP_1X_MODE; 237 break; 238 } 239 } 240 241 mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */ 242 ret = drm_agp_enable(rdev->ddev, mode); 243 if (ret) { 244 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 245 drm_agp_release(rdev->ddev); 246 return ret; 247 } 248 249 rdev->mc.agp_base = rdev->ddev->agp->agp_info.aper_base; 250 rdev->mc.gtt_size = rdev->ddev->agp->agp_info.aper_size << 20; 251 rdev->mc.gtt_start = rdev->mc.agp_base; 252 rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1; 253 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", 254 rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end); 255 256 /* workaround some hw issues */ 257 if (rdev->family < CHIP_R200) { 258 WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000); 259 } 260 return 0; 261 #else 262 return 0; 263 #endif 264 } 265 266 void radeon_agp_resume(struct radeon_device *rdev) 267 { 268 #if IS_ENABLED(CONFIG_AGP) 269 int r; 270 if (rdev->flags & RADEON_IS_AGP) { 271 r = radeon_agp_init(rdev); 272 if (r) 273 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); 274 } 275 #endif 276 } 277 278 void radeon_agp_fini(struct radeon_device *rdev) 279 { 280 #if IS_ENABLED(CONFIG_AGP) 281 if (rdev->ddev->agp && rdev->ddev->agp->acquired) { 282 drm_agp_release(rdev->ddev); 283 } 284 #endif 285 } 286 287 void radeon_agp_suspend(struct radeon_device *rdev) 288 { 289 radeon_agp_fini(rdev); 290 } 291