1 /* 2 * Copyright 2013 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Dave Airlie 23 * Alon Levy 24 */ 25 26 /* QXL cmd/ring handling */ 27 28 #include "qxl_drv.h" 29 #include "qxl_object.h" 30 31 static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap); 32 33 struct ring { 34 struct qxl_ring_header header; 35 uint8_t elements[0]; 36 }; 37 38 struct qxl_ring { 39 struct ring *ring; 40 int element_size; 41 int n_elements; 42 int prod_notify; 43 wait_queue_head_t *push_event; 44 spinlock_t lock; 45 }; 46 47 void qxl_ring_free(struct qxl_ring *ring) 48 { 49 kfree(ring); 50 } 51 52 void qxl_ring_init_hdr(struct qxl_ring *ring) 53 { 54 ring->ring->header.notify_on_prod = ring->n_elements; 55 } 56 57 struct qxl_ring * 58 qxl_ring_create(struct qxl_ring_header *header, 59 int element_size, 60 int n_elements, 61 int prod_notify, 62 bool set_prod_notify, 63 wait_queue_head_t *push_event) 64 { 65 struct qxl_ring *ring; 66 67 ring = kmalloc(sizeof(*ring), GFP_KERNEL); 68 if (!ring) 69 return NULL; 70 71 ring->ring = (struct ring *)header; 72 ring->element_size = element_size; 73 ring->n_elements = n_elements; 74 ring->prod_notify = prod_notify; 75 ring->push_event = push_event; 76 if (set_prod_notify) 77 qxl_ring_init_hdr(ring); 78 spin_lock_init(&ring->lock); 79 return ring; 80 } 81 82 static int qxl_check_header(struct qxl_ring *ring) 83 { 84 int ret; 85 struct qxl_ring_header *header = &(ring->ring->header); 86 unsigned long flags; 87 spin_lock_irqsave(&ring->lock, flags); 88 ret = header->prod - header->cons < header->num_items; 89 if (ret == 0) 90 header->notify_on_cons = header->cons + 1; 91 spin_unlock_irqrestore(&ring->lock, flags); 92 return ret; 93 } 94 95 int qxl_check_idle(struct qxl_ring *ring) 96 { 97 int ret; 98 struct qxl_ring_header *header = &(ring->ring->header); 99 unsigned long flags; 100 spin_lock_irqsave(&ring->lock, flags); 101 ret = header->prod == header->cons; 102 spin_unlock_irqrestore(&ring->lock, flags); 103 return ret; 104 } 105 106 int qxl_ring_push(struct qxl_ring *ring, 107 const void *new_elt, bool interruptible) 108 { 109 struct qxl_ring_header *header = &(ring->ring->header); 110 uint8_t *elt; 111 int idx, ret; 112 unsigned long flags; 113 spin_lock_irqsave(&ring->lock, flags); 114 if (header->prod - header->cons == header->num_items) { 115 header->notify_on_cons = header->cons + 1; 116 mb(); 117 spin_unlock_irqrestore(&ring->lock, flags); 118 if (!drm_can_sleep()) { 119 while (!qxl_check_header(ring)) 120 udelay(1); 121 } else { 122 if (interruptible) { 123 ret = wait_event_interruptible(*ring->push_event, 124 qxl_check_header(ring)); 125 if (ret) 126 return ret; 127 } else { 128 wait_event(*ring->push_event, 129 qxl_check_header(ring)); 130 } 131 132 } 133 spin_lock_irqsave(&ring->lock, flags); 134 } 135 136 idx = header->prod & (ring->n_elements - 1); 137 elt = ring->ring->elements + idx * ring->element_size; 138 139 memcpy((void *)elt, new_elt, ring->element_size); 140 141 header->prod++; 142 143 mb(); 144 145 if (header->prod == header->notify_on_prod) 146 outb(0, ring->prod_notify); 147 148 spin_unlock_irqrestore(&ring->lock, flags); 149 return 0; 150 } 151 152 static bool qxl_ring_pop(struct qxl_ring *ring, 153 void *element) 154 { 155 volatile struct qxl_ring_header *header = &(ring->ring->header); 156 volatile uint8_t *ring_elt; 157 int idx; 158 unsigned long flags; 159 spin_lock_irqsave(&ring->lock, flags); 160 if (header->cons == header->prod) { 161 header->notify_on_prod = header->cons + 1; 162 spin_unlock_irqrestore(&ring->lock, flags); 163 return false; 164 } 165 166 idx = header->cons & (ring->n_elements - 1); 167 ring_elt = ring->ring->elements + idx * ring->element_size; 168 169 memcpy(element, (void *)ring_elt, ring->element_size); 170 171 header->cons++; 172 173 spin_unlock_irqrestore(&ring->lock, flags); 174 return true; 175 } 176 177 int 178 qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release, 179 uint32_t type, bool interruptible) 180 { 181 struct qxl_command cmd; 182 183 cmd.type = type; 184 cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset); 185 186 return qxl_ring_push(qdev->command_ring, &cmd, interruptible); 187 } 188 189 int 190 qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release, 191 uint32_t type, bool interruptible) 192 { 193 struct qxl_command cmd; 194 195 cmd.type = type; 196 cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset); 197 198 return qxl_ring_push(qdev->cursor_ring, &cmd, interruptible); 199 } 200 201 bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush) 202 { 203 if (!qxl_check_idle(qdev->release_ring)) { 204 schedule_work(&qdev->gc_work); 205 if (flush) 206 flush_work(&qdev->gc_work); 207 return true; 208 } 209 return false; 210 } 211 212 int qxl_garbage_collect(struct qxl_device *qdev) 213 { 214 struct qxl_release *release; 215 uint64_t id, next_id; 216 int i = 0; 217 union qxl_release_info *info; 218 219 while (qxl_ring_pop(qdev->release_ring, &id)) { 220 DRM_DEBUG_DRIVER("popped %lld\n", id); 221 while (id) { 222 release = qxl_release_from_id_locked(qdev, id); 223 if (release == NULL) 224 break; 225 226 info = qxl_release_map(qdev, release); 227 next_id = info->next; 228 qxl_release_unmap(qdev, release, info); 229 230 DRM_DEBUG_DRIVER("popped %lld, next %lld\n", id, 231 next_id); 232 233 switch (release->type) { 234 case QXL_RELEASE_DRAWABLE: 235 case QXL_RELEASE_SURFACE_CMD: 236 case QXL_RELEASE_CURSOR_CMD: 237 break; 238 default: 239 DRM_ERROR("unexpected release type\n"); 240 break; 241 } 242 id = next_id; 243 244 qxl_release_free(qdev, release); 245 ++i; 246 } 247 } 248 249 DRM_DEBUG_DRIVER("%d\n", i); 250 251 return i; 252 } 253 254 int qxl_alloc_bo_reserved(struct qxl_device *qdev, 255 struct qxl_release *release, 256 unsigned long size, 257 struct qxl_bo **_bo) 258 { 259 struct qxl_bo *bo; 260 int ret; 261 262 ret = qxl_bo_create(qdev, size, false /* not kernel - device */, 263 false, QXL_GEM_DOMAIN_VRAM, NULL, &bo); 264 if (ret) { 265 DRM_ERROR("failed to allocate VRAM BO\n"); 266 return ret; 267 } 268 ret = qxl_release_list_add(release, bo); 269 if (ret) 270 goto out_unref; 271 272 *_bo = bo; 273 return 0; 274 out_unref: 275 qxl_bo_unref(&bo); 276 return ret; 277 } 278 279 static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr) 280 { 281 int irq_num; 282 long addr = qdev->io_base + port; 283 int ret; 284 285 mutex_lock(&qdev->async_io_mutex); 286 irq_num = atomic_read(&qdev->irq_received_io_cmd); 287 if (qdev->last_sent_io_cmd > irq_num) { 288 if (intr) 289 ret = wait_event_interruptible_timeout(qdev->io_cmd_event, 290 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 291 else 292 ret = wait_event_timeout(qdev->io_cmd_event, 293 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 294 /* 0 is timeout, just bail the "hw" has gone away */ 295 if (ret <= 0) 296 goto out; 297 irq_num = atomic_read(&qdev->irq_received_io_cmd); 298 } 299 outb(val, addr); 300 qdev->last_sent_io_cmd = irq_num + 1; 301 if (intr) 302 ret = wait_event_interruptible_timeout(qdev->io_cmd_event, 303 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 304 else 305 ret = wait_event_timeout(qdev->io_cmd_event, 306 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ); 307 out: 308 if (ret > 0) 309 ret = 0; 310 mutex_unlock(&qdev->async_io_mutex); 311 return ret; 312 } 313 314 static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port) 315 { 316 int ret; 317 318 restart: 319 ret = wait_for_io_cmd_user(qdev, val, port, false); 320 if (ret == -ERESTARTSYS) 321 goto restart; 322 } 323 324 int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf, 325 const struct qxl_rect *area) 326 { 327 int surface_id; 328 uint32_t surface_width, surface_height; 329 int ret; 330 331 if (!surf->hw_surf_alloc) 332 DRM_ERROR("got io update area with no hw surface\n"); 333 334 if (surf->is_primary) 335 surface_id = 0; 336 else 337 surface_id = surf->surface_id; 338 surface_width = surf->surf.width; 339 surface_height = surf->surf.height; 340 341 if (area->left < 0 || area->top < 0 || 342 area->right > surface_width || area->bottom > surface_height) 343 return -EINVAL; 344 345 mutex_lock(&qdev->update_area_mutex); 346 qdev->ram_header->update_area = *area; 347 qdev->ram_header->update_surface = surface_id; 348 ret = wait_for_io_cmd_user(qdev, 0, QXL_IO_UPDATE_AREA_ASYNC, true); 349 mutex_unlock(&qdev->update_area_mutex); 350 return ret; 351 } 352 353 void qxl_io_notify_oom(struct qxl_device *qdev) 354 { 355 outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM); 356 } 357 358 void qxl_io_flush_release(struct qxl_device *qdev) 359 { 360 outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE); 361 } 362 363 void qxl_io_flush_surfaces(struct qxl_device *qdev) 364 { 365 wait_for_io_cmd(qdev, 0, QXL_IO_FLUSH_SURFACES_ASYNC); 366 } 367 368 369 void qxl_io_destroy_primary(struct qxl_device *qdev) 370 { 371 wait_for_io_cmd(qdev, 0, QXL_IO_DESTROY_PRIMARY_ASYNC); 372 qdev->primary_created = false; 373 } 374 375 void qxl_io_create_primary(struct qxl_device *qdev, 376 unsigned offset, struct qxl_bo *bo) 377 { 378 struct qxl_surface_create *create; 379 380 DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header); 381 create = &qdev->ram_header->create_surface; 382 create->format = bo->surf.format; 383 create->width = bo->surf.width; 384 create->height = bo->surf.height; 385 create->stride = bo->surf.stride; 386 if (bo->shadow) { 387 create->mem = qxl_bo_physical_address(qdev, bo->shadow, offset); 388 } else { 389 create->mem = qxl_bo_physical_address(qdev, bo, offset); 390 } 391 392 DRM_DEBUG_DRIVER("mem = %llx, from %p\n", create->mem, bo->kptr); 393 394 create->flags = QXL_SURF_FLAG_KEEP_DATA; 395 create->type = QXL_SURF_TYPE_PRIMARY; 396 397 wait_for_io_cmd(qdev, 0, QXL_IO_CREATE_PRIMARY_ASYNC); 398 qdev->primary_created = true; 399 } 400 401 void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id) 402 { 403 DRM_DEBUG_DRIVER("qxl_memslot_add %d\n", id); 404 wait_for_io_cmd(qdev, id, QXL_IO_MEMSLOT_ADD_ASYNC); 405 } 406 407 void qxl_io_reset(struct qxl_device *qdev) 408 { 409 outb(0, qdev->io_base + QXL_IO_RESET); 410 } 411 412 void qxl_io_monitors_config(struct qxl_device *qdev) 413 { 414 wait_for_io_cmd(qdev, 0, QXL_IO_MONITORS_CONFIG_ASYNC); 415 } 416 417 int qxl_surface_id_alloc(struct qxl_device *qdev, 418 struct qxl_bo *surf) 419 { 420 uint32_t handle; 421 int idr_ret; 422 int count = 0; 423 again: 424 idr_preload(GFP_ATOMIC); 425 spin_lock(&qdev->surf_id_idr_lock); 426 idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, 1, 0, GFP_NOWAIT); 427 spin_unlock(&qdev->surf_id_idr_lock); 428 idr_preload_end(); 429 if (idr_ret < 0) 430 return idr_ret; 431 handle = idr_ret; 432 433 if (handle >= qdev->rom->n_surfaces) { 434 count++; 435 spin_lock(&qdev->surf_id_idr_lock); 436 idr_remove(&qdev->surf_id_idr, handle); 437 spin_unlock(&qdev->surf_id_idr_lock); 438 qxl_reap_surface_id(qdev, 2); 439 goto again; 440 } 441 surf->surface_id = handle; 442 443 spin_lock(&qdev->surf_id_idr_lock); 444 qdev->last_alloced_surf_id = handle; 445 spin_unlock(&qdev->surf_id_idr_lock); 446 return 0; 447 } 448 449 void qxl_surface_id_dealloc(struct qxl_device *qdev, 450 uint32_t surface_id) 451 { 452 spin_lock(&qdev->surf_id_idr_lock); 453 idr_remove(&qdev->surf_id_idr, surface_id); 454 spin_unlock(&qdev->surf_id_idr_lock); 455 } 456 457 int qxl_hw_surface_alloc(struct qxl_device *qdev, 458 struct qxl_bo *surf, 459 struct ttm_mem_reg *new_mem) 460 { 461 struct qxl_surface_cmd *cmd; 462 struct qxl_release *release; 463 int ret; 464 465 if (surf->hw_surf_alloc) 466 return 0; 467 468 ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_CREATE, 469 NULL, 470 &release); 471 if (ret) 472 return ret; 473 474 ret = qxl_release_reserve_list(release, true); 475 if (ret) 476 return ret; 477 478 cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); 479 cmd->type = QXL_SURFACE_CMD_CREATE; 480 cmd->flags = QXL_SURF_FLAG_KEEP_DATA; 481 cmd->u.surface_create.format = surf->surf.format; 482 cmd->u.surface_create.width = surf->surf.width; 483 cmd->u.surface_create.height = surf->surf.height; 484 cmd->u.surface_create.stride = surf->surf.stride; 485 if (new_mem) { 486 int slot_id = surf->type == QXL_GEM_DOMAIN_VRAM ? qdev->main_mem_slot : qdev->surfaces_mem_slot; 487 struct qxl_memslot *slot = &(qdev->mem_slots[slot_id]); 488 489 /* TODO - need to hold one of the locks to read tbo.offset */ 490 cmd->u.surface_create.data = slot->high_bits; 491 492 cmd->u.surface_create.data |= (new_mem->start << PAGE_SHIFT) + surf->tbo.bdev->man[new_mem->mem_type].gpu_offset; 493 } else 494 cmd->u.surface_create.data = qxl_bo_physical_address(qdev, surf, 0); 495 cmd->surface_id = surf->surface_id; 496 qxl_release_unmap(qdev, release, &cmd->release_info); 497 498 surf->surf_create = release; 499 500 /* no need to add a release to the fence for this surface bo, 501 since it is only released when we ask to destroy the surface 502 and it would never signal otherwise */ 503 qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); 504 qxl_release_fence_buffer_objects(release); 505 506 surf->hw_surf_alloc = true; 507 spin_lock(&qdev->surf_id_idr_lock); 508 idr_replace(&qdev->surf_id_idr, surf, surf->surface_id); 509 spin_unlock(&qdev->surf_id_idr_lock); 510 return 0; 511 } 512 513 int qxl_hw_surface_dealloc(struct qxl_device *qdev, 514 struct qxl_bo *surf) 515 { 516 struct qxl_surface_cmd *cmd; 517 struct qxl_release *release; 518 int ret; 519 int id; 520 521 if (!surf->hw_surf_alloc) 522 return 0; 523 524 ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_DESTROY, 525 surf->surf_create, 526 &release); 527 if (ret) 528 return ret; 529 530 surf->surf_create = NULL; 531 /* remove the surface from the idr, but not the surface id yet */ 532 spin_lock(&qdev->surf_id_idr_lock); 533 idr_replace(&qdev->surf_id_idr, NULL, surf->surface_id); 534 spin_unlock(&qdev->surf_id_idr_lock); 535 surf->hw_surf_alloc = false; 536 537 id = surf->surface_id; 538 surf->surface_id = 0; 539 540 release->surface_release_id = id; 541 cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release); 542 cmd->type = QXL_SURFACE_CMD_DESTROY; 543 cmd->surface_id = id; 544 qxl_release_unmap(qdev, release, &cmd->release_info); 545 546 qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false); 547 548 qxl_release_fence_buffer_objects(release); 549 550 return 0; 551 } 552 553 static int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf) 554 { 555 struct qxl_rect rect; 556 int ret; 557 558 /* if we are evicting, we need to make sure the surface is up 559 to date */ 560 rect.left = 0; 561 rect.right = surf->surf.width; 562 rect.top = 0; 563 rect.bottom = surf->surf.height; 564 retry: 565 ret = qxl_io_update_area(qdev, surf, &rect); 566 if (ret == -ERESTARTSYS) 567 goto retry; 568 return ret; 569 } 570 571 static void qxl_surface_evict_locked(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area) 572 { 573 /* no need to update area if we are just freeing the surface normally */ 574 if (do_update_area) 575 qxl_update_surface(qdev, surf); 576 577 /* nuke the surface id at the hw */ 578 qxl_hw_surface_dealloc(qdev, surf); 579 } 580 581 void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area) 582 { 583 mutex_lock(&qdev->surf_evict_mutex); 584 qxl_surface_evict_locked(qdev, surf, do_update_area); 585 mutex_unlock(&qdev->surf_evict_mutex); 586 } 587 588 static int qxl_reap_surf(struct qxl_device *qdev, struct qxl_bo *surf, bool stall) 589 { 590 int ret; 591 592 ret = qxl_bo_reserve(surf, false); 593 if (ret) 594 return ret; 595 596 if (stall) 597 mutex_unlock(&qdev->surf_evict_mutex); 598 599 ret = ttm_bo_wait(&surf->tbo, true, !stall); 600 601 if (stall) 602 mutex_lock(&qdev->surf_evict_mutex); 603 if (ret) { 604 qxl_bo_unreserve(surf); 605 return ret; 606 } 607 608 qxl_surface_evict_locked(qdev, surf, true); 609 qxl_bo_unreserve(surf); 610 return 0; 611 } 612 613 static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap) 614 { 615 int num_reaped = 0; 616 int i, ret; 617 bool stall = false; 618 int start = 0; 619 620 mutex_lock(&qdev->surf_evict_mutex); 621 again: 622 623 spin_lock(&qdev->surf_id_idr_lock); 624 start = qdev->last_alloced_surf_id + 1; 625 spin_unlock(&qdev->surf_id_idr_lock); 626 627 for (i = start; i < start + qdev->rom->n_surfaces; i++) { 628 void *objptr; 629 int surfid = i % qdev->rom->n_surfaces; 630 631 /* this avoids the case where the objects is in the 632 idr but has been evicted half way - its makes 633 the idr lookup atomic with the eviction */ 634 spin_lock(&qdev->surf_id_idr_lock); 635 objptr = idr_find(&qdev->surf_id_idr, surfid); 636 spin_unlock(&qdev->surf_id_idr_lock); 637 638 if (!objptr) 639 continue; 640 641 ret = qxl_reap_surf(qdev, objptr, stall); 642 if (ret == 0) 643 num_reaped++; 644 if (num_reaped >= max_to_reap) 645 break; 646 } 647 if (num_reaped == 0 && stall == false) { 648 stall = true; 649 goto again; 650 } 651 652 mutex_unlock(&qdev->surf_evict_mutex); 653 if (num_reaped) { 654 usleep_range(500, 1000); 655 qxl_queue_garbage_collect(qdev, true); 656 } 657 658 return 0; 659 } 660