xref: /linux/drivers/gpu/drm/panthor/panthor_device.c (revision 07fdad3a93756b872da7b53647715c48d0f4a2d0) 
1 // SPDX-License-Identifier: GPL-2.0 or MIT
2 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
3 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
4 /* Copyright 2023 Collabora ltd. */
5 
6 #include <linux/clk.h>
7 #include <linux/mm.h>
8 #include <linux/platform_device.h>
9 #include <linux/pm_domain.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/regulator/consumer.h>
12 #include <linux/reset.h>
13 
14 #include <drm/drm_drv.h>
15 #include <drm/drm_managed.h>
16 
17 #include "panthor_devfreq.h"
18 #include "panthor_device.h"
19 #include "panthor_fw.h"
20 #include "panthor_gpu.h"
21 #include "panthor_hw.h"
22 #include "panthor_mmu.h"
23 #include "panthor_regs.h"
24 #include "panthor_sched.h"
25 
26 static int panthor_gpu_coherency_init(struct panthor_device *ptdev)
27 {
28 	ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;
29 
30 	if (!ptdev->coherent)
31 		return 0;
32 
33 	/* Check if the ACE-Lite coherency protocol is actually supported by the GPU.
34 	 * ACE protocol has never been supported for command stream frontend GPUs.
35 	 */
36 	if ((gpu_read(ptdev, GPU_COHERENCY_FEATURES) &
37 		      GPU_COHERENCY_PROT_BIT(ACE_LITE)))
38 		return 0;
39 
40 	drm_err(&ptdev->base, "Coherency not supported by the device");
41 	return -ENOTSUPP;
42 }
43 
44 static int panthor_clk_init(struct panthor_device *ptdev)
45 {
46 	ptdev->clks.core = devm_clk_get(ptdev->base.dev, NULL);
47 	if (IS_ERR(ptdev->clks.core))
48 		return dev_err_probe(ptdev->base.dev,
49 				     PTR_ERR(ptdev->clks.core),
50 				     "get 'core' clock failed");
51 
52 	ptdev->clks.stacks = devm_clk_get_optional(ptdev->base.dev, "stacks");
53 	if (IS_ERR(ptdev->clks.stacks))
54 		return dev_err_probe(ptdev->base.dev,
55 				     PTR_ERR(ptdev->clks.stacks),
56 				     "get 'stacks' clock failed");
57 
58 	ptdev->clks.coregroup = devm_clk_get_optional(ptdev->base.dev, "coregroup");
59 	if (IS_ERR(ptdev->clks.coregroup))
60 		return dev_err_probe(ptdev->base.dev,
61 				     PTR_ERR(ptdev->clks.coregroup),
62 				     "get 'coregroup' clock failed");
63 
64 	drm_info(&ptdev->base, "clock rate = %lu\n", clk_get_rate(ptdev->clks.core));
65 	return 0;
66 }
67 
68 void panthor_device_unplug(struct panthor_device *ptdev)
69 {
70 	/* This function can be called from two different path: the reset work
71 	 * and the platform device remove callback. drm_dev_unplug() doesn't
72 	 * deal with concurrent callers, so we have to protect drm_dev_unplug()
73 	 * calls with our own lock, and bail out if the device is already
74 	 * unplugged.
75 	 */
76 	mutex_lock(&ptdev->unplug.lock);
77 	if (drm_dev_is_unplugged(&ptdev->base)) {
78 		/* Someone beat us, release the lock and wait for the unplug
79 		 * operation to be reported as done.
80 		 **/
81 		mutex_unlock(&ptdev->unplug.lock);
82 		wait_for_completion(&ptdev->unplug.done);
83 		return;
84 	}
85 
86 	/* Call drm_dev_unplug() so any access to HW blocks happening after
87 	 * that point get rejected.
88 	 */
89 	drm_dev_unplug(&ptdev->base);
90 
91 	/* We do the rest of the unplug with the unplug lock released,
92 	 * future callers will wait on ptdev->unplug.done anyway.
93 	 */
94 	mutex_unlock(&ptdev->unplug.lock);
95 
96 	drm_WARN_ON(&ptdev->base, pm_runtime_get_sync(ptdev->base.dev) < 0);
97 
98 	/* Now, try to cleanly shutdown the GPU before the device resources
99 	 * get reclaimed.
100 	 */
101 	panthor_sched_unplug(ptdev);
102 	panthor_fw_unplug(ptdev);
103 	panthor_mmu_unplug(ptdev);
104 	panthor_gpu_unplug(ptdev);
105 
106 	pm_runtime_dont_use_autosuspend(ptdev->base.dev);
107 	pm_runtime_put_sync_suspend(ptdev->base.dev);
108 
109 	/* If PM is disabled, we need to call the suspend handler manually. */
110 	if (!IS_ENABLED(CONFIG_PM))
111 		panthor_device_suspend(ptdev->base.dev);
112 
113 	/* Report the unplug operation as done to unblock concurrent
114 	 * panthor_device_unplug() callers.
115 	 */
116 	complete_all(&ptdev->unplug.done);
117 }
118 
119 static void panthor_device_reset_cleanup(struct drm_device *ddev, void *data)
120 {
121 	struct panthor_device *ptdev = container_of(ddev, struct panthor_device, base);
122 
123 	cancel_work_sync(&ptdev->reset.work);
124 	destroy_workqueue(ptdev->reset.wq);
125 }
126 
127 static void panthor_device_reset_work(struct work_struct *work)
128 {
129 	struct panthor_device *ptdev = container_of(work, struct panthor_device, reset.work);
130 	int ret = 0, cookie;
131 
132 	/* If the device is entering suspend, we don't reset. A slow reset will
133 	 * be forced at resume time instead.
134 	 */
135 	if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE)
136 		return;
137 
138 	if (!drm_dev_enter(&ptdev->base, &cookie))
139 		return;
140 
141 	panthor_sched_pre_reset(ptdev);
142 	panthor_fw_pre_reset(ptdev, true);
143 	panthor_mmu_pre_reset(ptdev);
144 	panthor_gpu_soft_reset(ptdev);
145 	panthor_gpu_l2_power_on(ptdev);
146 	panthor_mmu_post_reset(ptdev);
147 	ret = panthor_fw_post_reset(ptdev);
148 	atomic_set(&ptdev->reset.pending, 0);
149 	panthor_sched_post_reset(ptdev, ret != 0);
150 	drm_dev_exit(cookie);
151 
152 	if (ret) {
153 		panthor_device_unplug(ptdev);
154 		drm_err(&ptdev->base, "Failed to boot MCU after reset, making device unusable.");
155 	}
156 }
157 
158 static bool panthor_device_is_initialized(struct panthor_device *ptdev)
159 {
160 	return !!ptdev->scheduler;
161 }
162 
163 static void panthor_device_free_page(struct drm_device *ddev, void *data)
164 {
165 	__free_page(data);
166 }
167 
168 int panthor_device_init(struct panthor_device *ptdev)
169 {
170 	u32 *dummy_page_virt;
171 	struct resource *res;
172 	struct page *p;
173 	int ret;
174 
175 	init_completion(&ptdev->unplug.done);
176 	ret = drmm_mutex_init(&ptdev->base, &ptdev->unplug.lock);
177 	if (ret)
178 		return ret;
179 
180 	ret = drmm_mutex_init(&ptdev->base, &ptdev->pm.mmio_lock);
181 	if (ret)
182 		return ret;
183 
184 #ifdef CONFIG_DEBUG_FS
185 	drmm_mutex_init(&ptdev->base, &ptdev->gems.lock);
186 	INIT_LIST_HEAD(&ptdev->gems.node);
187 #endif
188 
189 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
190 	p = alloc_page(GFP_KERNEL | __GFP_ZERO);
191 	if (!p)
192 		return -ENOMEM;
193 
194 	ptdev->pm.dummy_latest_flush = p;
195 	dummy_page_virt = page_address(p);
196 	ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_free_page,
197 				       ptdev->pm.dummy_latest_flush);
198 	if (ret)
199 		return ret;
200 
201 	/*
202 	 * Set the dummy page holding the latest flush to 1. This will cause the
203 	 * flush to avoided as we know it isn't necessary if the submission
204 	 * happens while the dummy page is mapped. Zero cannot be used because
205 	 * that means 'always flush'.
206 	 */
207 	*dummy_page_virt = 1;
208 
209 	INIT_WORK(&ptdev->reset.work, panthor_device_reset_work);
210 	ptdev->reset.wq = alloc_ordered_workqueue("panthor-reset-wq", 0);
211 	if (!ptdev->reset.wq)
212 		return -ENOMEM;
213 
214 	ret = drmm_add_action_or_reset(&ptdev->base, panthor_device_reset_cleanup, NULL);
215 	if (ret)
216 		return ret;
217 
218 	ret = panthor_clk_init(ptdev);
219 	if (ret)
220 		return ret;
221 
222 	ret = panthor_devfreq_init(ptdev);
223 	if (ret)
224 		return ret;
225 
226 	ptdev->iomem = devm_platform_get_and_ioremap_resource(to_platform_device(ptdev->base.dev),
227 							      0, &res);
228 	if (IS_ERR(ptdev->iomem))
229 		return PTR_ERR(ptdev->iomem);
230 
231 	ptdev->phys_addr = res->start;
232 
233 	ret = devm_pm_runtime_enable(ptdev->base.dev);
234 	if (ret)
235 		return ret;
236 
237 	ret = pm_runtime_resume_and_get(ptdev->base.dev);
238 	if (ret)
239 		return ret;
240 
241 	/* If PM is disabled, we need to call panthor_device_resume() manually. */
242 	if (!IS_ENABLED(CONFIG_PM)) {
243 		ret = panthor_device_resume(ptdev->base.dev);
244 		if (ret)
245 			return ret;
246 	}
247 
248 	ret = panthor_hw_init(ptdev);
249 	if (ret)
250 		goto err_rpm_put;
251 
252 	ret = panthor_gpu_init(ptdev);
253 	if (ret)
254 		goto err_rpm_put;
255 
256 	ret = panthor_gpu_coherency_init(ptdev);
257 	if (ret)
258 		goto err_unplug_gpu;
259 
260 	ret = panthor_mmu_init(ptdev);
261 	if (ret)
262 		goto err_unplug_gpu;
263 
264 	ret = panthor_fw_init(ptdev);
265 	if (ret)
266 		goto err_unplug_mmu;
267 
268 	ret = panthor_sched_init(ptdev);
269 	if (ret)
270 		goto err_unplug_fw;
271 
272 	/* ~3 frames */
273 	pm_runtime_set_autosuspend_delay(ptdev->base.dev, 50);
274 	pm_runtime_use_autosuspend(ptdev->base.dev);
275 
276 	ret = drm_dev_register(&ptdev->base, 0);
277 	if (ret)
278 		goto err_disable_autosuspend;
279 
280 	pm_runtime_put_autosuspend(ptdev->base.dev);
281 	return 0;
282 
283 err_disable_autosuspend:
284 	pm_runtime_dont_use_autosuspend(ptdev->base.dev);
285 	panthor_sched_unplug(ptdev);
286 
287 err_unplug_fw:
288 	panthor_fw_unplug(ptdev);
289 
290 err_unplug_mmu:
291 	panthor_mmu_unplug(ptdev);
292 
293 err_unplug_gpu:
294 	panthor_gpu_unplug(ptdev);
295 
296 err_rpm_put:
297 	pm_runtime_put_sync_suspend(ptdev->base.dev);
298 	return ret;
299 }
300 
301 #define PANTHOR_EXCEPTION(id) \
302 	[DRM_PANTHOR_EXCEPTION_ ## id] = { \
303 		.name = #id, \
304 	}
305 
306 struct panthor_exception_info {
307 	const char *name;
308 };
309 
310 static const struct panthor_exception_info panthor_exception_infos[] = {
311 	PANTHOR_EXCEPTION(OK),
312 	PANTHOR_EXCEPTION(TERMINATED),
313 	PANTHOR_EXCEPTION(KABOOM),
314 	PANTHOR_EXCEPTION(EUREKA),
315 	PANTHOR_EXCEPTION(ACTIVE),
316 	PANTHOR_EXCEPTION(CS_RES_TERM),
317 	PANTHOR_EXCEPTION(CS_CONFIG_FAULT),
318 	PANTHOR_EXCEPTION(CS_UNRECOVERABLE),
319 	PANTHOR_EXCEPTION(CS_ENDPOINT_FAULT),
320 	PANTHOR_EXCEPTION(CS_BUS_FAULT),
321 	PANTHOR_EXCEPTION(CS_INSTR_INVALID),
322 	PANTHOR_EXCEPTION(CS_CALL_STACK_OVERFLOW),
323 	PANTHOR_EXCEPTION(CS_INHERIT_FAULT),
324 	PANTHOR_EXCEPTION(INSTR_INVALID_PC),
325 	PANTHOR_EXCEPTION(INSTR_INVALID_ENC),
326 	PANTHOR_EXCEPTION(INSTR_BARRIER_FAULT),
327 	PANTHOR_EXCEPTION(DATA_INVALID_FAULT),
328 	PANTHOR_EXCEPTION(TILE_RANGE_FAULT),
329 	PANTHOR_EXCEPTION(ADDR_RANGE_FAULT),
330 	PANTHOR_EXCEPTION(IMPRECISE_FAULT),
331 	PANTHOR_EXCEPTION(OOM),
332 	PANTHOR_EXCEPTION(CSF_FW_INTERNAL_ERROR),
333 	PANTHOR_EXCEPTION(CSF_RES_EVICTION_TIMEOUT),
334 	PANTHOR_EXCEPTION(GPU_BUS_FAULT),
335 	PANTHOR_EXCEPTION(GPU_SHAREABILITY_FAULT),
336 	PANTHOR_EXCEPTION(SYS_SHAREABILITY_FAULT),
337 	PANTHOR_EXCEPTION(GPU_CACHEABILITY_FAULT),
338 	PANTHOR_EXCEPTION(TRANSLATION_FAULT_0),
339 	PANTHOR_EXCEPTION(TRANSLATION_FAULT_1),
340 	PANTHOR_EXCEPTION(TRANSLATION_FAULT_2),
341 	PANTHOR_EXCEPTION(TRANSLATION_FAULT_3),
342 	PANTHOR_EXCEPTION(TRANSLATION_FAULT_4),
343 	PANTHOR_EXCEPTION(PERM_FAULT_0),
344 	PANTHOR_EXCEPTION(PERM_FAULT_1),
345 	PANTHOR_EXCEPTION(PERM_FAULT_2),
346 	PANTHOR_EXCEPTION(PERM_FAULT_3),
347 	PANTHOR_EXCEPTION(ACCESS_FLAG_1),
348 	PANTHOR_EXCEPTION(ACCESS_FLAG_2),
349 	PANTHOR_EXCEPTION(ACCESS_FLAG_3),
350 	PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_IN),
351 	PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT0),
352 	PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT1),
353 	PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT2),
354 	PANTHOR_EXCEPTION(ADDR_SIZE_FAULT_OUT3),
355 	PANTHOR_EXCEPTION(MEM_ATTR_FAULT_0),
356 	PANTHOR_EXCEPTION(MEM_ATTR_FAULT_1),
357 	PANTHOR_EXCEPTION(MEM_ATTR_FAULT_2),
358 	PANTHOR_EXCEPTION(MEM_ATTR_FAULT_3),
359 };
360 
361 const char *panthor_exception_name(struct panthor_device *ptdev, u32 exception_code)
362 {
363 	if (exception_code >= ARRAY_SIZE(panthor_exception_infos) ||
364 	    !panthor_exception_infos[exception_code].name)
365 		return "Unknown exception type";
366 
367 	return panthor_exception_infos[exception_code].name;
368 }
369 
370 static vm_fault_t panthor_mmio_vm_fault(struct vm_fault *vmf)
371 {
372 	struct vm_area_struct *vma = vmf->vma;
373 	struct panthor_device *ptdev = vma->vm_private_data;
374 	u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
375 	unsigned long pfn;
376 	pgprot_t pgprot;
377 	vm_fault_t ret;
378 	bool active;
379 	int cookie;
380 
381 	if (!drm_dev_enter(&ptdev->base, &cookie))
382 		return VM_FAULT_SIGBUS;
383 
384 	mutex_lock(&ptdev->pm.mmio_lock);
385 	active = atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE;
386 
387 	switch (offset) {
388 	case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
389 		if (active)
390 			pfn = __phys_to_pfn(ptdev->phys_addr + CSF_GPU_LATEST_FLUSH_ID);
391 		else
392 			pfn = page_to_pfn(ptdev->pm.dummy_latest_flush);
393 		break;
394 
395 	default:
396 		ret = VM_FAULT_SIGBUS;
397 		goto out_unlock;
398 	}
399 
400 	pgprot = vma->vm_page_prot;
401 	if (active)
402 		pgprot = pgprot_noncached(pgprot);
403 
404 	ret = vmf_insert_pfn_prot(vma, vmf->address, pfn, pgprot);
405 
406 out_unlock:
407 	mutex_unlock(&ptdev->pm.mmio_lock);
408 	drm_dev_exit(cookie);
409 	return ret;
410 }
411 
412 static const struct vm_operations_struct panthor_mmio_vm_ops = {
413 	.fault = panthor_mmio_vm_fault,
414 };
415 
416 int panthor_device_mmap_io(struct panthor_device *ptdev, struct vm_area_struct *vma)
417 {
418 	u64 offset = (u64)vma->vm_pgoff << PAGE_SHIFT;
419 
420 	if ((vma->vm_flags & VM_SHARED) == 0)
421 		return -EINVAL;
422 
423 	switch (offset) {
424 	case DRM_PANTHOR_USER_FLUSH_ID_MMIO_OFFSET:
425 		if (vma->vm_end - vma->vm_start != PAGE_SIZE ||
426 		    (vma->vm_flags & (VM_WRITE | VM_EXEC)))
427 			return -EINVAL;
428 		vm_flags_clear(vma, VM_MAYWRITE);
429 
430 		break;
431 
432 	default:
433 		return -EINVAL;
434 	}
435 
436 	/* Defer actual mapping to the fault handler. */
437 	vma->vm_private_data = ptdev;
438 	vma->vm_ops = &panthor_mmio_vm_ops;
439 	vm_flags_set(vma,
440 		     VM_IO | VM_DONTCOPY | VM_DONTEXPAND |
441 		     VM_NORESERVE | VM_DONTDUMP | VM_PFNMAP);
442 	return 0;
443 }
444 
445 static int panthor_device_resume_hw_components(struct panthor_device *ptdev)
446 {
447 	int ret;
448 
449 	panthor_gpu_resume(ptdev);
450 	panthor_mmu_resume(ptdev);
451 
452 	ret = panthor_fw_resume(ptdev);
453 	if (!ret)
454 		return 0;
455 
456 	panthor_mmu_suspend(ptdev);
457 	panthor_gpu_suspend(ptdev);
458 	return ret;
459 }
460 
461 int panthor_device_resume(struct device *dev)
462 {
463 	struct panthor_device *ptdev = dev_get_drvdata(dev);
464 	int ret, cookie;
465 
466 	if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_SUSPENDED)
467 		return -EINVAL;
468 
469 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_RESUMING);
470 
471 	ret = clk_prepare_enable(ptdev->clks.core);
472 	if (ret)
473 		goto err_set_suspended;
474 
475 	ret = clk_prepare_enable(ptdev->clks.stacks);
476 	if (ret)
477 		goto err_disable_core_clk;
478 
479 	ret = clk_prepare_enable(ptdev->clks.coregroup);
480 	if (ret)
481 		goto err_disable_stacks_clk;
482 
483 	panthor_devfreq_resume(ptdev);
484 
485 	if (panthor_device_is_initialized(ptdev) &&
486 	    drm_dev_enter(&ptdev->base, &cookie)) {
487 		/* If there was a reset pending at the time we suspended the
488 		 * device, we force a slow reset.
489 		 */
490 		if (atomic_read(&ptdev->reset.pending)) {
491 			ptdev->reset.fast = false;
492 			atomic_set(&ptdev->reset.pending, 0);
493 		}
494 
495 		ret = panthor_device_resume_hw_components(ptdev);
496 		if (ret && ptdev->reset.fast) {
497 			drm_err(&ptdev->base, "Fast reset failed, trying a slow reset");
498 			ptdev->reset.fast = false;
499 			ret = panthor_device_resume_hw_components(ptdev);
500 		}
501 
502 		if (!ret)
503 			panthor_sched_resume(ptdev);
504 
505 		drm_dev_exit(cookie);
506 
507 		if (ret)
508 			goto err_suspend_devfreq;
509 	}
510 
511 	/* Clear all IOMEM mappings pointing to this device after we've
512 	 * resumed. This way the fake mappings pointing to the dummy pages
513 	 * are removed and the real iomem mapping will be restored on next
514 	 * access.
515 	 */
516 	mutex_lock(&ptdev->pm.mmio_lock);
517 	unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
518 			    DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
519 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_ACTIVE);
520 	mutex_unlock(&ptdev->pm.mmio_lock);
521 	return 0;
522 
523 err_suspend_devfreq:
524 	panthor_devfreq_suspend(ptdev);
525 	clk_disable_unprepare(ptdev->clks.coregroup);
526 
527 err_disable_stacks_clk:
528 	clk_disable_unprepare(ptdev->clks.stacks);
529 
530 err_disable_core_clk:
531 	clk_disable_unprepare(ptdev->clks.core);
532 
533 err_set_suspended:
534 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
535 	atomic_set(&ptdev->pm.recovery_needed, 1);
536 	return ret;
537 }
538 
539 int panthor_device_suspend(struct device *dev)
540 {
541 	struct panthor_device *ptdev = dev_get_drvdata(dev);
542 	int cookie;
543 
544 	if (atomic_read(&ptdev->pm.state) != PANTHOR_DEVICE_PM_STATE_ACTIVE)
545 		return -EINVAL;
546 
547 	/* Clear all IOMEM mappings pointing to this device before we
548 	 * shutdown the power-domain and clocks. Failing to do that results
549 	 * in external aborts when the process accesses the iomem region.
550 	 * We change the state and call unmap_mapping_range() with the
551 	 * mmio_lock held to make sure the vm_fault handler won't set up
552 	 * invalid mappings.
553 	 */
554 	mutex_lock(&ptdev->pm.mmio_lock);
555 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDING);
556 	unmap_mapping_range(ptdev->base.anon_inode->i_mapping,
557 			    DRM_PANTHOR_USER_MMIO_OFFSET, 0, 1);
558 	mutex_unlock(&ptdev->pm.mmio_lock);
559 
560 	if (panthor_device_is_initialized(ptdev) &&
561 	    drm_dev_enter(&ptdev->base, &cookie)) {
562 		cancel_work_sync(&ptdev->reset.work);
563 
564 		/* We prepare everything as if we were resetting the GPU.
565 		 * The end of the reset will happen in the resume path though.
566 		 */
567 		panthor_sched_suspend(ptdev);
568 		panthor_fw_suspend(ptdev);
569 		panthor_mmu_suspend(ptdev);
570 		panthor_gpu_suspend(ptdev);
571 		drm_dev_exit(cookie);
572 	}
573 
574 	panthor_devfreq_suspend(ptdev);
575 
576 	clk_disable_unprepare(ptdev->clks.coregroup);
577 	clk_disable_unprepare(ptdev->clks.stacks);
578 	clk_disable_unprepare(ptdev->clks.core);
579 	atomic_set(&ptdev->pm.state, PANTHOR_DEVICE_PM_STATE_SUSPENDED);
580 	return 0;
581 }
582