1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */ 3 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */ 4 5 #ifndef __PANFROST_DEVICE_H__ 6 #define __PANFROST_DEVICE_H__ 7 8 #include <linux/atomic.h> 9 #include <linux/io-pgtable.h> 10 #include <linux/pm.h> 11 #include <linux/regulator/consumer.h> 12 #include <linux/spinlock.h> 13 #include <drm/drm_device.h> 14 #include <drm/drm_mm.h> 15 #include <drm/gpu_scheduler.h> 16 17 #include "panfrost_devfreq.h" 18 19 struct panfrost_device; 20 struct panfrost_mmu; 21 struct panfrost_job_slot; 22 struct panfrost_job; 23 struct panfrost_perfcnt; 24 25 #define NUM_JOB_SLOTS 3 26 #define MAX_PM_DOMAINS 5 27 28 enum panfrost_drv_comp_bits { 29 PANFROST_COMP_BIT_GPU, 30 PANFROST_COMP_BIT_JOB, 31 PANFROST_COMP_BIT_MMU, 32 PANFROST_COMP_BIT_MAX 33 }; 34 35 /** 36 * enum panfrost_gpu_pm - Supported kernel power management features 37 * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend 38 * @GPU_PM_VREG_OFF: Allow turning off regulators during system suspend 39 */ 40 enum panfrost_gpu_pm { 41 GPU_PM_CLK_DIS, 42 GPU_PM_VREG_OFF, 43 }; 44 45 /** 46 * enum panfrost_gpu_quirks - GPU optional quirks 47 * @GPU_QUIRK_FORCE_AARCH64_PGTABLE: Use AARCH64_4K page table format 48 */ 49 enum panfrost_gpu_quirks { 50 GPU_QUIRK_FORCE_AARCH64_PGTABLE, 51 }; 52 53 struct panfrost_features { 54 u16 id; 55 u16 revision; 56 57 u64 shader_present; 58 u64 tiler_present; 59 u64 l2_present; 60 u64 stack_present; 61 u32 as_present; 62 u32 js_present; 63 64 u32 l2_features; 65 u32 core_features; 66 u32 tiler_features; 67 u32 mem_features; 68 u32 mmu_features; 69 u32 thread_features; 70 u32 max_threads; 71 u32 thread_max_workgroup_sz; 72 u32 thread_max_barrier_sz; 73 u32 coherency_features; 74 u32 afbc_features; 75 u32 texture_features[4]; 76 u32 js_features[16]; 77 78 u32 nr_core_groups; 79 u32 thread_tls_alloc; 80 81 unsigned long hw_features[64 / BITS_PER_LONG]; 82 unsigned long hw_issues[64 / BITS_PER_LONG]; 83 }; 84 85 /* 86 * Features that cannot be automatically detected and need matching using the 87 * compatible string, typically SoC-specific. 88 */ 89 struct panfrost_compatible { 90 /* Supplies count and names. */ 91 int num_supplies; 92 const char * const *supply_names; 93 /* 94 * Number of power domains required, note that values 0 and 1 are 95 * handled identically, as only values > 1 need special handling. 96 */ 97 int num_pm_domains; 98 /* Only required if num_pm_domains > 1. */ 99 const char * const *pm_domain_names; 100 101 /* Vendor implementation quirks callback */ 102 void (*vendor_quirk)(struct panfrost_device *pfdev); 103 104 /* Allowed PM features */ 105 u8 pm_features; 106 107 /* GPU configuration quirks */ 108 u8 gpu_quirks; 109 }; 110 111 struct panfrost_device { 112 struct device *dev; 113 struct drm_device *ddev; 114 struct platform_device *pdev; 115 int gpu_irq; 116 int mmu_irq; 117 118 void __iomem *iomem; 119 struct clk *clock; 120 struct clk *bus_clock; 121 struct regulator_bulk_data *regulators; 122 struct reset_control *rstc; 123 /* pm_domains for devices with more than one. */ 124 struct device *pm_domain_devs[MAX_PM_DOMAINS]; 125 struct device_link *pm_domain_links[MAX_PM_DOMAINS]; 126 bool coherent; 127 128 struct panfrost_features features; 129 const struct panfrost_compatible *comp; 130 DECLARE_BITMAP(is_suspended, PANFROST_COMP_BIT_MAX); 131 132 spinlock_t as_lock; 133 unsigned long as_in_use_mask; 134 unsigned long as_alloc_mask; 135 unsigned long as_faulty_mask; 136 struct list_head as_lru_list; 137 138 struct panfrost_job_slot *js; 139 140 struct panfrost_job *jobs[NUM_JOB_SLOTS][2]; 141 struct list_head scheduled_jobs; 142 143 struct panfrost_perfcnt *perfcnt; 144 bool profile_mode; 145 146 struct mutex sched_lock; 147 148 struct { 149 struct workqueue_struct *wq; 150 struct work_struct work; 151 atomic_t pending; 152 } reset; 153 154 struct mutex shrinker_lock; 155 struct list_head shrinker_list; 156 struct shrinker *shrinker; 157 158 struct panfrost_devfreq pfdevfreq; 159 160 struct { 161 atomic_t use_count; 162 spinlock_t lock; 163 } cycle_counter; 164 }; 165 166 struct panfrost_mmu { 167 struct panfrost_device *pfdev; 168 struct kref refcount; 169 struct io_pgtable_cfg pgtbl_cfg; 170 struct io_pgtable_ops *pgtbl_ops; 171 struct drm_mm mm; 172 spinlock_t mm_lock; 173 int as; 174 atomic_t as_count; 175 struct list_head list; 176 struct { 177 u64 transtab; 178 u64 memattr; 179 u64 transcfg; 180 } cfg; 181 }; 182 183 struct panfrost_engine_usage { 184 unsigned long long elapsed_ns[NUM_JOB_SLOTS]; 185 unsigned long long cycles[NUM_JOB_SLOTS]; 186 }; 187 188 struct panfrost_file_priv { 189 struct panfrost_device *pfdev; 190 191 struct drm_sched_entity sched_entity[NUM_JOB_SLOTS]; 192 193 struct panfrost_mmu *mmu; 194 195 struct panfrost_engine_usage engine_usage; 196 }; 197 198 static inline struct panfrost_device *to_panfrost_device(struct drm_device *ddev) 199 { 200 return ddev->dev_private; 201 } 202 203 static inline int panfrost_model_cmp(struct panfrost_device *pfdev, s32 id) 204 { 205 s32 match_id = pfdev->features.id; 206 207 if (match_id & 0xf000) 208 match_id &= 0xf00f; 209 return match_id - id; 210 } 211 212 static inline bool panfrost_model_is_bifrost(struct panfrost_device *pfdev) 213 { 214 return panfrost_model_cmp(pfdev, 0x1000) >= 0; 215 } 216 217 static inline bool panfrost_model_eq(struct panfrost_device *pfdev, s32 id) 218 { 219 return !panfrost_model_cmp(pfdev, id); 220 } 221 222 int panfrost_unstable_ioctl_check(void); 223 224 int panfrost_device_init(struct panfrost_device *pfdev); 225 void panfrost_device_fini(struct panfrost_device *pfdev); 226 void panfrost_device_reset(struct panfrost_device *pfdev); 227 228 extern const struct dev_pm_ops panfrost_pm_ops; 229 230 enum drm_panfrost_exception_type { 231 DRM_PANFROST_EXCEPTION_OK = 0x00, 232 DRM_PANFROST_EXCEPTION_DONE = 0x01, 233 DRM_PANFROST_EXCEPTION_INTERRUPTED = 0x02, 234 DRM_PANFROST_EXCEPTION_STOPPED = 0x03, 235 DRM_PANFROST_EXCEPTION_TERMINATED = 0x04, 236 DRM_PANFROST_EXCEPTION_KABOOM = 0x05, 237 DRM_PANFROST_EXCEPTION_EUREKA = 0x06, 238 DRM_PANFROST_EXCEPTION_ACTIVE = 0x08, 239 DRM_PANFROST_EXCEPTION_MAX_NON_FAULT = 0x3f, 240 DRM_PANFROST_EXCEPTION_JOB_CONFIG_FAULT = 0x40, 241 DRM_PANFROST_EXCEPTION_JOB_POWER_FAULT = 0x41, 242 DRM_PANFROST_EXCEPTION_JOB_READ_FAULT = 0x42, 243 DRM_PANFROST_EXCEPTION_JOB_WRITE_FAULT = 0x43, 244 DRM_PANFROST_EXCEPTION_JOB_AFFINITY_FAULT = 0x44, 245 DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT = 0x48, 246 DRM_PANFROST_EXCEPTION_INSTR_INVALID_PC = 0x50, 247 DRM_PANFROST_EXCEPTION_INSTR_INVALID_ENC = 0x51, 248 DRM_PANFROST_EXCEPTION_INSTR_TYPE_MISMATCH = 0x52, 249 DRM_PANFROST_EXCEPTION_INSTR_OPERAND_FAULT = 0x53, 250 DRM_PANFROST_EXCEPTION_INSTR_TLS_FAULT = 0x54, 251 DRM_PANFROST_EXCEPTION_INSTR_BARRIER_FAULT = 0x55, 252 DRM_PANFROST_EXCEPTION_INSTR_ALIGN_FAULT = 0x56, 253 DRM_PANFROST_EXCEPTION_DATA_INVALID_FAULT = 0x58, 254 DRM_PANFROST_EXCEPTION_TILE_RANGE_FAULT = 0x59, 255 DRM_PANFROST_EXCEPTION_ADDR_RANGE_FAULT = 0x5a, 256 DRM_PANFROST_EXCEPTION_IMPRECISE_FAULT = 0x5b, 257 DRM_PANFROST_EXCEPTION_OOM = 0x60, 258 DRM_PANFROST_EXCEPTION_OOM_AFBC = 0x61, 259 DRM_PANFROST_EXCEPTION_UNKNOWN = 0x7f, 260 DRM_PANFROST_EXCEPTION_DELAYED_BUS_FAULT = 0x80, 261 DRM_PANFROST_EXCEPTION_GPU_SHAREABILITY_FAULT = 0x88, 262 DRM_PANFROST_EXCEPTION_SYS_SHAREABILITY_FAULT = 0x89, 263 DRM_PANFROST_EXCEPTION_GPU_CACHEABILITY_FAULT = 0x8a, 264 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_0 = 0xc0, 265 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_1 = 0xc1, 266 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_2 = 0xc2, 267 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_3 = 0xc3, 268 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_4 = 0xc4, 269 DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_IDENTITY = 0xc7, 270 DRM_PANFROST_EXCEPTION_PERM_FAULT_0 = 0xc8, 271 DRM_PANFROST_EXCEPTION_PERM_FAULT_1 = 0xc9, 272 DRM_PANFROST_EXCEPTION_PERM_FAULT_2 = 0xca, 273 DRM_PANFROST_EXCEPTION_PERM_FAULT_3 = 0xcb, 274 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_0 = 0xd0, 275 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_1 = 0xd1, 276 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_2 = 0xd2, 277 DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_3 = 0xd3, 278 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_0 = 0xd8, 279 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_1 = 0xd9, 280 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_2 = 0xda, 281 DRM_PANFROST_EXCEPTION_ACCESS_FLAG_3 = 0xdb, 282 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN0 = 0xe0, 283 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN1 = 0xe1, 284 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN2 = 0xe2, 285 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN3 = 0xe3, 286 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT0 = 0xe4, 287 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT1 = 0xe5, 288 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT2 = 0xe6, 289 DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT3 = 0xe7, 290 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_0 = 0xe8, 291 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_1 = 0xe9, 292 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_2 = 0xea, 293 DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_3 = 0xeb, 294 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_0 = 0xec, 295 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_1 = 0xed, 296 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_2 = 0xee, 297 DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_3 = 0xef, 298 }; 299 300 static inline bool 301 panfrost_exception_is_fault(u32 exception_code) 302 { 303 return exception_code > DRM_PANFROST_EXCEPTION_MAX_NON_FAULT; 304 } 305 306 const char *panfrost_exception_name(u32 exception_code); 307 bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev, 308 u32 exception_code); 309 310 static inline void 311 panfrost_device_schedule_reset(struct panfrost_device *pfdev) 312 { 313 atomic_set(&pfdev->reset.pending, 1); 314 queue_work(pfdev->reset.wq, &pfdev->reset.work); 315 } 316 317 #endif 318