xref: /linux/drivers/gpu/drm/panel/panel-simple.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * Copyright (C) 2013, NVIDIA Corporation.  All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the
12  * next paragraph) shall be included in all copies or substantial portions
13  * of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  */
23 
24 #include <linux/backlight.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/module.h>
27 #include <linux/of_platform.h>
28 #include <linux/platform_device.h>
29 #include <linux/regulator/consumer.h>
30 
31 #include <drm/drmP.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_mipi_dsi.h>
34 #include <drm/drm_panel.h>
35 
36 struct panel_desc {
37 	const struct drm_display_mode *modes;
38 	unsigned int num_modes;
39 
40 	unsigned int bpc;
41 
42 	struct {
43 		unsigned int width;
44 		unsigned int height;
45 	} size;
46 
47 	/**
48 	 * @prepare: the time (in milliseconds) that it takes for the panel to
49 	 *           become ready and start receiving video data
50 	 * @enable: the time (in milliseconds) that it takes for the panel to
51 	 *          display the first valid frame after starting to receive
52 	 *          video data
53 	 * @disable: the time (in milliseconds) that it takes for the panel to
54 	 *           turn the display off (no content is visible)
55 	 * @unprepare: the time (in milliseconds) that it takes for the panel
56 	 *             to power itself down completely
57 	 */
58 	struct {
59 		unsigned int prepare;
60 		unsigned int enable;
61 		unsigned int disable;
62 		unsigned int unprepare;
63 	} delay;
64 
65 	u32 bus_format;
66 };
67 
68 struct panel_simple {
69 	struct drm_panel base;
70 	bool prepared;
71 	bool enabled;
72 
73 	const struct panel_desc *desc;
74 
75 	struct backlight_device *backlight;
76 	struct regulator *supply;
77 	struct i2c_adapter *ddc;
78 
79 	struct gpio_desc *enable_gpio;
80 };
81 
82 static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
83 {
84 	return container_of(panel, struct panel_simple, base);
85 }
86 
87 static int panel_simple_get_fixed_modes(struct panel_simple *panel)
88 {
89 	struct drm_connector *connector = panel->base.connector;
90 	struct drm_device *drm = panel->base.drm;
91 	struct drm_display_mode *mode;
92 	unsigned int i, num = 0;
93 
94 	if (!panel->desc)
95 		return 0;
96 
97 	for (i = 0; i < panel->desc->num_modes; i++) {
98 		const struct drm_display_mode *m = &panel->desc->modes[i];
99 
100 		mode = drm_mode_duplicate(drm, m);
101 		if (!mode) {
102 			dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
103 				m->hdisplay, m->vdisplay, m->vrefresh);
104 			continue;
105 		}
106 
107 		drm_mode_set_name(mode);
108 
109 		drm_mode_probed_add(connector, mode);
110 		num++;
111 	}
112 
113 	connector->display_info.bpc = panel->desc->bpc;
114 	connector->display_info.width_mm = panel->desc->size.width;
115 	connector->display_info.height_mm = panel->desc->size.height;
116 	if (panel->desc->bus_format)
117 		drm_display_info_set_bus_formats(&connector->display_info,
118 						 &panel->desc->bus_format, 1);
119 
120 	return num;
121 }
122 
123 static int panel_simple_disable(struct drm_panel *panel)
124 {
125 	struct panel_simple *p = to_panel_simple(panel);
126 
127 	if (!p->enabled)
128 		return 0;
129 
130 	if (p->backlight) {
131 		p->backlight->props.power = FB_BLANK_POWERDOWN;
132 		backlight_update_status(p->backlight);
133 	}
134 
135 	if (p->desc->delay.disable)
136 		msleep(p->desc->delay.disable);
137 
138 	p->enabled = false;
139 
140 	return 0;
141 }
142 
143 static int panel_simple_unprepare(struct drm_panel *panel)
144 {
145 	struct panel_simple *p = to_panel_simple(panel);
146 
147 	if (!p->prepared)
148 		return 0;
149 
150 	if (p->enable_gpio)
151 		gpiod_set_value_cansleep(p->enable_gpio, 0);
152 
153 	regulator_disable(p->supply);
154 
155 	if (p->desc->delay.unprepare)
156 		msleep(p->desc->delay.unprepare);
157 
158 	p->prepared = false;
159 
160 	return 0;
161 }
162 
163 static int panel_simple_prepare(struct drm_panel *panel)
164 {
165 	struct panel_simple *p = to_panel_simple(panel);
166 	int err;
167 
168 	if (p->prepared)
169 		return 0;
170 
171 	err = regulator_enable(p->supply);
172 	if (err < 0) {
173 		dev_err(panel->dev, "failed to enable supply: %d\n", err);
174 		return err;
175 	}
176 
177 	if (p->enable_gpio)
178 		gpiod_set_value_cansleep(p->enable_gpio, 1);
179 
180 	if (p->desc->delay.prepare)
181 		msleep(p->desc->delay.prepare);
182 
183 	p->prepared = true;
184 
185 	return 0;
186 }
187 
188 static int panel_simple_enable(struct drm_panel *panel)
189 {
190 	struct panel_simple *p = to_panel_simple(panel);
191 
192 	if (p->enabled)
193 		return 0;
194 
195 	if (p->desc->delay.enable)
196 		msleep(p->desc->delay.enable);
197 
198 	if (p->backlight) {
199 		p->backlight->props.power = FB_BLANK_UNBLANK;
200 		backlight_update_status(p->backlight);
201 	}
202 
203 	p->enabled = true;
204 
205 	return 0;
206 }
207 
208 static int panel_simple_get_modes(struct drm_panel *panel)
209 {
210 	struct panel_simple *p = to_panel_simple(panel);
211 	int num = 0;
212 
213 	/* probe EDID if a DDC bus is available */
214 	if (p->ddc) {
215 		struct edid *edid = drm_get_edid(panel->connector, p->ddc);
216 		drm_mode_connector_update_edid_property(panel->connector, edid);
217 		if (edid) {
218 			num += drm_add_edid_modes(panel->connector, edid);
219 			kfree(edid);
220 		}
221 	}
222 
223 	/* add hard-coded panel modes */
224 	num += panel_simple_get_fixed_modes(p);
225 
226 	return num;
227 }
228 
229 static const struct drm_panel_funcs panel_simple_funcs = {
230 	.disable = panel_simple_disable,
231 	.unprepare = panel_simple_unprepare,
232 	.prepare = panel_simple_prepare,
233 	.enable = panel_simple_enable,
234 	.get_modes = panel_simple_get_modes,
235 };
236 
237 static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
238 {
239 	struct device_node *backlight, *ddc;
240 	struct panel_simple *panel;
241 	int err;
242 
243 	panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
244 	if (!panel)
245 		return -ENOMEM;
246 
247 	panel->enabled = false;
248 	panel->prepared = false;
249 	panel->desc = desc;
250 
251 	panel->supply = devm_regulator_get(dev, "power");
252 	if (IS_ERR(panel->supply))
253 		return PTR_ERR(panel->supply);
254 
255 	panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
256 						     GPIOD_OUT_LOW);
257 	if (IS_ERR(panel->enable_gpio)) {
258 		err = PTR_ERR(panel->enable_gpio);
259 		dev_err(dev, "failed to request GPIO: %d\n", err);
260 		return err;
261 	}
262 
263 	backlight = of_parse_phandle(dev->of_node, "backlight", 0);
264 	if (backlight) {
265 		panel->backlight = of_find_backlight_by_node(backlight);
266 		of_node_put(backlight);
267 
268 		if (!panel->backlight)
269 			return -EPROBE_DEFER;
270 	}
271 
272 	ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
273 	if (ddc) {
274 		panel->ddc = of_find_i2c_adapter_by_node(ddc);
275 		of_node_put(ddc);
276 
277 		if (!panel->ddc) {
278 			err = -EPROBE_DEFER;
279 			goto free_backlight;
280 		}
281 	}
282 
283 	drm_panel_init(&panel->base);
284 	panel->base.dev = dev;
285 	panel->base.funcs = &panel_simple_funcs;
286 
287 	err = drm_panel_add(&panel->base);
288 	if (err < 0)
289 		goto free_ddc;
290 
291 	dev_set_drvdata(dev, panel);
292 
293 	return 0;
294 
295 free_ddc:
296 	if (panel->ddc)
297 		put_device(&panel->ddc->dev);
298 free_backlight:
299 	if (panel->backlight)
300 		put_device(&panel->backlight->dev);
301 
302 	return err;
303 }
304 
305 static int panel_simple_remove(struct device *dev)
306 {
307 	struct panel_simple *panel = dev_get_drvdata(dev);
308 
309 	drm_panel_detach(&panel->base);
310 	drm_panel_remove(&panel->base);
311 
312 	panel_simple_disable(&panel->base);
313 
314 	if (panel->ddc)
315 		put_device(&panel->ddc->dev);
316 
317 	if (panel->backlight)
318 		put_device(&panel->backlight->dev);
319 
320 	return 0;
321 }
322 
323 static void panel_simple_shutdown(struct device *dev)
324 {
325 	struct panel_simple *panel = dev_get_drvdata(dev);
326 
327 	panel_simple_disable(&panel->base);
328 }
329 
330 static const struct drm_display_mode auo_b101aw03_mode = {
331 	.clock = 51450,
332 	.hdisplay = 1024,
333 	.hsync_start = 1024 + 156,
334 	.hsync_end = 1024 + 156 + 8,
335 	.htotal = 1024 + 156 + 8 + 156,
336 	.vdisplay = 600,
337 	.vsync_start = 600 + 16,
338 	.vsync_end = 600 + 16 + 6,
339 	.vtotal = 600 + 16 + 6 + 16,
340 	.vrefresh = 60,
341 };
342 
343 static const struct panel_desc auo_b101aw03 = {
344 	.modes = &auo_b101aw03_mode,
345 	.num_modes = 1,
346 	.bpc = 6,
347 	.size = {
348 		.width = 223,
349 		.height = 125,
350 	},
351 };
352 
353 static const struct drm_display_mode auo_b101xtn01_mode = {
354 	.clock = 72000,
355 	.hdisplay = 1366,
356 	.hsync_start = 1366 + 20,
357 	.hsync_end = 1366 + 20 + 70,
358 	.htotal = 1366 + 20 + 70,
359 	.vdisplay = 768,
360 	.vsync_start = 768 + 14,
361 	.vsync_end = 768 + 14 + 42,
362 	.vtotal = 768 + 14 + 42,
363 	.vrefresh = 60,
364 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
365 };
366 
367 static const struct panel_desc auo_b101xtn01 = {
368 	.modes = &auo_b101xtn01_mode,
369 	.num_modes = 1,
370 	.bpc = 6,
371 	.size = {
372 		.width = 223,
373 		.height = 125,
374 	},
375 };
376 
377 static const struct drm_display_mode auo_b116xw03_mode = {
378 	.clock = 70589,
379 	.hdisplay = 1366,
380 	.hsync_start = 1366 + 40,
381 	.hsync_end = 1366 + 40 + 40,
382 	.htotal = 1366 + 40 + 40 + 32,
383 	.vdisplay = 768,
384 	.vsync_start = 768 + 10,
385 	.vsync_end = 768 + 10 + 12,
386 	.vtotal = 768 + 10 + 12 + 6,
387 	.vrefresh = 60,
388 };
389 
390 static const struct panel_desc auo_b116xw03 = {
391 	.modes = &auo_b116xw03_mode,
392 	.num_modes = 1,
393 	.bpc = 6,
394 	.size = {
395 		.width = 256,
396 		.height = 144,
397 	},
398 };
399 
400 static const struct drm_display_mode auo_b133xtn01_mode = {
401 	.clock = 69500,
402 	.hdisplay = 1366,
403 	.hsync_start = 1366 + 48,
404 	.hsync_end = 1366 + 48 + 32,
405 	.htotal = 1366 + 48 + 32 + 20,
406 	.vdisplay = 768,
407 	.vsync_start = 768 + 3,
408 	.vsync_end = 768 + 3 + 6,
409 	.vtotal = 768 + 3 + 6 + 13,
410 	.vrefresh = 60,
411 };
412 
413 static const struct panel_desc auo_b133xtn01 = {
414 	.modes = &auo_b133xtn01_mode,
415 	.num_modes = 1,
416 	.bpc = 6,
417 	.size = {
418 		.width = 293,
419 		.height = 165,
420 	},
421 };
422 
423 static const struct drm_display_mode auo_b133htn01_mode = {
424 	.clock = 150660,
425 	.hdisplay = 1920,
426 	.hsync_start = 1920 + 172,
427 	.hsync_end = 1920 + 172 + 80,
428 	.htotal = 1920 + 172 + 80 + 60,
429 	.vdisplay = 1080,
430 	.vsync_start = 1080 + 25,
431 	.vsync_end = 1080 + 25 + 10,
432 	.vtotal = 1080 + 25 + 10 + 10,
433 	.vrefresh = 60,
434 };
435 
436 static const struct panel_desc auo_b133htn01 = {
437 	.modes = &auo_b133htn01_mode,
438 	.num_modes = 1,
439 	.bpc = 6,
440 	.size = {
441 		.width = 293,
442 		.height = 165,
443 	},
444 	.delay = {
445 		.prepare = 105,
446 		.enable = 20,
447 		.unprepare = 50,
448 	},
449 };
450 
451 static const struct drm_display_mode avic_tm070ddh03_mode = {
452 	.clock = 51200,
453 	.hdisplay = 1024,
454 	.hsync_start = 1024 + 160,
455 	.hsync_end = 1024 + 160 + 4,
456 	.htotal = 1024 + 160 + 4 + 156,
457 	.vdisplay = 600,
458 	.vsync_start = 600 + 17,
459 	.vsync_end = 600 + 17 + 1,
460 	.vtotal = 600 + 17 + 1 + 17,
461 	.vrefresh = 60,
462 };
463 
464 static const struct panel_desc avic_tm070ddh03 = {
465 	.modes = &avic_tm070ddh03_mode,
466 	.num_modes = 1,
467 	.bpc = 8,
468 	.size = {
469 		.width = 154,
470 		.height = 90,
471 	},
472 	.delay = {
473 		.prepare = 20,
474 		.enable = 200,
475 		.disable = 200,
476 	},
477 };
478 
479 static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
480 	.clock = 72070,
481 	.hdisplay = 1366,
482 	.hsync_start = 1366 + 58,
483 	.hsync_end = 1366 + 58 + 58,
484 	.htotal = 1366 + 58 + 58 + 58,
485 	.vdisplay = 768,
486 	.vsync_start = 768 + 4,
487 	.vsync_end = 768 + 4 + 4,
488 	.vtotal = 768 + 4 + 4 + 4,
489 	.vrefresh = 60,
490 };
491 
492 static const struct panel_desc chunghwa_claa101wa01a = {
493 	.modes = &chunghwa_claa101wa01a_mode,
494 	.num_modes = 1,
495 	.bpc = 6,
496 	.size = {
497 		.width = 220,
498 		.height = 120,
499 	},
500 };
501 
502 static const struct drm_display_mode chunghwa_claa101wb01_mode = {
503 	.clock = 69300,
504 	.hdisplay = 1366,
505 	.hsync_start = 1366 + 48,
506 	.hsync_end = 1366 + 48 + 32,
507 	.htotal = 1366 + 48 + 32 + 20,
508 	.vdisplay = 768,
509 	.vsync_start = 768 + 16,
510 	.vsync_end = 768 + 16 + 8,
511 	.vtotal = 768 + 16 + 8 + 16,
512 	.vrefresh = 60,
513 };
514 
515 static const struct panel_desc chunghwa_claa101wb01 = {
516 	.modes = &chunghwa_claa101wb01_mode,
517 	.num_modes = 1,
518 	.bpc = 6,
519 	.size = {
520 		.width = 223,
521 		.height = 125,
522 	},
523 };
524 
525 static const struct drm_display_mode edt_et057090dhu_mode = {
526 	.clock = 25175,
527 	.hdisplay = 640,
528 	.hsync_start = 640 + 16,
529 	.hsync_end = 640 + 16 + 30,
530 	.htotal = 640 + 16 + 30 + 114,
531 	.vdisplay = 480,
532 	.vsync_start = 480 + 10,
533 	.vsync_end = 480 + 10 + 3,
534 	.vtotal = 480 + 10 + 3 + 32,
535 	.vrefresh = 60,
536 	.flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
537 };
538 
539 static const struct panel_desc edt_et057090dhu = {
540 	.modes = &edt_et057090dhu_mode,
541 	.num_modes = 1,
542 	.bpc = 6,
543 	.size = {
544 		.width = 115,
545 		.height = 86,
546 	},
547 };
548 
549 static const struct drm_display_mode edt_etm0700g0dh6_mode = {
550 	.clock = 33260,
551 	.hdisplay = 800,
552 	.hsync_start = 800 + 40,
553 	.hsync_end = 800 + 40 + 128,
554 	.htotal = 800 + 40 + 128 + 88,
555 	.vdisplay = 480,
556 	.vsync_start = 480 + 10,
557 	.vsync_end = 480 + 10 + 2,
558 	.vtotal = 480 + 10 + 2 + 33,
559 	.vrefresh = 60,
560 	.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
561 };
562 
563 static const struct panel_desc edt_etm0700g0dh6 = {
564 	.modes = &edt_etm0700g0dh6_mode,
565 	.num_modes = 1,
566 	.bpc = 6,
567 	.size = {
568 		.width = 152,
569 		.height = 91,
570 	},
571 };
572 
573 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
574 	.clock = 32260,
575 	.hdisplay = 800,
576 	.hsync_start = 800 + 168,
577 	.hsync_end = 800 + 168 + 64,
578 	.htotal = 800 + 168 + 64 + 88,
579 	.vdisplay = 480,
580 	.vsync_start = 480 + 37,
581 	.vsync_end = 480 + 37 + 2,
582 	.vtotal = 480 + 37 + 2 + 8,
583 	.vrefresh = 60,
584 };
585 
586 static const struct panel_desc foxlink_fl500wvr00_a0t = {
587 	.modes = &foxlink_fl500wvr00_a0t_mode,
588 	.num_modes = 1,
589 	.bpc = 8,
590 	.size = {
591 		.width = 108,
592 		.height = 65,
593 	},
594 	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
595 };
596 
597 static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
598 	.clock = 9000,
599 	.hdisplay = 480,
600 	.hsync_start = 480 + 5,
601 	.hsync_end = 480 + 5 + 1,
602 	.htotal = 480 + 5 + 1 + 40,
603 	.vdisplay = 272,
604 	.vsync_start = 272 + 8,
605 	.vsync_end = 272 + 8 + 1,
606 	.vtotal = 272 + 8 + 1 + 8,
607 	.vrefresh = 60,
608 };
609 
610 static const struct panel_desc giantplus_gpg482739qs5 = {
611 	.modes = &giantplus_gpg482739qs5_mode,
612 	.num_modes = 1,
613 	.bpc = 8,
614 	.size = {
615 		.width = 95,
616 		.height = 54,
617 	},
618 };
619 
620 static const struct drm_display_mode hannstar_hsd070pww1_mode = {
621 	.clock = 71100,
622 	.hdisplay = 1280,
623 	.hsync_start = 1280 + 1,
624 	.hsync_end = 1280 + 1 + 158,
625 	.htotal = 1280 + 1 + 158 + 1,
626 	.vdisplay = 800,
627 	.vsync_start = 800 + 1,
628 	.vsync_end = 800 + 1 + 21,
629 	.vtotal = 800 + 1 + 21 + 1,
630 	.vrefresh = 60,
631 };
632 
633 static const struct panel_desc hannstar_hsd070pww1 = {
634 	.modes = &hannstar_hsd070pww1_mode,
635 	.num_modes = 1,
636 	.bpc = 6,
637 	.size = {
638 		.width = 151,
639 		.height = 94,
640 	},
641 };
642 
643 static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
644 	.clock = 33333,
645 	.hdisplay = 800,
646 	.hsync_start = 800 + 85,
647 	.hsync_end = 800 + 85 + 86,
648 	.htotal = 800 + 85 + 86 + 85,
649 	.vdisplay = 480,
650 	.vsync_start = 480 + 16,
651 	.vsync_end = 480 + 16 + 13,
652 	.vtotal = 480 + 16 + 13 + 16,
653 	.vrefresh = 60,
654 };
655 
656 static const struct panel_desc hitachi_tx23d38vm0caa = {
657 	.modes = &hitachi_tx23d38vm0caa_mode,
658 	.num_modes = 1,
659 	.bpc = 6,
660 	.size = {
661 		.width = 195,
662 		.height = 117,
663 	},
664 };
665 
666 static const struct drm_display_mode innolux_g121i1_l01_mode = {
667 	.clock = 71000,
668 	.hdisplay = 1280,
669 	.hsync_start = 1280 + 64,
670 	.hsync_end = 1280 + 64 + 32,
671 	.htotal = 1280 + 64 + 32 + 64,
672 	.vdisplay = 800,
673 	.vsync_start = 800 + 9,
674 	.vsync_end = 800 + 9 + 6,
675 	.vtotal = 800 + 9 + 6 + 9,
676 	.vrefresh = 60,
677 };
678 
679 static const struct panel_desc innolux_g121i1_l01 = {
680 	.modes = &innolux_g121i1_l01_mode,
681 	.num_modes = 1,
682 	.bpc = 6,
683 	.size = {
684 		.width = 261,
685 		.height = 163,
686 	},
687 };
688 
689 static const struct drm_display_mode innolux_n116bge_mode = {
690 	.clock = 76420,
691 	.hdisplay = 1366,
692 	.hsync_start = 1366 + 136,
693 	.hsync_end = 1366 + 136 + 30,
694 	.htotal = 1366 + 136 + 30 + 60,
695 	.vdisplay = 768,
696 	.vsync_start = 768 + 8,
697 	.vsync_end = 768 + 8 + 12,
698 	.vtotal = 768 + 8 + 12 + 12,
699 	.vrefresh = 60,
700 	.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
701 };
702 
703 static const struct panel_desc innolux_n116bge = {
704 	.modes = &innolux_n116bge_mode,
705 	.num_modes = 1,
706 	.bpc = 6,
707 	.size = {
708 		.width = 256,
709 		.height = 144,
710 	},
711 };
712 
713 static const struct drm_display_mode innolux_n156bge_l21_mode = {
714 	.clock = 69300,
715 	.hdisplay = 1366,
716 	.hsync_start = 1366 + 16,
717 	.hsync_end = 1366 + 16 + 34,
718 	.htotal = 1366 + 16 + 34 + 50,
719 	.vdisplay = 768,
720 	.vsync_start = 768 + 2,
721 	.vsync_end = 768 + 2 + 6,
722 	.vtotal = 768 + 2 + 6 + 12,
723 	.vrefresh = 60,
724 };
725 
726 static const struct panel_desc innolux_n156bge_l21 = {
727 	.modes = &innolux_n156bge_l21_mode,
728 	.num_modes = 1,
729 	.bpc = 6,
730 	.size = {
731 		.width = 344,
732 		.height = 193,
733 	},
734 };
735 
736 static const struct drm_display_mode lg_lp129qe_mode = {
737 	.clock = 285250,
738 	.hdisplay = 2560,
739 	.hsync_start = 2560 + 48,
740 	.hsync_end = 2560 + 48 + 32,
741 	.htotal = 2560 + 48 + 32 + 80,
742 	.vdisplay = 1700,
743 	.vsync_start = 1700 + 3,
744 	.vsync_end = 1700 + 3 + 10,
745 	.vtotal = 1700 + 3 + 10 + 36,
746 	.vrefresh = 60,
747 };
748 
749 static const struct panel_desc lg_lp129qe = {
750 	.modes = &lg_lp129qe_mode,
751 	.num_modes = 1,
752 	.bpc = 8,
753 	.size = {
754 		.width = 272,
755 		.height = 181,
756 	},
757 };
758 
759 static const struct drm_display_mode samsung_ltn101nt05_mode = {
760 	.clock = 54030,
761 	.hdisplay = 1024,
762 	.hsync_start = 1024 + 24,
763 	.hsync_end = 1024 + 24 + 136,
764 	.htotal = 1024 + 24 + 136 + 160,
765 	.vdisplay = 600,
766 	.vsync_start = 600 + 3,
767 	.vsync_end = 600 + 3 + 6,
768 	.vtotal = 600 + 3 + 6 + 61,
769 	.vrefresh = 60,
770 };
771 
772 static const struct panel_desc samsung_ltn101nt05 = {
773 	.modes = &samsung_ltn101nt05_mode,
774 	.num_modes = 1,
775 	.bpc = 6,
776 	.size = {
777 		.width = 1024,
778 		.height = 600,
779 	},
780 };
781 
782 static const struct of_device_id platform_of_match[] = {
783 	{
784 		.compatible = "auo,b101aw03",
785 		.data = &auo_b101aw03,
786 	}, {
787 		.compatible = "auo,b101xtn01",
788 		.data = &auo_b101xtn01,
789 	}, {
790 		.compatible = "auo,b116xw03",
791 		.data = &auo_b116xw03,
792 	}, {
793 		.compatible = "auo,b133htn01",
794 		.data = &auo_b133htn01,
795 	}, {
796 		.compatible = "auo,b133xtn01",
797 		.data = &auo_b133xtn01,
798 	}, {
799 		.compatible = "avic,tm070ddh03",
800 		.data = &avic_tm070ddh03,
801 	}, {
802 		.compatible = "chunghwa,claa101wa01a",
803 		.data = &chunghwa_claa101wa01a
804 	}, {
805 		.compatible = "chunghwa,claa101wb01",
806 		.data = &chunghwa_claa101wb01
807 	}, {
808 		.compatible = "edt,et057090dhu",
809 		.data = &edt_et057090dhu,
810 	}, {
811 		.compatible = "edt,et070080dh6",
812 		.data = &edt_etm0700g0dh6,
813 	}, {
814 		.compatible = "edt,etm0700g0dh6",
815 		.data = &edt_etm0700g0dh6,
816 	}, {
817 		.compatible = "foxlink,fl500wvr00-a0t",
818 		.data = &foxlink_fl500wvr00_a0t,
819 	}, {
820 		.compatible = "giantplus,gpg482739qs5",
821 		.data = &giantplus_gpg482739qs5
822 	}, {
823 		.compatible = "hannstar,hsd070pww1",
824 		.data = &hannstar_hsd070pww1,
825 	}, {
826 		.compatible = "hit,tx23d38vm0caa",
827 		.data = &hitachi_tx23d38vm0caa
828 	}, {
829 		.compatible ="innolux,g121i1-l01",
830 		.data = &innolux_g121i1_l01
831 	}, {
832 		.compatible = "innolux,n116bge",
833 		.data = &innolux_n116bge,
834 	}, {
835 		.compatible = "innolux,n156bge-l21",
836 		.data = &innolux_n156bge_l21,
837 	}, {
838 		.compatible = "lg,lp129qe",
839 		.data = &lg_lp129qe,
840 	}, {
841 		.compatible = "samsung,ltn101nt05",
842 		.data = &samsung_ltn101nt05,
843 	}, {
844 		/* sentinel */
845 	}
846 };
847 MODULE_DEVICE_TABLE(of, platform_of_match);
848 
849 static int panel_simple_platform_probe(struct platform_device *pdev)
850 {
851 	const struct of_device_id *id;
852 
853 	id = of_match_node(platform_of_match, pdev->dev.of_node);
854 	if (!id)
855 		return -ENODEV;
856 
857 	return panel_simple_probe(&pdev->dev, id->data);
858 }
859 
860 static int panel_simple_platform_remove(struct platform_device *pdev)
861 {
862 	return panel_simple_remove(&pdev->dev);
863 }
864 
865 static void panel_simple_platform_shutdown(struct platform_device *pdev)
866 {
867 	panel_simple_shutdown(&pdev->dev);
868 }
869 
870 static struct platform_driver panel_simple_platform_driver = {
871 	.driver = {
872 		.name = "panel-simple",
873 		.of_match_table = platform_of_match,
874 	},
875 	.probe = panel_simple_platform_probe,
876 	.remove = panel_simple_platform_remove,
877 	.shutdown = panel_simple_platform_shutdown,
878 };
879 
880 struct panel_desc_dsi {
881 	struct panel_desc desc;
882 
883 	unsigned long flags;
884 	enum mipi_dsi_pixel_format format;
885 	unsigned int lanes;
886 };
887 
888 static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
889 	.clock = 71000,
890 	.hdisplay = 800,
891 	.hsync_start = 800 + 32,
892 	.hsync_end = 800 + 32 + 1,
893 	.htotal = 800 + 32 + 1 + 57,
894 	.vdisplay = 1280,
895 	.vsync_start = 1280 + 28,
896 	.vsync_end = 1280 + 28 + 1,
897 	.vtotal = 1280 + 28 + 1 + 14,
898 	.vrefresh = 60,
899 };
900 
901 static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
902 	.desc = {
903 		.modes = &lg_ld070wx3_sl01_mode,
904 		.num_modes = 1,
905 		.bpc = 8,
906 		.size = {
907 			.width = 94,
908 			.height = 151,
909 		},
910 	},
911 	.flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
912 	.format = MIPI_DSI_FMT_RGB888,
913 	.lanes = 4,
914 };
915 
916 static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
917 	.clock = 67000,
918 	.hdisplay = 720,
919 	.hsync_start = 720 + 12,
920 	.hsync_end = 720 + 12 + 4,
921 	.htotal = 720 + 12 + 4 + 112,
922 	.vdisplay = 1280,
923 	.vsync_start = 1280 + 8,
924 	.vsync_end = 1280 + 8 + 4,
925 	.vtotal = 1280 + 8 + 4 + 12,
926 	.vrefresh = 60,
927 };
928 
929 static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
930 	.desc = {
931 		.modes = &lg_lh500wx1_sd03_mode,
932 		.num_modes = 1,
933 		.bpc = 8,
934 		.size = {
935 			.width = 62,
936 			.height = 110,
937 		},
938 	},
939 	.flags = MIPI_DSI_MODE_VIDEO,
940 	.format = MIPI_DSI_FMT_RGB888,
941 	.lanes = 4,
942 };
943 
944 static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
945 	.clock = 157200,
946 	.hdisplay = 1920,
947 	.hsync_start = 1920 + 154,
948 	.hsync_end = 1920 + 154 + 16,
949 	.htotal = 1920 + 154 + 16 + 32,
950 	.vdisplay = 1200,
951 	.vsync_start = 1200 + 17,
952 	.vsync_end = 1200 + 17 + 2,
953 	.vtotal = 1200 + 17 + 2 + 16,
954 	.vrefresh = 60,
955 };
956 
957 static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
958 	.desc = {
959 		.modes = &panasonic_vvx10f004b00_mode,
960 		.num_modes = 1,
961 		.bpc = 8,
962 		.size = {
963 			.width = 217,
964 			.height = 136,
965 		},
966 	},
967 	.flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
968 		 MIPI_DSI_CLOCK_NON_CONTINUOUS,
969 	.format = MIPI_DSI_FMT_RGB888,
970 	.lanes = 4,
971 };
972 
973 static const struct of_device_id dsi_of_match[] = {
974 	{
975 		.compatible = "lg,ld070wx3-sl01",
976 		.data = &lg_ld070wx3_sl01
977 	}, {
978 		.compatible = "lg,lh500wx1-sd03",
979 		.data = &lg_lh500wx1_sd03
980 	}, {
981 		.compatible = "panasonic,vvx10f004b00",
982 		.data = &panasonic_vvx10f004b00
983 	}, {
984 		/* sentinel */
985 	}
986 };
987 MODULE_DEVICE_TABLE(of, dsi_of_match);
988 
989 static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
990 {
991 	const struct panel_desc_dsi *desc;
992 	const struct of_device_id *id;
993 	int err;
994 
995 	id = of_match_node(dsi_of_match, dsi->dev.of_node);
996 	if (!id)
997 		return -ENODEV;
998 
999 	desc = id->data;
1000 
1001 	err = panel_simple_probe(&dsi->dev, &desc->desc);
1002 	if (err < 0)
1003 		return err;
1004 
1005 	dsi->mode_flags = desc->flags;
1006 	dsi->format = desc->format;
1007 	dsi->lanes = desc->lanes;
1008 
1009 	return mipi_dsi_attach(dsi);
1010 }
1011 
1012 static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
1013 {
1014 	int err;
1015 
1016 	err = mipi_dsi_detach(dsi);
1017 	if (err < 0)
1018 		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
1019 
1020 	return panel_simple_remove(&dsi->dev);
1021 }
1022 
1023 static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
1024 {
1025 	panel_simple_shutdown(&dsi->dev);
1026 }
1027 
1028 static struct mipi_dsi_driver panel_simple_dsi_driver = {
1029 	.driver = {
1030 		.name = "panel-simple-dsi",
1031 		.of_match_table = dsi_of_match,
1032 	},
1033 	.probe = panel_simple_dsi_probe,
1034 	.remove = panel_simple_dsi_remove,
1035 	.shutdown = panel_simple_dsi_shutdown,
1036 };
1037 
1038 static int __init panel_simple_init(void)
1039 {
1040 	int err;
1041 
1042 	err = platform_driver_register(&panel_simple_platform_driver);
1043 	if (err < 0)
1044 		return err;
1045 
1046 	if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
1047 		err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
1048 		if (err < 0)
1049 			return err;
1050 	}
1051 
1052 	return 0;
1053 }
1054 module_init(panel_simple_init);
1055 
1056 static void __exit panel_simple_exit(void)
1057 {
1058 	if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
1059 		mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
1060 
1061 	platform_driver_unregister(&panel_simple_platform_driver);
1062 }
1063 module_exit(panel_simple_exit);
1064 
1065 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1066 MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1067 MODULE_LICENSE("GPL and additional rights");
1068