1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Novatek NT36523 DriverIC panels driver 4 * 5 * Copyright (c) 2022, 2023 Jianhua Lu <lujianhua000@gmail.com> 6 */ 7 8 #include <linux/backlight.h> 9 #include <linux/delay.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_graph.h> 14 #include <linux/regulator/consumer.h> 15 16 #include <video/mipi_display.h> 17 18 #include <drm/drm_connector.h> 19 #include <drm/drm_crtc.h> 20 #include <drm/drm_mipi_dsi.h> 21 #include <drm/drm_modes.h> 22 #include <drm/drm_panel.h> 23 24 #define DSI_NUM_MIN 1 25 26 #define mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, cmd, seq...) \ 27 do { \ 28 mipi_dsi_dcs_write_seq(dsi0, cmd, seq); \ 29 mipi_dsi_dcs_write_seq(dsi1, cmd, seq); \ 30 } while (0) 31 32 struct panel_info { 33 struct drm_panel panel; 34 struct mipi_dsi_device *dsi[2]; 35 const struct panel_desc *desc; 36 enum drm_panel_orientation orientation; 37 38 struct gpio_desc *reset_gpio; 39 struct backlight_device *backlight; 40 struct regulator *vddio; 41 }; 42 43 struct panel_desc { 44 unsigned int width_mm; 45 unsigned int height_mm; 46 47 unsigned int bpc; 48 unsigned int lanes; 49 unsigned long mode_flags; 50 enum mipi_dsi_pixel_format format; 51 52 const struct drm_display_mode *modes; 53 unsigned int num_modes; 54 const struct mipi_dsi_device_info dsi_info; 55 int (*init_sequence)(struct panel_info *pinfo); 56 57 bool is_dual_dsi; 58 bool has_dcs_backlight; 59 }; 60 61 static inline struct panel_info *to_panel_info(struct drm_panel *panel) 62 { 63 return container_of(panel, struct panel_info, panel); 64 } 65 66 static int elish_boe_init_sequence(struct panel_info *pinfo) 67 { 68 struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; 69 struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; 70 /* No datasheet, so write magic init sequence directly */ 71 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 72 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 73 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05); 74 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); 75 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 76 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40); 77 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 78 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 79 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02); 80 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23); 81 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 82 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80); 83 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84); 84 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d); 85 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00); 86 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00); 87 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01); 88 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45); 89 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02); 90 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80); 91 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83); 92 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c); 93 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a); 94 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff); 95 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe); 96 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd); 97 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb); 98 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8); 99 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5); 100 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3); 101 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2); 102 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2); 103 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2); 104 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef); 105 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec); 106 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9); 107 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5); 108 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5); 109 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5); 110 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13); 111 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff); 112 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4); 113 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7); 114 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda); 115 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd); 116 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0); 117 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3); 118 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2); 119 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2); 120 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2); 121 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99); 122 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80); 123 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68); 124 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66); 125 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66); 126 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66); 127 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e); 128 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff); 129 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb); 130 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7); 131 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3); 132 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef); 133 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3); 134 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda); 135 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8); 136 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8); 137 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8); 138 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb); 139 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf); 140 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3); 141 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2); 142 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2); 143 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2); 144 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); 145 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 146 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x47); 147 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x47); 148 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x47); 149 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); 150 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 151 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10); 152 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0); 153 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10); 154 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00); 155 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10); 156 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0); 157 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 158 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 159 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); 160 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 161 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08); 162 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c); 163 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); 164 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 165 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00); 166 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); 167 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 168 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f); 169 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f); 170 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01); 171 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18); 172 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03); 173 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01); 174 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 175 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01); 176 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); 177 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 178 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f); 179 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b); 180 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24); 181 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 182 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28); 183 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27); 184 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 185 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31); 186 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20); 187 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd2, 0x30); 188 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08); 189 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80); 190 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02); 191 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); 192 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 193 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81); 194 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0); 195 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22); 196 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 197 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50); 198 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01); 199 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11); 200 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01); 201 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x49); 202 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x76, 0x01); 203 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x77, 0x49); 204 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f); 205 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50); 206 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28); 207 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28); 208 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10); 209 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00); 210 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x49); 211 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x49); 212 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x49); 213 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x04); 214 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x49); 215 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x04); 216 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x59); 217 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00); 218 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00); 219 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x01); 220 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x48); 221 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x43); 222 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x3c); 223 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00); 224 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x43); 225 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x3c); 226 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x43); 227 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x3c); 228 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd7, 0x00); 229 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdc, 0x43); 230 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdd, 0x3c); 231 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe1, 0x43); 232 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe2, 0x3c); 233 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf2, 0x00); 234 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf3, 0x01); 235 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf4, 0x48); 236 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); 237 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 238 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x13, 0x01); 239 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x23); 240 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01); 241 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x23); 242 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); 243 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 244 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x97, 0x3c); 245 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x98, 0x02); 246 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x99, 0x95); 247 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03); 248 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9b, 0x00); 249 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9c, 0x0b); 250 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9d, 0x0a); 251 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9e, 0x90); 252 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22); 253 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 254 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50); 255 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23); 256 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 257 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa3, 0x50); 258 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0); 259 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 260 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x60); 261 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0xc0); 262 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02); 263 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); 264 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 265 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08); 266 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0); 267 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 268 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf); 269 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee); 270 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99); 271 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09); 272 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 273 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 274 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff); 275 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c); 276 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00); 277 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13); 278 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04); 279 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11); 280 msleep(70); 281 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29); 282 283 return 0; 284 } 285 286 static int elish_csot_init_sequence(struct panel_info *pinfo) 287 { 288 struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; 289 struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; 290 /* No datasheet, so write magic init sequence directly */ 291 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 292 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 293 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05); 294 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); 295 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 296 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40); 297 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 298 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 299 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02); 300 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0); 301 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 302 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf); 303 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x30); 304 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee); 305 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99); 306 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09); 307 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); 308 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 309 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08); 310 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0); 311 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 312 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02); 313 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); 314 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 315 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0x40); 316 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 317 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 318 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00); 319 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23); 320 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 321 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80); 322 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84); 323 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d); 324 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00); 325 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00); 326 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01); 327 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45); 328 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02); 329 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80); 330 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83); 331 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c); 332 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a); 333 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff); 334 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe); 335 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd); 336 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb); 337 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8); 338 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5); 339 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3); 340 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2); 341 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2); 342 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2); 343 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef); 344 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec); 345 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9); 346 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5); 347 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5); 348 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5); 349 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13); 350 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff); 351 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4); 352 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7); 353 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda); 354 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd); 355 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0); 356 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3); 357 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2); 358 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2); 359 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2); 360 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99); 361 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80); 362 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68); 363 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66); 364 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66); 365 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66); 366 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e); 367 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff); 368 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb); 369 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7); 370 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3); 371 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef); 372 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3); 373 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda); 374 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8); 375 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8); 376 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8); 377 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb); 378 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf); 379 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3); 380 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2); 381 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2); 382 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2); 383 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 384 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 385 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff); 386 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c); 387 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x55, 0x00); 388 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13); 389 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04); 390 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); 391 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 392 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x46); 393 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x46); 394 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x46); 395 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); 396 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 397 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0); 398 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10); 399 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0); 400 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10); 401 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00); 402 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10); 403 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0); 404 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); 405 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 406 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08); 407 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c); 408 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); 409 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 410 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00); 411 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); 412 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 413 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f); 414 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f); 415 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01); 416 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18); 417 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03); 418 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01); 419 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 420 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01); 421 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); 422 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 423 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f); 424 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b); 425 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24); 426 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 427 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28); 428 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27); 429 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 430 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31); 431 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20); 432 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08); 433 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80); 434 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02); 435 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); 436 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 437 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81); 438 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0); 439 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22); 440 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 441 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01); 442 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11); 443 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01); 444 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x4d); 445 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f); 446 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50); 447 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28); 448 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28); 449 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10); 450 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00); 451 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x4b); 452 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x96); 453 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x4b); 454 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x07); 455 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x4b); 456 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x07); 457 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x5c); 458 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00); 459 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00); 460 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x3f); 461 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x00); 462 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x08); 463 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x40); 464 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00); 465 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x08); 466 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x40); 467 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x08); 468 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x40); 469 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); 470 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 471 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01); 472 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x1c); 473 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); 474 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); 475 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03); 476 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); 477 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11); 478 msleep(70); 479 mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29); 480 481 return 0; 482 } 483 484 static int j606f_boe_init_sequence(struct panel_info *pinfo) 485 { 486 struct mipi_dsi_device *dsi = pinfo->dsi[0]; 487 struct device *dev = &dsi->dev; 488 int ret; 489 490 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20); 491 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 492 mipi_dsi_dcs_write_seq(dsi, 0x05, 0xd9); 493 mipi_dsi_dcs_write_seq(dsi, 0x07, 0x78); 494 mipi_dsi_dcs_write_seq(dsi, 0x08, 0x5a); 495 mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x63); 496 mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x91); 497 mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x73); 498 mipi_dsi_dcs_write_seq(dsi, 0x95, 0xeb); 499 mipi_dsi_dcs_write_seq(dsi, 0x96, 0xeb); 500 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x11); 501 mipi_dsi_dcs_write_seq(dsi, 0x6d, 0x66); 502 mipi_dsi_dcs_write_seq(dsi, 0x75, 0xa2); 503 mipi_dsi_dcs_write_seq(dsi, 0x77, 0xb3); 504 mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00, 505 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); 506 mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01, 507 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); 508 mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03, 509 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); 510 mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03, 511 0xfd, 0x03, 0xff); 512 mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00, 513 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); 514 mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01, 515 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); 516 mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03, 517 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); 518 mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03, 519 0xfd, 0x03, 0xff); 520 mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00, 521 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); 522 mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01, 523 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); 524 mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03, 525 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); 526 mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03, 527 0xfd, 0x03, 0xff); 528 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x21); 529 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 530 mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00, 531 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); 532 mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01, 533 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); 534 mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03, 535 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); 536 mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03, 537 0xf5, 0x03, 0xf7); 538 mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00, 539 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); 540 mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01, 541 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); 542 mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03, 543 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); 544 mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03, 545 0xf5, 0x03, 0xf7); 546 mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00, 547 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); 548 mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01, 549 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); 550 mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03, 551 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); 552 mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03, 553 0xf5, 0x03, 0xf7); 554 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x23); 555 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 556 mipi_dsi_dcs_write_seq(dsi, 0x00, 0x80); 557 mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00); 558 mipi_dsi_dcs_write_seq(dsi, 0x11, 0x01); 559 mipi_dsi_dcs_write_seq(dsi, 0x12, 0x77); 560 mipi_dsi_dcs_write_seq(dsi, 0x15, 0x07); 561 mipi_dsi_dcs_write_seq(dsi, 0x16, 0x07); 562 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24); 563 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 564 mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00); 565 mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00); 566 mipi_dsi_dcs_write_seq(dsi, 0x02, 0x1c); 567 mipi_dsi_dcs_write_seq(dsi, 0x03, 0x1c); 568 mipi_dsi_dcs_write_seq(dsi, 0x04, 0x1d); 569 mipi_dsi_dcs_write_seq(dsi, 0x05, 0x1d); 570 mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04); 571 mipi_dsi_dcs_write_seq(dsi, 0x07, 0x04); 572 mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0f); 573 mipi_dsi_dcs_write_seq(dsi, 0x09, 0x0f); 574 mipi_dsi_dcs_write_seq(dsi, 0x0a, 0x0e); 575 mipi_dsi_dcs_write_seq(dsi, 0x0b, 0x0e); 576 mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x0d); 577 mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0d); 578 mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x0c); 579 mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0c); 580 mipi_dsi_dcs_write_seq(dsi, 0x10, 0x08); 581 mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08); 582 mipi_dsi_dcs_write_seq(dsi, 0x12, 0x00); 583 mipi_dsi_dcs_write_seq(dsi, 0x13, 0x00); 584 mipi_dsi_dcs_write_seq(dsi, 0x14, 0x00); 585 mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00); 586 mipi_dsi_dcs_write_seq(dsi, 0x16, 0x00); 587 mipi_dsi_dcs_write_seq(dsi, 0x17, 0x00); 588 mipi_dsi_dcs_write_seq(dsi, 0x18, 0x1c); 589 mipi_dsi_dcs_write_seq(dsi, 0x19, 0x1c); 590 mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x1d); 591 mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x1d); 592 mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x04); 593 mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x04); 594 mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x0f); 595 mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x0f); 596 mipi_dsi_dcs_write_seq(dsi, 0x20, 0x0e); 597 mipi_dsi_dcs_write_seq(dsi, 0x21, 0x0e); 598 mipi_dsi_dcs_write_seq(dsi, 0x22, 0x0d); 599 mipi_dsi_dcs_write_seq(dsi, 0x23, 0x0d); 600 mipi_dsi_dcs_write_seq(dsi, 0x24, 0x0c); 601 mipi_dsi_dcs_write_seq(dsi, 0x25, 0x0c); 602 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x08); 603 mipi_dsi_dcs_write_seq(dsi, 0x27, 0x08); 604 mipi_dsi_dcs_write_seq(dsi, 0x28, 0x00); 605 mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00); 606 mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x00); 607 mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00); 608 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x20); 609 mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x0a); 610 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x44); 611 mipi_dsi_dcs_write_seq(dsi, 0x33, 0x0c); 612 mipi_dsi_dcs_write_seq(dsi, 0x34, 0x32); 613 mipi_dsi_dcs_write_seq(dsi, 0x37, 0x44); 614 mipi_dsi_dcs_write_seq(dsi, 0x38, 0x40); 615 mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00); 616 617 ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x9a); 618 if (ret < 0) { 619 dev_err(dev, "Failed to set pixel format: %d\n", ret); 620 return ret; 621 } 622 623 mipi_dsi_dcs_write_seq(dsi, 0x3b, 0xa0); 624 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x42); 625 mipi_dsi_dcs_write_seq(dsi, 0x3f, 0x06); 626 mipi_dsi_dcs_write_seq(dsi, 0x43, 0x06); 627 mipi_dsi_dcs_write_seq(dsi, 0x47, 0x66); 628 mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x9a); 629 mipi_dsi_dcs_write_seq(dsi, 0x4b, 0xa0); 630 mipi_dsi_dcs_write_seq(dsi, 0x4c, 0x91); 631 mipi_dsi_dcs_write_seq(dsi, 0x4d, 0x21); 632 mipi_dsi_dcs_write_seq(dsi, 0x4e, 0x43); 633 634 ret = mipi_dsi_dcs_set_display_brightness(dsi, 18); 635 if (ret < 0) { 636 dev_err(dev, "Failed to set display brightness: %d\n", ret); 637 return ret; 638 } 639 640 mipi_dsi_dcs_write_seq(dsi, 0x52, 0x34); 641 mipi_dsi_dcs_write_seq(dsi, 0x55, 0x82, 0x02); 642 mipi_dsi_dcs_write_seq(dsi, 0x56, 0x04); 643 mipi_dsi_dcs_write_seq(dsi, 0x58, 0x21); 644 mipi_dsi_dcs_write_seq(dsi, 0x59, 0x30); 645 mipi_dsi_dcs_write_seq(dsi, 0x5a, 0xba); 646 mipi_dsi_dcs_write_seq(dsi, 0x5b, 0xa0); 647 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00, 0x06); 648 mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x00); 649 mipi_dsi_dcs_write_seq(dsi, 0x65, 0x82); 650 mipi_dsi_dcs_write_seq(dsi, 0x7e, 0x20); 651 mipi_dsi_dcs_write_seq(dsi, 0x7f, 0x3c); 652 mipi_dsi_dcs_write_seq(dsi, 0x82, 0x04); 653 mipi_dsi_dcs_write_seq(dsi, 0x97, 0xc0); 654 mipi_dsi_dcs_write_seq(dsi, 0xb6, 655 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 656 0x05, 0x00, 0x00); 657 mipi_dsi_dcs_write_seq(dsi, 0x92, 0xc4); 658 mipi_dsi_dcs_write_seq(dsi, 0x93, 0x1a); 659 mipi_dsi_dcs_write_seq(dsi, 0x94, 0x5f); 660 mipi_dsi_dcs_write_seq(dsi, 0xd7, 0x55); 661 mipi_dsi_dcs_write_seq(dsi, 0xda, 0x0a); 662 mipi_dsi_dcs_write_seq(dsi, 0xde, 0x08); 663 mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05); 664 mipi_dsi_dcs_write_seq(dsi, 0xdc, 0xc4); 665 mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22); 666 mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05); 667 mipi_dsi_dcs_write_seq(dsi, 0xe0, 0xc4); 668 mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05); 669 mipi_dsi_dcs_write_seq(dsi, 0xe2, 0xc4); 670 mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05); 671 mipi_dsi_dcs_write_seq(dsi, 0xe4, 0xc4); 672 mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05); 673 mipi_dsi_dcs_write_seq(dsi, 0xe6, 0xc4); 674 mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x88); 675 mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x08); 676 mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x88); 677 mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x08); 678 mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x90); 679 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25); 680 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 681 mipi_dsi_dcs_write_seq(dsi, 0x05, 0x00); 682 mipi_dsi_dcs_write_seq(dsi, 0x19, 0x07); 683 mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xba); 684 mipi_dsi_dcs_write_seq(dsi, 0x20, 0xa0); 685 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xba); 686 mipi_dsi_dcs_write_seq(dsi, 0x27, 0xa0); 687 mipi_dsi_dcs_write_seq(dsi, 0x33, 0xba); 688 mipi_dsi_dcs_write_seq(dsi, 0x34, 0xa0); 689 mipi_dsi_dcs_write_seq(dsi, 0x3f, 0xe0); 690 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_VSYNC_TIMING, 0x00); 691 mipi_dsi_dcs_write_seq(dsi, 0x44, 0x00); 692 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_GET_SCANLINE, 0x40); 693 mipi_dsi_dcs_write_seq(dsi, 0x48, 0xba); 694 mipi_dsi_dcs_write_seq(dsi, 0x49, 0xa0); 695 mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00); 696 mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00); 697 mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00); 698 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0xd0); 699 mipi_dsi_dcs_write_seq(dsi, 0x61, 0xba); 700 mipi_dsi_dcs_write_seq(dsi, 0x62, 0xa0); 701 mipi_dsi_dcs_write_seq(dsi, 0xf1, 0x10); 702 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a); 703 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 704 mipi_dsi_dcs_write_seq(dsi, 0x64, 0x16); 705 mipi_dsi_dcs_write_seq(dsi, 0x67, 0x16); 706 mipi_dsi_dcs_write_seq(dsi, 0x6a, 0x16); 707 mipi_dsi_dcs_write_seq(dsi, 0x70, 0x30); 708 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_START, 0xf3); 709 mipi_dsi_dcs_write_seq(dsi, 0xa3, 0xff); 710 mipi_dsi_dcs_write_seq(dsi, 0xa4, 0xff); 711 mipi_dsi_dcs_write_seq(dsi, 0xa5, 0xff); 712 mipi_dsi_dcs_write_seq(dsi, 0xd6, 0x08); 713 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26); 714 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 715 mipi_dsi_dcs_write_seq(dsi, 0x00, 0xa1); 716 mipi_dsi_dcs_write_seq(dsi, 0x0a, 0xf2); 717 mipi_dsi_dcs_write_seq(dsi, 0x04, 0x28); 718 mipi_dsi_dcs_write_seq(dsi, 0x06, 0x30); 719 mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x13); 720 mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0a); 721 mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0a); 722 mipi_dsi_dcs_write_seq(dsi, 0x11, 0x00); 723 mipi_dsi_dcs_write_seq(dsi, 0x12, 0x50); 724 mipi_dsi_dcs_write_seq(dsi, 0x13, 0x51); 725 mipi_dsi_dcs_write_seq(dsi, 0x14, 0x65); 726 mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00); 727 mipi_dsi_dcs_write_seq(dsi, 0x16, 0x10); 728 mipi_dsi_dcs_write_seq(dsi, 0x17, 0xa0); 729 mipi_dsi_dcs_write_seq(dsi, 0x18, 0x86); 730 mipi_dsi_dcs_write_seq(dsi, 0x19, 0x11); 731 mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7b); 732 mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x10); 733 mipi_dsi_dcs_write_seq(dsi, 0x1c, 0xbb); 734 mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00); 735 mipi_dsi_dcs_write_seq(dsi, 0x23, 0x00); 736 mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x11); 737 mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7b); 738 mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x00); 739 mipi_dsi_dcs_write_seq(dsi, 0x1e, 0xc3); 740 mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xc3); 741 mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00); 742 mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3); 743 mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x05); 744 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0xc3); 745 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x00); 746 mipi_dsi_dcs_write_seq(dsi, 0x32, 0xc3); 747 mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00); 748 749 ret = mipi_dsi_dcs_set_pixel_format(dsi, 0xc3); 750 if (ret < 0) { 751 dev_err(dev, "Failed to set pixel format: %d\n", ret); 752 return ret; 753 } 754 755 mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01); 756 mipi_dsi_dcs_write_seq(dsi, 0x33, 0x11); 757 mipi_dsi_dcs_write_seq(dsi, 0x34, 0x78); 758 mipi_dsi_dcs_write_seq(dsi, 0x35, 0x16); 759 mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x04); 760 mipi_dsi_dcs_write_seq(dsi, 0xc9, 0x82); 761 mipi_dsi_dcs_write_seq(dsi, 0xca, 0x4e); 762 mipi_dsi_dcs_write_seq(dsi, 0xcb, 0x00); 763 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_CONTINUE, 0x4c); 764 mipi_dsi_dcs_write_seq(dsi, 0xaa, 0x47); 765 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x27); 766 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 767 mipi_dsi_dcs_write_seq(dsi, 0x56, 0x06); 768 mipi_dsi_dcs_write_seq(dsi, 0x58, 0x80); 769 mipi_dsi_dcs_write_seq(dsi, 0x59, 0x53); 770 mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x00); 771 mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x14); 772 mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00); 773 mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x01); 774 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x20); 775 mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x10); 776 mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00); 777 mipi_dsi_dcs_write_seq(dsi, 0x61, 0x1d); 778 mipi_dsi_dcs_write_seq(dsi, 0x62, 0x00); 779 mipi_dsi_dcs_write_seq(dsi, 0x63, 0x01); 780 mipi_dsi_dcs_write_seq(dsi, 0x64, 0x24); 781 mipi_dsi_dcs_write_seq(dsi, 0x65, 0x1c); 782 mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00); 783 mipi_dsi_dcs_write_seq(dsi, 0x67, 0x01); 784 mipi_dsi_dcs_write_seq(dsi, 0x68, 0x25); 785 mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00); 786 mipi_dsi_dcs_write_seq(dsi, 0x78, 0x00); 787 mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x00); 788 mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x24); 789 mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x30); 790 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a); 791 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 792 mipi_dsi_dcs_write_seq(dsi, 0x22, 0x2f); 793 mipi_dsi_dcs_write_seq(dsi, 0x23, 0x08); 794 mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00); 795 mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3); 796 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xf8); 797 mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00); 798 mipi_dsi_dcs_write_seq(dsi, 0x28, 0x1a); 799 mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00); 800 mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x1a); 801 mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00); 802 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x1a); 803 mipi_dsi_dcs_write_seq(dsi, 0xff, 0xe0); 804 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 805 mipi_dsi_dcs_write_seq(dsi, 0x14, 0x60); 806 mipi_dsi_dcs_write_seq(dsi, 0x16, 0xc0); 807 mipi_dsi_dcs_write_seq(dsi, 0xff, 0xf0); 808 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 809 810 ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x08); 811 if (ret < 0) { 812 dev_err(dev, "Failed to set pixel format: %d\n", ret); 813 return ret; 814 } 815 816 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24); 817 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 818 819 ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x5d); 820 if (ret < 0) { 821 dev_err(dev, "Failed to set pixel format: %d\n", ret); 822 return ret; 823 } 824 825 mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x60); 826 mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x5d); 827 mipi_dsi_dcs_write_seq(dsi, 0x4b, 0x60); 828 mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x70); 829 mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x60); 830 mipi_dsi_dcs_write_seq(dsi, 0x91, 0x44); 831 mipi_dsi_dcs_write_seq(dsi, 0x92, 0x75); 832 mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05); 833 mipi_dsi_dcs_write_seq(dsi, 0xdc, 0x75); 834 mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22); 835 mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05); 836 mipi_dsi_dcs_write_seq(dsi, 0xe0, 0x75); 837 mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05); 838 mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x75); 839 mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05); 840 mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x75); 841 mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05); 842 mipi_dsi_dcs_write_seq(dsi, 0xe6, 0x75); 843 mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00); 844 mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00); 845 mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x00); 846 mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x00); 847 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25); 848 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 849 mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x70); 850 mipi_dsi_dcs_write_seq(dsi, 0x20, 0x60); 851 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x70); 852 mipi_dsi_dcs_write_seq(dsi, 0x27, 0x60); 853 mipi_dsi_dcs_write_seq(dsi, 0x33, 0x70); 854 mipi_dsi_dcs_write_seq(dsi, 0x34, 0x60); 855 mipi_dsi_dcs_write_seq(dsi, 0x48, 0x70); 856 mipi_dsi_dcs_write_seq(dsi, 0x49, 0x60); 857 mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00); 858 mipi_dsi_dcs_write_seq(dsi, 0x61, 0x70); 859 mipi_dsi_dcs_write_seq(dsi, 0x62, 0x60); 860 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26); 861 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 862 mipi_dsi_dcs_write_seq(dsi, 0x02, 0x31); 863 mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0a); 864 mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7f); 865 mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x0a); 866 mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x0c); 867 mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x0a); 868 mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7f); 869 mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x75); 870 mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x75); 871 mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75); 872 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x75); 873 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x05); 874 mipi_dsi_dcs_write_seq(dsi, 0x32, 0x8d); 875 876 ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x75); 877 if (ret < 0) { 878 dev_err(dev, "Failed to set pixel format: %d\n", ret); 879 return ret; 880 } 881 882 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a); 883 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 884 mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75); 885 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10); 886 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 887 mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x01); 888 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20); 889 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 890 mipi_dsi_dcs_write_seq(dsi, 0x18, 0x40); 891 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10); 892 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 893 mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x02); 894 895 ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); 896 if (ret < 0) { 897 dev_err(dev, "Failed to set tear on: %d\n", ret); 898 return ret; 899 } 900 901 mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13); 902 mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x03, 0x5f, 0x1a, 0x04, 0x04); 903 mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10); 904 usleep_range(10000, 11000); 905 mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); 906 907 ret = mipi_dsi_dcs_set_display_brightness(dsi, 0); 908 if (ret < 0) { 909 dev_err(dev, "Failed to set display brightness: %d\n", ret); 910 return ret; 911 } 912 913 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c); 914 mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); 915 mipi_dsi_dcs_write_seq(dsi, 0x68, 0x05, 0x01); 916 917 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); 918 if (ret < 0) { 919 dev_err(dev, "Failed to exit sleep mode: %d\n", ret); 920 return ret; 921 } 922 msleep(100); 923 924 ret = mipi_dsi_dcs_set_display_on(dsi); 925 if (ret < 0) { 926 dev_err(dev, "Failed to set display on: %d\n", ret); 927 return ret; 928 } 929 msleep(30); 930 931 return 0; 932 } 933 934 static const struct drm_display_mode elish_boe_modes[] = { 935 { 936 .clock = (1600 + 60 + 8 + 60) * (2560 + 26 + 4 + 168) * 120 / 1000, 937 .hdisplay = 1600, 938 .hsync_start = 1600 + 60, 939 .hsync_end = 1600 + 60 + 8, 940 .htotal = 1600 + 60 + 8 + 60, 941 .vdisplay = 2560, 942 .vsync_start = 2560 + 26, 943 .vsync_end = 2560 + 26 + 4, 944 .vtotal = 2560 + 26 + 4 + 168, 945 }, 946 }; 947 948 static const struct drm_display_mode elish_csot_modes[] = { 949 { 950 .clock = (1600 + 200 + 40 + 52) * (2560 + 26 + 4 + 168) * 120 / 1000, 951 .hdisplay = 1600, 952 .hsync_start = 1600 + 200, 953 .hsync_end = 1600 + 200 + 40, 954 .htotal = 1600 + 200 + 40 + 52, 955 .vdisplay = 2560, 956 .vsync_start = 2560 + 26, 957 .vsync_end = 2560 + 26 + 4, 958 .vtotal = 2560 + 26 + 4 + 168, 959 }, 960 }; 961 962 static const struct drm_display_mode j606f_boe_modes[] = { 963 { 964 .clock = (1200 + 58 + 2 + 60) * (2000 + 26 + 2 + 93) * 60 / 1000, 965 .hdisplay = 1200, 966 .hsync_start = 1200 + 58, 967 .hsync_end = 1200 + 58 + 2, 968 .htotal = 1200 + 58 + 2 + 60, 969 .vdisplay = 2000, 970 .vsync_start = 2000 + 26, 971 .vsync_end = 2000 + 26 + 2, 972 .vtotal = 2000 + 26 + 2 + 93, 973 .width_mm = 143, 974 .height_mm = 235, 975 }, 976 }; 977 978 static const struct panel_desc elish_boe_desc = { 979 .modes = elish_boe_modes, 980 .num_modes = ARRAY_SIZE(elish_boe_modes), 981 .dsi_info = { 982 .type = "BOE-elish", 983 .channel = 0, 984 .node = NULL, 985 }, 986 .width_mm = 127, 987 .height_mm = 203, 988 .bpc = 8, 989 .lanes = 3, 990 .format = MIPI_DSI_FMT_RGB888, 991 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, 992 .init_sequence = elish_boe_init_sequence, 993 .is_dual_dsi = true, 994 }; 995 996 static const struct panel_desc elish_csot_desc = { 997 .modes = elish_csot_modes, 998 .num_modes = ARRAY_SIZE(elish_csot_modes), 999 .dsi_info = { 1000 .type = "CSOT-elish", 1001 .channel = 0, 1002 .node = NULL, 1003 }, 1004 .width_mm = 127, 1005 .height_mm = 203, 1006 .bpc = 8, 1007 .lanes = 3, 1008 .format = MIPI_DSI_FMT_RGB888, 1009 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, 1010 .init_sequence = elish_csot_init_sequence, 1011 .is_dual_dsi = true, 1012 }; 1013 1014 static const struct panel_desc j606f_boe_desc = { 1015 .modes = j606f_boe_modes, 1016 .num_modes = ARRAY_SIZE(j606f_boe_modes), 1017 .width_mm = 143, 1018 .height_mm = 235, 1019 .bpc = 8, 1020 .lanes = 4, 1021 .format = MIPI_DSI_FMT_RGB888, 1022 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 1023 MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, 1024 .init_sequence = j606f_boe_init_sequence, 1025 .has_dcs_backlight = true, 1026 }; 1027 1028 static void nt36523_reset(struct panel_info *pinfo) 1029 { 1030 gpiod_set_value_cansleep(pinfo->reset_gpio, 1); 1031 usleep_range(12000, 13000); 1032 gpiod_set_value_cansleep(pinfo->reset_gpio, 0); 1033 usleep_range(12000, 13000); 1034 gpiod_set_value_cansleep(pinfo->reset_gpio, 1); 1035 usleep_range(12000, 13000); 1036 gpiod_set_value_cansleep(pinfo->reset_gpio, 0); 1037 usleep_range(12000, 13000); 1038 } 1039 1040 static int nt36523_prepare(struct drm_panel *panel) 1041 { 1042 struct panel_info *pinfo = to_panel_info(panel); 1043 int ret; 1044 1045 ret = regulator_enable(pinfo->vddio); 1046 if (ret) { 1047 dev_err(panel->dev, "failed to enable vddio regulator: %d\n", ret); 1048 return ret; 1049 } 1050 1051 nt36523_reset(pinfo); 1052 1053 ret = pinfo->desc->init_sequence(pinfo); 1054 if (ret < 0) { 1055 regulator_disable(pinfo->vddio); 1056 dev_err(panel->dev, "failed to initialize panel: %d\n", ret); 1057 return ret; 1058 } 1059 1060 return 0; 1061 } 1062 1063 static int nt36523_disable(struct drm_panel *panel) 1064 { 1065 struct panel_info *pinfo = to_panel_info(panel); 1066 int i, ret; 1067 1068 for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) { 1069 ret = mipi_dsi_dcs_set_display_off(pinfo->dsi[i]); 1070 if (ret < 0) 1071 dev_err(&pinfo->dsi[i]->dev, "failed to set display off: %d\n", ret); 1072 } 1073 1074 for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) { 1075 ret = mipi_dsi_dcs_enter_sleep_mode(pinfo->dsi[i]); 1076 if (ret < 0) 1077 dev_err(&pinfo->dsi[i]->dev, "failed to enter sleep mode: %d\n", ret); 1078 } 1079 1080 msleep(70); 1081 1082 return 0; 1083 } 1084 1085 static int nt36523_unprepare(struct drm_panel *panel) 1086 { 1087 struct panel_info *pinfo = to_panel_info(panel); 1088 1089 gpiod_set_value_cansleep(pinfo->reset_gpio, 1); 1090 regulator_disable(pinfo->vddio); 1091 1092 return 0; 1093 } 1094 1095 static void nt36523_remove(struct mipi_dsi_device *dsi) 1096 { 1097 struct panel_info *pinfo = mipi_dsi_get_drvdata(dsi); 1098 int ret; 1099 1100 ret = mipi_dsi_detach(pinfo->dsi[0]); 1101 if (ret < 0) 1102 dev_err(&dsi->dev, "failed to detach from DSI0 host: %d\n", ret); 1103 1104 if (pinfo->desc->is_dual_dsi) { 1105 ret = mipi_dsi_detach(pinfo->dsi[1]); 1106 if (ret < 0) 1107 dev_err(&pinfo->dsi[1]->dev, "failed to detach from DSI1 host: %d\n", ret); 1108 mipi_dsi_device_unregister(pinfo->dsi[1]); 1109 } 1110 1111 drm_panel_remove(&pinfo->panel); 1112 } 1113 1114 static int nt36523_get_modes(struct drm_panel *panel, 1115 struct drm_connector *connector) 1116 { 1117 struct panel_info *pinfo = to_panel_info(panel); 1118 int i; 1119 1120 for (i = 0; i < pinfo->desc->num_modes; i++) { 1121 const struct drm_display_mode *m = &pinfo->desc->modes[i]; 1122 struct drm_display_mode *mode; 1123 1124 mode = drm_mode_duplicate(connector->dev, m); 1125 if (!mode) { 1126 dev_err(panel->dev, "failed to add mode %ux%u@%u\n", 1127 m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); 1128 return -ENOMEM; 1129 } 1130 1131 mode->type = DRM_MODE_TYPE_DRIVER; 1132 if (i == 0) 1133 mode->type |= DRM_MODE_TYPE_PREFERRED; 1134 1135 drm_mode_set_name(mode); 1136 drm_mode_probed_add(connector, mode); 1137 } 1138 1139 connector->display_info.width_mm = pinfo->desc->width_mm; 1140 connector->display_info.height_mm = pinfo->desc->height_mm; 1141 connector->display_info.bpc = pinfo->desc->bpc; 1142 1143 return pinfo->desc->num_modes; 1144 } 1145 1146 static enum drm_panel_orientation nt36523_get_orientation(struct drm_panel *panel) 1147 { 1148 struct panel_info *pinfo = to_panel_info(panel); 1149 1150 return pinfo->orientation; 1151 } 1152 1153 static const struct drm_panel_funcs nt36523_panel_funcs = { 1154 .disable = nt36523_disable, 1155 .prepare = nt36523_prepare, 1156 .unprepare = nt36523_unprepare, 1157 .get_modes = nt36523_get_modes, 1158 .get_orientation = nt36523_get_orientation, 1159 }; 1160 1161 static int nt36523_bl_update_status(struct backlight_device *bl) 1162 { 1163 struct mipi_dsi_device *dsi = bl_get_data(bl); 1164 u16 brightness = backlight_get_brightness(bl); 1165 int ret; 1166 1167 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 1168 1169 ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness); 1170 if (ret < 0) 1171 return ret; 1172 1173 dsi->mode_flags |= MIPI_DSI_MODE_LPM; 1174 1175 return 0; 1176 } 1177 1178 static int nt36523_bl_get_brightness(struct backlight_device *bl) 1179 { 1180 struct mipi_dsi_device *dsi = bl_get_data(bl); 1181 u16 brightness; 1182 int ret; 1183 1184 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 1185 1186 ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness); 1187 if (ret < 0) 1188 return ret; 1189 1190 dsi->mode_flags |= MIPI_DSI_MODE_LPM; 1191 1192 return brightness; 1193 } 1194 1195 static const struct backlight_ops nt36523_bl_ops = { 1196 .update_status = nt36523_bl_update_status, 1197 .get_brightness = nt36523_bl_get_brightness, 1198 }; 1199 1200 static struct backlight_device *nt36523_create_backlight(struct mipi_dsi_device *dsi) 1201 { 1202 struct device *dev = &dsi->dev; 1203 const struct backlight_properties props = { 1204 .type = BACKLIGHT_RAW, 1205 .brightness = 512, 1206 .max_brightness = 4095, 1207 .scale = BACKLIGHT_SCALE_NON_LINEAR, 1208 }; 1209 1210 return devm_backlight_device_register(dev, dev_name(dev), dev, dsi, 1211 &nt36523_bl_ops, &props); 1212 } 1213 1214 static int nt36523_probe(struct mipi_dsi_device *dsi) 1215 { 1216 struct device *dev = &dsi->dev; 1217 struct device_node *dsi1; 1218 struct mipi_dsi_host *dsi1_host; 1219 struct panel_info *pinfo; 1220 const struct mipi_dsi_device_info *info; 1221 int i, ret; 1222 1223 pinfo = devm_kzalloc(dev, sizeof(*pinfo), GFP_KERNEL); 1224 if (!pinfo) 1225 return -ENOMEM; 1226 1227 pinfo->vddio = devm_regulator_get(dev, "vddio"); 1228 if (IS_ERR(pinfo->vddio)) 1229 return dev_err_probe(dev, PTR_ERR(pinfo->vddio), "failed to get vddio regulator\n"); 1230 1231 pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 1232 if (IS_ERR(pinfo->reset_gpio)) 1233 return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio), "failed to get reset gpio\n"); 1234 1235 pinfo->desc = of_device_get_match_data(dev); 1236 if (!pinfo->desc) 1237 return -ENODEV; 1238 1239 /* If the panel is dual dsi, register DSI1 */ 1240 if (pinfo->desc->is_dual_dsi) { 1241 info = &pinfo->desc->dsi_info; 1242 1243 dsi1 = of_graph_get_remote_node(dsi->dev.of_node, 1, -1); 1244 if (!dsi1) { 1245 dev_err(dev, "cannot get secondary DSI node.\n"); 1246 return -ENODEV; 1247 } 1248 1249 dsi1_host = of_find_mipi_dsi_host_by_node(dsi1); 1250 of_node_put(dsi1); 1251 if (!dsi1_host) 1252 return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n"); 1253 1254 pinfo->dsi[1] = mipi_dsi_device_register_full(dsi1_host, info); 1255 if (IS_ERR(pinfo->dsi[1])) { 1256 dev_err(dev, "cannot get secondary DSI device\n"); 1257 return PTR_ERR(pinfo->dsi[1]); 1258 } 1259 } 1260 1261 pinfo->dsi[0] = dsi; 1262 mipi_dsi_set_drvdata(dsi, pinfo); 1263 drm_panel_init(&pinfo->panel, dev, &nt36523_panel_funcs, DRM_MODE_CONNECTOR_DSI); 1264 1265 ret = of_drm_get_panel_orientation(dev->of_node, &pinfo->orientation); 1266 if (ret < 0) { 1267 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret); 1268 return ret; 1269 } 1270 1271 pinfo->panel.prepare_prev_first = true; 1272 1273 if (pinfo->desc->has_dcs_backlight) { 1274 pinfo->panel.backlight = nt36523_create_backlight(dsi); 1275 if (IS_ERR(pinfo->panel.backlight)) 1276 return dev_err_probe(dev, PTR_ERR(pinfo->panel.backlight), 1277 "Failed to create backlight\n"); 1278 } else { 1279 ret = drm_panel_of_backlight(&pinfo->panel); 1280 if (ret) 1281 return dev_err_probe(dev, ret, "Failed to get backlight\n"); 1282 } 1283 1284 drm_panel_add(&pinfo->panel); 1285 1286 for (i = 0; i < DSI_NUM_MIN + pinfo->desc->is_dual_dsi; i++) { 1287 pinfo->dsi[i]->lanes = pinfo->desc->lanes; 1288 pinfo->dsi[i]->format = pinfo->desc->format; 1289 pinfo->dsi[i]->mode_flags = pinfo->desc->mode_flags; 1290 1291 ret = mipi_dsi_attach(pinfo->dsi[i]); 1292 if (ret < 0) 1293 return dev_err_probe(dev, ret, "cannot attach to DSI%d host.\n", i); 1294 } 1295 1296 return 0; 1297 } 1298 1299 static const struct of_device_id nt36523_of_match[] = { 1300 { 1301 .compatible = "lenovo,j606f-boe-nt36523w", 1302 .data = &j606f_boe_desc, 1303 }, 1304 { 1305 .compatible = "xiaomi,elish-boe-nt36523", 1306 .data = &elish_boe_desc, 1307 }, 1308 { 1309 .compatible = "xiaomi,elish-csot-nt36523", 1310 .data = &elish_csot_desc, 1311 }, 1312 {}, 1313 }; 1314 MODULE_DEVICE_TABLE(of, nt36523_of_match); 1315 1316 static struct mipi_dsi_driver nt36523_driver = { 1317 .probe = nt36523_probe, 1318 .remove = nt36523_remove, 1319 .driver = { 1320 .name = "panel-novatek-nt36523", 1321 .of_match_table = nt36523_of_match, 1322 }, 1323 }; 1324 module_mipi_dsi_driver(nt36523_driver); 1325 1326 MODULE_AUTHOR("Jianhua Lu <lujianhua000@gmail.com>"); 1327 MODULE_DESCRIPTION("DRM driver for Novatek NT36523 based MIPI DSI panels"); 1328 MODULE_LICENSE("GPL"); 1329