xref: /linux/drivers/gpu/drm/panel/panel-jadard-jd9365da-h3.c (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2019 Radxa Limited
4  * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
5  *
6  * Author:
7  * - Jagan Teki <jagan@amarulasolutions.com>
8  * - Stephen Chen <stephen@radxa.com>
9  */
10 
11 #include <drm/drm_mipi_dsi.h>
12 #include <drm/drm_modes.h>
13 #include <drm/drm_panel.h>
14 #include <drm/drm_print.h>
15 
16 #include <linux/gpio/consumer.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/regulator/consumer.h>
21 
22 struct jadard;
23 
24 struct jadard_panel_desc {
25 	const struct drm_display_mode mode;
26 	unsigned int lanes;
27 	enum mipi_dsi_pixel_format format;
28 	int (*init)(struct jadard *jadard);
29 	bool lp11_before_reset;
30 	bool reset_before_power_off_vcioo;
31 	unsigned int vcioo_to_lp11_delay_ms;
32 	unsigned int lp11_to_reset_delay_ms;
33 	unsigned int backlight_off_to_display_off_delay_ms;
34 	unsigned int display_off_to_enter_sleep_delay_ms;
35 	unsigned int enter_sleep_to_reset_down_delay_ms;
36 };
37 
38 struct jadard {
39 	struct drm_panel panel;
40 	struct mipi_dsi_device *dsi;
41 	const struct jadard_panel_desc *desc;
42 	enum drm_panel_orientation orientation;
43 	struct regulator *vdd;
44 	struct regulator *vccio;
45 	struct gpio_desc *reset;
46 };
47 
48 #define JD9365DA_DCS_SWITCH_PAGE	0xe0
49 
50 #define jd9365da_switch_page(dsi_ctx, page) \
51 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, JD9365DA_DCS_SWITCH_PAGE, (page))
52 
53 static void jadard_enable_standard_cmds(struct mipi_dsi_multi_context *dsi_ctx)
54 {
55 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93);
56 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65);
57 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8);
58 	mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03);
59 }
60 
61 static inline struct jadard *panel_to_jadard(struct drm_panel *panel)
62 {
63 	return container_of(panel, struct jadard, panel);
64 }
65 
66 static int jadard_disable(struct drm_panel *panel)
67 {
68 	struct jadard *jadard = panel_to_jadard(panel);
69 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
70 
71 	if (jadard->desc->backlight_off_to_display_off_delay_ms)
72 		mipi_dsi_msleep(&dsi_ctx, jadard->desc->backlight_off_to_display_off_delay_ms);
73 
74 	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
75 
76 	if (jadard->desc->display_off_to_enter_sleep_delay_ms)
77 		mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_off_to_enter_sleep_delay_ms);
78 
79 	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
80 
81 	if (jadard->desc->enter_sleep_to_reset_down_delay_ms)
82 		mipi_dsi_msleep(&dsi_ctx, jadard->desc->enter_sleep_to_reset_down_delay_ms);
83 
84 	return dsi_ctx.accum_err;
85 }
86 
87 static int jadard_prepare(struct drm_panel *panel)
88 {
89 	struct jadard *jadard = panel_to_jadard(panel);
90 	int ret;
91 
92 	ret = regulator_enable(jadard->vccio);
93 	if (ret)
94 		return ret;
95 
96 	ret = regulator_enable(jadard->vdd);
97 	if (ret)
98 		return ret;
99 
100 	if (jadard->desc->vcioo_to_lp11_delay_ms)
101 		msleep(jadard->desc->vcioo_to_lp11_delay_ms);
102 
103 	if (jadard->desc->lp11_before_reset) {
104 		ret = mipi_dsi_dcs_nop(jadard->dsi);
105 		if (ret)
106 			return ret;
107 	}
108 
109 	if (jadard->desc->lp11_to_reset_delay_ms)
110 		msleep(jadard->desc->lp11_to_reset_delay_ms);
111 
112 	gpiod_set_value(jadard->reset, 1);
113 	msleep(5);
114 
115 	gpiod_set_value(jadard->reset, 0);
116 	msleep(10);
117 
118 	gpiod_set_value(jadard->reset, 1);
119 	msleep(130);
120 
121 	ret = jadard->desc->init(jadard);
122 	if (ret)
123 		return ret;
124 
125 	return 0;
126 }
127 
128 static int jadard_unprepare(struct drm_panel *panel)
129 {
130 	struct jadard *jadard = panel_to_jadard(panel);
131 
132 	gpiod_set_value(jadard->reset, 1);
133 	msleep(120);
134 
135 	if (jadard->desc->reset_before_power_off_vcioo) {
136 		gpiod_set_value(jadard->reset, 0);
137 
138 		usleep_range(1000, 2000);
139 	}
140 
141 	regulator_disable(jadard->vdd);
142 	regulator_disable(jadard->vccio);
143 
144 	return 0;
145 }
146 
147 static int jadard_get_modes(struct drm_panel *panel,
148 			    struct drm_connector *connector)
149 {
150 	struct jadard *jadard = panel_to_jadard(panel);
151 	const struct drm_display_mode *desc_mode = &jadard->desc->mode;
152 	struct drm_display_mode *mode;
153 
154 	mode = drm_mode_duplicate(connector->dev, desc_mode);
155 	if (!mode) {
156 		DRM_DEV_ERROR(&jadard->dsi->dev, "failed to add mode %ux%ux@%u\n",
157 			      desc_mode->hdisplay, desc_mode->vdisplay,
158 			      drm_mode_vrefresh(desc_mode));
159 		return -ENOMEM;
160 	}
161 
162 	drm_mode_set_name(mode);
163 	drm_mode_probed_add(connector, mode);
164 
165 	connector->display_info.width_mm = mode->width_mm;
166 	connector->display_info.height_mm = mode->height_mm;
167 
168 	return 1;
169 }
170 
171 static enum drm_panel_orientation jadard_panel_get_orientation(struct drm_panel *panel)
172 {
173 	struct jadard *jadard = panel_to_jadard(panel);
174 
175 	return jadard->orientation;
176 }
177 
178 static const struct drm_panel_funcs jadard_funcs = {
179 	.disable = jadard_disable,
180 	.unprepare = jadard_unprepare,
181 	.prepare = jadard_prepare,
182 	.get_modes = jadard_get_modes,
183 	.get_orientation = jadard_panel_get_orientation,
184 };
185 
186 static int radxa_display_8hd_ad002_init_cmds(struct jadard *jadard)
187 {
188 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
189 
190 	jd9365da_switch_page(&dsi_ctx, 0x00);
191 	jadard_enable_standard_cmds(&dsi_ctx);
192 
193 	jd9365da_switch_page(&dsi_ctx, 0x01);
194 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
195 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x7E);
196 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00);
197 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x65);
198 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x74);
199 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
200 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xB7);
201 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
202 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x00);
203 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0xB7);
204 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x00);
205 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xFE);
206 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
207 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
208 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00);
209 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x01);
210 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0x01);
211 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x70);
212 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0xFF);
213 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0xFF);
214 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0xFF);
215 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
216 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xA0);
217 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1E);
218 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0F);
219 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28);
220 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0x04);
221 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
222 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01);
223 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0xA9);
224 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x0A);
225 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0A);
226 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x37);
227 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x19);
228 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x78);
229 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x63);
230 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x54);
231 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x49);
232 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x45);
233 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x38);
234 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x3D);
235 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x28);
236 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x43);
237 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x41);
238 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x43);
239 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x62);
240 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x50);
241 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x57);
242 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x49);
243 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x44);
244 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x37);
245 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x23);
246 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x10);
247 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x78);
248 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x63);
249 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x54);
250 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x49);
251 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x45);
252 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x38);
253 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x3D);
254 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x28);
255 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x43);
256 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x41);
257 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x43);
258 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x62);
259 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x50);
260 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x57);
261 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x49);
262 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7F, 0x44);
263 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x37);
264 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x23);
265 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x10);
266 
267 	jd9365da_switch_page(&dsi_ctx, 0x02);
268 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x47);
269 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x47);
270 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x45);
271 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x45);
272 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x4B);
273 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x4B);
274 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x49);
275 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x49);
276 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x41);
277 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x1F);
278 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0A, 0x1F);
279 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0B, 0x1F);
280 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x1F);
281 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0D, 0x1F);
282 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x1F);
283 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0F, 0x5F);
284 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5F);
285 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x57);
286 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77);
287 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x35);
288 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x1F);
289 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x1F);
290 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x46);
291 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x46);
292 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x44);
293 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x44);
294 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x4A);
295 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0x4A);
296 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x48);
297 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1D, 0x48);
298 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1E, 0x40);
299 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1F, 0x1F);
300 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x1F);
301 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x1F);
302 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x1F);
303 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x1F);
304 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x1F);
305 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x5F);
306 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5F);
307 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x57);
308 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x77);
309 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x35);
310 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0x1F);
311 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2B, 0x1F);
312 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
313 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x00);
314 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x00);
315 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x10);
316 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x06);
317 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x40);
318 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x01);
319 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x02);
320 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x30);
321 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x01);
322 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x02);
323 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x03);
324 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6B);
325 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);
326 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x0C);
327 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73);
328 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x09);
329 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x03);
330 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x56);
331 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x08);
332 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x00);
333 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x04);
334 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x04);
335 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x88);
336 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x00);
337 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x00);
338 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x06);
339 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x7B);
340 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x00);
341 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xF8);
342 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
343 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xD5);
344 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2E);
345 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x12);
346 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x03);
347 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x00);
348 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x00);
349 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x03);
350 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x7B);
351 
352 	jd9365da_switch_page(&dsi_ctx, 0x04);
353 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0E);
354 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xB3);
355 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x60);
356 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x2A);
357 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x59);
358 
359 	jd9365da_switch_page(&dsi_ctx, 0x00);
360 
361 	mipi_dsi_msleep(&dsi_ctx, 120);
362 
363 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
364 
365 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
366 
367 	return dsi_ctx.accum_err;
368 };
369 
370 static const struct jadard_panel_desc radxa_display_8hd_ad002_desc = {
371 	.mode = {
372 		.clock		= 70000,
373 
374 		.hdisplay	= 800,
375 		.hsync_start	= 800 + 40,
376 		.hsync_end	= 800 + 40 + 18,
377 		.htotal		= 800 + 40 + 18 + 20,
378 
379 		.vdisplay	= 1280,
380 		.vsync_start	= 1280 + 20,
381 		.vsync_end	= 1280 + 20 + 4,
382 		.vtotal		= 1280 + 20 + 4 + 20,
383 
384 		.width_mm	= 127,
385 		.height_mm	= 199,
386 		.type		= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
387 	},
388 	.lanes = 4,
389 	.format = MIPI_DSI_FMT_RGB888,
390 	.init = radxa_display_8hd_ad002_init_cmds,
391 };
392 
393 static int cz101b4001_init_cmds(struct jadard *jadard)
394 {
395 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
396 
397 	jd9365da_switch_page(&dsi_ctx, 0x00);
398 	jadard_enable_standard_cmds(&dsi_ctx);
399 
400 	jd9365da_switch_page(&dsi_ctx, 0x01);
401 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00);
402 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x3B);
403 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x74);
404 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
405 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xAF);
406 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
407 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x00);
408 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0xAF);
409 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x00);
410 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x26);
411 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09);
412 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x04);
413 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00);
414 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x01);
415 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x78);
416 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0xFF);
417 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0xFF);
418 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x7F);
419 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
420 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xA0);
421 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x81);
422 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x14);
423 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x23);
424 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28);
425 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
426 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x69);
427 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0A);
428 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x2A);
429 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x17);
430 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x7F);
431 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x6B);
432 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x5C);
433 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x4F);
434 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x4D);
435 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x3F);
436 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x42);
437 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x2B);
438 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x44);
439 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x43);
440 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x43);
441 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x63);
442 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x52);
443 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x5A);
444 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x4F);
445 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x4E);
446 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x20);
447 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x0F);
448 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x00);
449 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7F);
450 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x6B);
451 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x5C);
452 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x4F);
453 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x4D);
454 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x3F);
455 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x42);
456 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x2B);
457 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x44);
458 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x43);
459 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x43);
460 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x63);
461 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x52);
462 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x5A);
463 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x4F);
464 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7F, 0x4E);
465 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x20);
466 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x0F);
467 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x00);
468 
469 	jd9365da_switch_page(&dsi_ctx, 0x02);
470 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x02);
471 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x02);
472 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x00);
473 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00);
474 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x1E);
475 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x1E);
476 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x1F);
477 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x1F);
478 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x1F);
479 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x17);
480 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0A, 0x17);
481 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0B, 0x37);
482 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x37);
483 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0D, 0x47);
484 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x47);
485 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0F, 0x45);
486 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x45);
487 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x4B);
488 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x4B);
489 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x49);
490 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x49);
491 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x1F);
492 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x01);
493 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x01);
494 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x00);
495 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00);
496 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x1E);
497 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0x1E);
498 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x1F);
499 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1D, 0x1F);
500 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1E, 0x1F);
501 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1F, 0x17);
502 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x17);
503 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x37);
504 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x37);
505 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x46);
506 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x46);
507 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x44);
508 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x44);
509 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x4A);
510 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x4A);
511 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x48);
512 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0x48);
513 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2B, 0x1F);
514 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2C, 0x01);
515 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2D, 0x01);
516 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2E, 0x00);
517 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2F, 0x00);
518 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x1F);
519 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x1F);
520 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1E);
521 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x1E);
522 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x1F);
523 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x17);
524 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x17);
525 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x37);
526 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x37);
527 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
528 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x08);
529 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0x0A);
530 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x0A);
531 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0x04);
532 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0x04);
533 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x06);
534 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
535 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1F);
536 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x02);
537 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x02);
538 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x00);
539 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00);
540 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x1F);
541 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x1F);
542 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1E);
543 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x1E);
544 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4A, 0x1F);
545 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0x17);
546 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4C, 0x17);
547 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4D, 0x37);
548 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4E, 0x37);
549 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4F, 0x09);
550 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x09);
551 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x0B);
552 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x0B);
553 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x05);
554 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x05);
555 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x07);
556 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x07);
557 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1F);
558 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
559 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x30);
560 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x16);
561 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x34);
562 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x05);
563 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x02);
564 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x00);
565 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6A);
566 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73);
567 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x1D);
568 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x08);
569 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x6A);
570 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x08);
571 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x00);
572 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x00);
573 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x00);
574 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x88);
575 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xFF);
576 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xDD);
577 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x3F);
578 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x15);
579 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x17);
580 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x14);
581 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x82);
582 
583 	jd9365da_switch_page(&dsi_ctx, 0x04);
584 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0E);
585 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xB3);
586 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61);
587 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x48);
588 
589 	jd9365da_switch_page(&dsi_ctx, 0x00);
590 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE6, 0x02);
591 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE7, 0x0C);
592 
593 	mipi_dsi_msleep(&dsi_ctx, 120);
594 
595 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
596 
597 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
598 
599 	return dsi_ctx.accum_err;
600 };
601 
602 static const struct jadard_panel_desc cz101b4001_desc = {
603 	.mode = {
604 		.clock		= 70000,
605 
606 		.hdisplay	= 800,
607 		.hsync_start	= 800 + 40,
608 		.hsync_end	= 800 + 40 + 18,
609 		.htotal		= 800 + 40 + 18 + 20,
610 
611 		.vdisplay	= 1280,
612 		.vsync_start	= 1280 + 20,
613 		.vsync_end	= 1280 + 20 + 4,
614 		.vtotal		= 1280 + 20 + 4 + 20,
615 
616 		.width_mm	= 62,
617 		.height_mm	= 110,
618 		.type		= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
619 	},
620 	.lanes = 4,
621 	.format = MIPI_DSI_FMT_RGB888,
622 	.init = cz101b4001_init_cmds,
623 };
624 
625 static int kingdisplay_kd101ne3_init_cmds(struct jadard *jadard)
626 {
627 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
628 
629 	jd9365da_switch_page(&dsi_ctx, 0x00);
630 	jadard_enable_standard_cmds(&dsi_ctx);
631 
632 	jd9365da_switch_page(&dsi_ctx, 0x01);
633 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
634 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
635 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xc7);
636 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01);
637 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
638 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xc7);
639 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01);
640 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe);
641 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
642 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28);
643 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
644 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
645 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12);
646 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e);
647 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
648 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
649 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f);
650 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
651 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0);
652 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
653 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b);
654 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
655 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a);
656 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
657 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e);
658 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a);
659 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15);
660 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f);
661 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x61);
662 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x50);
663 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x43);
664 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x3f);
665 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x32);
666 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x35);
667 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x1f);
668 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x38);
669 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x36);
670 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x36);
671 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x54);
672 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x42);
673 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x48);
674 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x39);
675 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x34);
676 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x26);
677 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x14);
678 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);
679 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f);
680 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x61);
681 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x50);
682 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x43);
683 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x3f);
684 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x32);
685 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x35);
686 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x1f);
687 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x38);
688 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x36);
689 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x36);
690 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x54);
691 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x42);
692 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x48);
693 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x39);
694 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x34);
695 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x26);
696 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x14);
697 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02);
698 
699 	jd9365da_switch_page(&dsi_ctx, 0x02);
700 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x52);
701 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5f);
702 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5f);
703 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x50);
704 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x77);
705 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x57);
706 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x5f);
707 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4e);
708 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4c);
709 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5f);
710 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x4a);
711 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x48);
712 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x5f);
713 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x46);
714 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x44);
715 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x40);
716 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5f);
717 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x5f);
718 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x5f);
719 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x5f);
720 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x5f);
721 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f);
722 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x53);
723 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5f);
724 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5f);
725 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x51);
726 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x77);
727 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x57);
728 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x5f);
729 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4f);
730 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4d);
731 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x5f);
732 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x4b);
733 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x49);
734 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x5f);
735 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x47);
736 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x45);
737 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x41);
738 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5f);
739 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x5f);
740 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x5f);
741 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x5f);
742 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x5f);
743 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f);
744 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x13);
745 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x1f);
746 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x1f);
747 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x01);
748 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x17);
749 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x17);
750 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1f);
751 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0d);
752 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x0f);
753 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x1f);
754 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x05);
755 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x07);
756 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x1f);
757 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x09);
758 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0b);
759 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x11);
760 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x1f);
761 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x1f);
762 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x1f);
763 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x1f);
764 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x1f);
765 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f);
766 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x12);
767 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1f);
768 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1f);
769 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00);
770 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x17);
771 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x17);
772 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1f);
773 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0c);
774 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x0e);
775 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x1f);
776 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x04);
777 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x06);
778 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x1f);
779 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x08);
780 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x0a);
781 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x10);
782 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x1f);
783 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x1f);
784 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x1f);
785 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x1f);
786 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x1f);
787 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f);
788 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
789 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10);
790 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06);
791 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40);
792 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x00);
793 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00);
794 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x40);
795 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03);
796 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04);
797 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x6c);
798 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6c);
799 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x75);
800 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x08);
801 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xb4);
802 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x08);
803 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x6c);
804 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6c);
805 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x0c);
806 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
807 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00);
808 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
809 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xbb);
810 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
811 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x05);
812 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2a);
813 
814 	jd9365da_switch_page(&dsi_ctx, 0x04);
815 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0e);
816 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xb3);
817 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61);
818 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48);
819 
820 	jd9365da_switch_page(&dsi_ctx, 0x00);
821 
822 	mipi_dsi_msleep(&dsi_ctx, 120);
823 
824 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
825 
826 	mipi_dsi_msleep(&dsi_ctx, 120);
827 
828 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
829 
830 	mipi_dsi_msleep(&dsi_ctx, 20);
831 
832 	return dsi_ctx.accum_err;
833 };
834 
835 static const struct jadard_panel_desc kingdisplay_kd101ne3_40ti_desc = {
836 	.mode = {
837 		.clock		= (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,
838 
839 		.hdisplay	= 800,
840 		.hsync_start	= 800 + 24,
841 		.hsync_end	= 800 + 24 + 24,
842 		.htotal		= 800 + 24 + 24 + 24,
843 
844 		.vdisplay	= 1280,
845 		.vsync_start	= 1280 + 30,
846 		.vsync_end	= 1280 + 30 + 4,
847 		.vtotal		= 1280 + 30 + 4 + 8,
848 
849 		.width_mm	= 135,
850 		.height_mm	= 216,
851 		.type		= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
852 	},
853 	.lanes = 4,
854 	.format = MIPI_DSI_FMT_RGB888,
855 	.init = kingdisplay_kd101ne3_init_cmds,
856 	.lp11_before_reset = true,
857 	.reset_before_power_off_vcioo = true,
858 	.vcioo_to_lp11_delay_ms = 5,
859 	.lp11_to_reset_delay_ms = 10,
860 	.backlight_off_to_display_off_delay_ms = 100,
861 	.display_off_to_enter_sleep_delay_ms = 50,
862 	.enter_sleep_to_reset_down_delay_ms = 100,
863 };
864 
865 static int melfas_lmfbx101117480_init_cmds(struct jadard *jadard)
866 {
867 	struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi };
868 
869 	jd9365da_switch_page(&dsi_ctx, 0x00);
870 	jadard_enable_standard_cmds(&dsi_ctx);
871 
872 	jd9365da_switch_page(&dsi_ctx, 0x01);
873 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
874 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00);
875 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xd7);
876 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01);
877 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00);
878 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xd7);
879 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01);
880 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x70);
881 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x2d);
882 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x2d);
883 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x7e);
884 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfd);
885 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19);
886 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28);
887 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05);
888 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08);
889 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12);
890 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e);
891 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff);
892 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff);
893 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f);
894 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06);
895 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0);
896 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e);
897 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b);
898 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74);
899 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02);
900 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01);
901 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a);
902 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x09);
903 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a);
904 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e);
905 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a);
906 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15);
907 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x73);
908 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x56);
909 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x43);
910 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x38);
911 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x36);
912 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x28);
913 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x2f);
914 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x19);
915 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x32);
916 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x31);
917 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x31);
918 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x4f);
919 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x3e);
920 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x47);
921 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x36);
922 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x31);
923 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x24);
924 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x12);
925 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02);
926 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x73);
927 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x56);
928 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x43);
929 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x38);
930 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x36);
931 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x28);
932 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x2f);
933 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x19);
934 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x32);
935 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x31);
936 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x31);
937 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x4f);
938 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x3e);
939 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x47);
940 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x36);
941 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x31);
942 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x24);
943 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x12);
944 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02);
945 
946 	jd9365da_switch_page(&dsi_ctx, 0x02);
947 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x52);
948 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x55);
949 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x55);
950 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x50);
951 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x77);
952 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x57);
953 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x55);
954 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4e);
955 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4c);
956 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5f);
957 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x4a);
958 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x48);
959 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x55);
960 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x46);
961 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x44);
962 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x40);
963 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x55);
964 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x55);
965 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x55);
966 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x55);
967 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x55);
968 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x55);
969 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x53);
970 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x55);
971 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x55);
972 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x51);
973 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x77);
974 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x57);
975 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x55);
976 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4f);
977 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4d);
978 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x5f);
979 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x4b);
980 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x49);
981 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x55);
982 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x47);
983 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x45);
984 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x41);
985 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x55);
986 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x55);
987 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x55);
988 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x55);
989 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x55);
990 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x55);
991 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x13);
992 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x15);
993 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x15);
994 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x01);
995 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x37);
996 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x17);
997 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x15);
998 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0d);
999 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x0f);
1000 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x15);
1001 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x05);
1002 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x07);
1003 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x15);
1004 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x09);
1005 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0b);
1006 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x11);
1007 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x15);
1008 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x15);
1009 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x15);
1010 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x15);
1011 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x15);
1012 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x15);
1013 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x12);
1014 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x15);
1015 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x15);
1016 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00);
1017 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x37);
1018 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x17);
1019 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x15);
1020 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0c);
1021 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x0e);
1022 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x15);
1023 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x04);
1024 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x06);
1025 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x15);
1026 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x08);
1027 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x0a);
1028 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x10);
1029 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x15);
1030 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x15);
1031 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x15);
1032 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x15);
1033 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x15);
1034 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x15);
1035 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40);
1036 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10);
1037 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06);
1038 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40);
1039 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x00);
1040 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00);
1041 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x40);
1042 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03);
1043 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04);
1044 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x6c);
1045 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6c);
1046 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x75);
1047 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x08);
1048 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xb4);
1049 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x08);
1050 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x6c);
1051 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6c);
1052 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x0c);
1053 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
1054 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00);
1055 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88);
1056 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xbb);
1057 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00);
1058 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x05);
1059 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2a);
1060 
1061 	jd9365da_switch_page(&dsi_ctx, 0x04);
1062 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x23);
1063 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x11);
1064 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48);
1065 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x49);
1066 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x08);
1067 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x03);
1068 
1069 	jd9365da_switch_page(&dsi_ctx, 0x00);
1070 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x02);
1071 	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe7, 0x06);
1072 
1073 	mipi_dsi_msleep(&dsi_ctx, 120);
1074 
1075 	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
1076 
1077 	mipi_dsi_msleep(&dsi_ctx, 120);
1078 
1079 	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
1080 
1081 	mipi_dsi_msleep(&dsi_ctx, 20);
1082 
1083 	return dsi_ctx.accum_err;
1084 };
1085 
1086 static const struct jadard_panel_desc melfas_lmfbx101117480_desc = {
1087 	.mode = {
1088 		.clock		= (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000,
1089 
1090 		.hdisplay	= 800,
1091 		.hsync_start	= 800 + 24,
1092 		.hsync_end	= 800 + 24 + 24,
1093 		.htotal		= 800 + 24 + 24 + 24,
1094 
1095 		.vdisplay	= 1280,
1096 		.vsync_start	= 1280 + 30,
1097 		.vsync_end	= 1280 + 30 + 4,
1098 		.vtotal		= 1280 + 30 + 4 + 8,
1099 
1100 		.width_mm	= 135,
1101 		.height_mm	= 216,
1102 		.type		= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1103 	},
1104 	.lanes = 4,
1105 	.format = MIPI_DSI_FMT_RGB888,
1106 	.init = melfas_lmfbx101117480_init_cmds,
1107 	.lp11_before_reset = true,
1108 	.reset_before_power_off_vcioo = true,
1109 	.vcioo_to_lp11_delay_ms = 5,
1110 	.lp11_to_reset_delay_ms = 10,
1111 	.backlight_off_to_display_off_delay_ms = 100,
1112 	.display_off_to_enter_sleep_delay_ms = 50,
1113 	.enter_sleep_to_reset_down_delay_ms = 100,
1114 };
1115 
1116 static int jadard_dsi_probe(struct mipi_dsi_device *dsi)
1117 {
1118 	struct device *dev = &dsi->dev;
1119 	const struct jadard_panel_desc *desc;
1120 	struct jadard *jadard;
1121 	int ret;
1122 
1123 	jadard = devm_kzalloc(&dsi->dev, sizeof(*jadard), GFP_KERNEL);
1124 	if (!jadard)
1125 		return -ENOMEM;
1126 
1127 	desc = of_device_get_match_data(dev);
1128 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
1129 			  MIPI_DSI_MODE_NO_EOT_PACKET;
1130 	dsi->format = desc->format;
1131 	dsi->lanes = desc->lanes;
1132 
1133 	jadard->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1134 	if (IS_ERR(jadard->reset)) {
1135 		DRM_DEV_ERROR(&dsi->dev, "failed to get our reset GPIO\n");
1136 		return PTR_ERR(jadard->reset);
1137 	}
1138 
1139 	jadard->vdd = devm_regulator_get(dev, "vdd");
1140 	if (IS_ERR(jadard->vdd)) {
1141 		DRM_DEV_ERROR(&dsi->dev, "failed to get vdd regulator\n");
1142 		return PTR_ERR(jadard->vdd);
1143 	}
1144 
1145 	jadard->vccio = devm_regulator_get(dev, "vccio");
1146 	if (IS_ERR(jadard->vccio)) {
1147 		DRM_DEV_ERROR(&dsi->dev, "failed to get vccio regulator\n");
1148 		return PTR_ERR(jadard->vccio);
1149 	}
1150 
1151 	drm_panel_init(&jadard->panel, dev, &jadard_funcs,
1152 		       DRM_MODE_CONNECTOR_DSI);
1153 
1154 	ret = of_drm_get_panel_orientation(dev->of_node, &jadard->orientation);
1155 	if (ret < 0)
1156 		return dev_err_probe(dev, ret, "failed to get orientation\n");
1157 
1158 	ret = drm_panel_of_backlight(&jadard->panel);
1159 	if (ret)
1160 		return ret;
1161 
1162 	drm_panel_add(&jadard->panel);
1163 
1164 	mipi_dsi_set_drvdata(dsi, jadard);
1165 	jadard->dsi = dsi;
1166 	jadard->desc = desc;
1167 
1168 	ret = mipi_dsi_attach(dsi);
1169 	if (ret < 0)
1170 		drm_panel_remove(&jadard->panel);
1171 
1172 	return ret;
1173 }
1174 
1175 static void jadard_dsi_remove(struct mipi_dsi_device *dsi)
1176 {
1177 	struct jadard *jadard = mipi_dsi_get_drvdata(dsi);
1178 
1179 	mipi_dsi_detach(dsi);
1180 	drm_panel_remove(&jadard->panel);
1181 }
1182 
1183 static const struct of_device_id jadard_of_match[] = {
1184 	{
1185 		.compatible = "chongzhou,cz101b4001",
1186 		.data = &cz101b4001_desc
1187 	},
1188 	{
1189 		.compatible = "kingdisplay,kd101ne3-40ti",
1190 		.data = &kingdisplay_kd101ne3_40ti_desc
1191 	},
1192 	{
1193 		.compatible = "melfas,lmfbx101117480",
1194 		.data = &melfas_lmfbx101117480_desc
1195 	},
1196 	{
1197 		.compatible = "radxa,display-10hd-ad001",
1198 		.data = &cz101b4001_desc
1199 	},
1200 	{
1201 		.compatible = "radxa,display-8hd-ad002",
1202 		.data = &radxa_display_8hd_ad002_desc
1203 	},
1204 	{ /* sentinel */ }
1205 };
1206 MODULE_DEVICE_TABLE(of, jadard_of_match);
1207 
1208 static struct mipi_dsi_driver jadard_driver = {
1209 	.probe = jadard_dsi_probe,
1210 	.remove = jadard_dsi_remove,
1211 	.driver = {
1212 		.name = "jadard-jd9365da",
1213 		.of_match_table = jadard_of_match,
1214 	},
1215 };
1216 module_mipi_dsi_driver(jadard_driver);
1217 
1218 MODULE_AUTHOR("Jagan Teki <jagan@edgeble.ai>");
1219 MODULE_AUTHOR("Stephen Chen <stephen@radxa.com>");
1220 MODULE_DESCRIPTION("Jadard JD9365DA-H3 WXGA DSI panel");
1221 MODULE_LICENSE("GPL");
1222