1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (c) 2019 Radxa Limited 4 * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. 5 * 6 * Author: 7 * - Jagan Teki <jagan@amarulasolutions.com> 8 * - Stephen Chen <stephen@radxa.com> 9 */ 10 11 #include <drm/drm_mipi_dsi.h> 12 #include <drm/drm_modes.h> 13 #include <drm/drm_panel.h> 14 #include <drm/drm_print.h> 15 16 #include <linux/gpio/consumer.h> 17 #include <linux/delay.h> 18 #include <linux/module.h> 19 #include <linux/of.h> 20 #include <linux/regulator/consumer.h> 21 22 struct jadard; 23 24 struct jadard_panel_desc { 25 const struct drm_display_mode mode; 26 unsigned int lanes; 27 enum mipi_dsi_pixel_format format; 28 int (*init)(struct jadard *jadard); 29 u32 num_init_cmds; 30 bool lp11_before_reset; 31 bool reset_before_power_off_vcioo; 32 unsigned int vcioo_to_lp11_delay_ms; 33 unsigned int lp11_to_reset_delay_ms; 34 unsigned int backlight_off_to_display_off_delay_ms; 35 unsigned int display_off_to_enter_sleep_delay_ms; 36 unsigned int enter_sleep_to_reset_down_delay_ms; 37 }; 38 39 struct jadard { 40 struct drm_panel panel; 41 struct mipi_dsi_device *dsi; 42 const struct jadard_panel_desc *desc; 43 enum drm_panel_orientation orientation; 44 struct regulator *vdd; 45 struct regulator *vccio; 46 struct gpio_desc *reset; 47 }; 48 49 #define JD9365DA_DCS_SWITCH_PAGE 0xe0 50 51 #define jd9365da_switch_page(dsi_ctx, page) \ 52 mipi_dsi_dcs_write_seq_multi(dsi_ctx, JD9365DA_DCS_SWITCH_PAGE, (page)) 53 54 static void jadard_enable_standard_cmds(struct mipi_dsi_multi_context *dsi_ctx) 55 { 56 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93); 57 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65); 58 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8); 59 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03); 60 } 61 62 static inline struct jadard *panel_to_jadard(struct drm_panel *panel) 63 { 64 return container_of(panel, struct jadard, panel); 65 } 66 67 static int jadard_disable(struct drm_panel *panel) 68 { 69 struct jadard *jadard = panel_to_jadard(panel); 70 struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi }; 71 72 if (jadard->desc->backlight_off_to_display_off_delay_ms) 73 mipi_dsi_msleep(&dsi_ctx, jadard->desc->backlight_off_to_display_off_delay_ms); 74 75 mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); 76 77 if (jadard->desc->display_off_to_enter_sleep_delay_ms) 78 mipi_dsi_msleep(&dsi_ctx, jadard->desc->display_off_to_enter_sleep_delay_ms); 79 80 mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); 81 82 if (jadard->desc->enter_sleep_to_reset_down_delay_ms) 83 mipi_dsi_msleep(&dsi_ctx, jadard->desc->enter_sleep_to_reset_down_delay_ms); 84 85 return dsi_ctx.accum_err; 86 } 87 88 static int jadard_prepare(struct drm_panel *panel) 89 { 90 struct jadard *jadard = panel_to_jadard(panel); 91 int ret; 92 93 ret = regulator_enable(jadard->vccio); 94 if (ret) 95 return ret; 96 97 ret = regulator_enable(jadard->vdd); 98 if (ret) 99 return ret; 100 101 if (jadard->desc->vcioo_to_lp11_delay_ms) 102 msleep(jadard->desc->vcioo_to_lp11_delay_ms); 103 104 if (jadard->desc->lp11_before_reset) { 105 ret = mipi_dsi_dcs_nop(jadard->dsi); 106 if (ret) 107 return ret; 108 } 109 110 if (jadard->desc->lp11_to_reset_delay_ms) 111 msleep(jadard->desc->lp11_to_reset_delay_ms); 112 113 gpiod_set_value(jadard->reset, 1); 114 msleep(5); 115 116 gpiod_set_value(jadard->reset, 0); 117 msleep(10); 118 119 gpiod_set_value(jadard->reset, 1); 120 msleep(130); 121 122 ret = jadard->desc->init(jadard); 123 if (ret) 124 return ret; 125 126 return 0; 127 } 128 129 static int jadard_unprepare(struct drm_panel *panel) 130 { 131 struct jadard *jadard = panel_to_jadard(panel); 132 133 gpiod_set_value(jadard->reset, 1); 134 msleep(120); 135 136 if (jadard->desc->reset_before_power_off_vcioo) { 137 gpiod_set_value(jadard->reset, 0); 138 139 usleep_range(1000, 2000); 140 } 141 142 regulator_disable(jadard->vdd); 143 regulator_disable(jadard->vccio); 144 145 return 0; 146 } 147 148 static int jadard_get_modes(struct drm_panel *panel, 149 struct drm_connector *connector) 150 { 151 struct jadard *jadard = panel_to_jadard(panel); 152 const struct drm_display_mode *desc_mode = &jadard->desc->mode; 153 struct drm_display_mode *mode; 154 155 mode = drm_mode_duplicate(connector->dev, desc_mode); 156 if (!mode) { 157 DRM_DEV_ERROR(&jadard->dsi->dev, "failed to add mode %ux%ux@%u\n", 158 desc_mode->hdisplay, desc_mode->vdisplay, 159 drm_mode_vrefresh(desc_mode)); 160 return -ENOMEM; 161 } 162 163 drm_mode_set_name(mode); 164 drm_mode_probed_add(connector, mode); 165 166 connector->display_info.width_mm = mode->width_mm; 167 connector->display_info.height_mm = mode->height_mm; 168 169 return 1; 170 } 171 172 static enum drm_panel_orientation jadard_panel_get_orientation(struct drm_panel *panel) 173 { 174 struct jadard *jadard = panel_to_jadard(panel); 175 176 return jadard->orientation; 177 } 178 179 static const struct drm_panel_funcs jadard_funcs = { 180 .disable = jadard_disable, 181 .unprepare = jadard_unprepare, 182 .prepare = jadard_prepare, 183 .get_modes = jadard_get_modes, 184 .get_orientation = jadard_panel_get_orientation, 185 }; 186 187 static int radxa_display_8hd_ad002_init_cmds(struct jadard *jadard) 188 { 189 struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi }; 190 191 jd9365da_switch_page(&dsi_ctx, 0x00); 192 jadard_enable_standard_cmds(&dsi_ctx); 193 194 jd9365da_switch_page(&dsi_ctx, 0x01); 195 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); 196 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x7E); 197 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00); 198 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x65); 199 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x74); 200 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); 201 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xB7); 202 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00); 203 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x00); 204 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0xB7); 205 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x00); 206 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xFE); 207 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19); 208 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05); 209 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00); 210 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x01); 211 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0x01); 212 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x70); 213 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0xFF); 214 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0xFF); 215 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0xFF); 216 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06); 217 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xA0); 218 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1E); 219 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0F); 220 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28); 221 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0x04); 222 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02); 223 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01); 224 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0xA9); 225 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x0A); 226 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0A); 227 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x37); 228 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x19); 229 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x78); 230 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x63); 231 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x54); 232 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x49); 233 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x45); 234 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x38); 235 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x3D); 236 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x28); 237 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x43); 238 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x41); 239 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x43); 240 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x62); 241 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x50); 242 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x57); 243 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x49); 244 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x44); 245 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x37); 246 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x23); 247 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x10); 248 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x78); 249 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x63); 250 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x54); 251 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x49); 252 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x45); 253 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x38); 254 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x3D); 255 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x28); 256 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x43); 257 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x41); 258 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x43); 259 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x62); 260 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x50); 261 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x57); 262 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x49); 263 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7F, 0x44); 264 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x37); 265 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x23); 266 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x10); 267 268 jd9365da_switch_page(&dsi_ctx, 0x02); 269 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x47); 270 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x47); 271 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x45); 272 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x45); 273 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x4B); 274 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x4B); 275 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x49); 276 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x49); 277 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x41); 278 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x1F); 279 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0A, 0x1F); 280 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0B, 0x1F); 281 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x1F); 282 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0D, 0x1F); 283 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x1F); 284 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0F, 0x5F); 285 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5F); 286 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x57); 287 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77); 288 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x35); 289 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x1F); 290 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x1F); 291 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x46); 292 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x46); 293 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x44); 294 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x44); 295 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x4A); 296 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0x4A); 297 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x48); 298 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1D, 0x48); 299 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1E, 0x40); 300 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1F, 0x1F); 301 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x1F); 302 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x1F); 303 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x1F); 304 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x1F); 305 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x1F); 306 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x5F); 307 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5F); 308 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x57); 309 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x77); 310 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x35); 311 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0x1F); 312 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2B, 0x1F); 313 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40); 314 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x00); 315 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x00); 316 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x10); 317 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x06); 318 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x40); 319 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x01); 320 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x02); 321 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x30); 322 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x01); 323 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x02); 324 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x03); 325 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6B); 326 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05); 327 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x0C); 328 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73); 329 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x09); 330 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x03); 331 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x56); 332 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x08); 333 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x00); 334 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x04); 335 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x04); 336 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x88); 337 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x00); 338 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x00); 339 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x06); 340 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x7B); 341 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x00); 342 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xF8); 343 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00); 344 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xD5); 345 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2E); 346 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x12); 347 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x03); 348 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x00); 349 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x00); 350 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x03); 351 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x7B); 352 353 jd9365da_switch_page(&dsi_ctx, 0x04); 354 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0E); 355 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xB3); 356 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x60); 357 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x2A); 358 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x59); 359 360 jd9365da_switch_page(&dsi_ctx, 0x00); 361 362 mipi_dsi_msleep(&dsi_ctx, 120); 363 364 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); 365 366 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); 367 368 return dsi_ctx.accum_err; 369 }; 370 371 static const struct jadard_panel_desc radxa_display_8hd_ad002_desc = { 372 .mode = { 373 .clock = 70000, 374 375 .hdisplay = 800, 376 .hsync_start = 800 + 40, 377 .hsync_end = 800 + 40 + 18, 378 .htotal = 800 + 40 + 18 + 20, 379 380 .vdisplay = 1280, 381 .vsync_start = 1280 + 20, 382 .vsync_end = 1280 + 20 + 4, 383 .vtotal = 1280 + 20 + 4 + 20, 384 385 .width_mm = 127, 386 .height_mm = 199, 387 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 388 }, 389 .lanes = 4, 390 .format = MIPI_DSI_FMT_RGB888, 391 .init = radxa_display_8hd_ad002_init_cmds, 392 }; 393 394 static int cz101b4001_init_cmds(struct jadard *jadard) 395 { 396 struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi }; 397 398 jd9365da_switch_page(&dsi_ctx, 0x00); 399 jadard_enable_standard_cmds(&dsi_ctx); 400 401 jd9365da_switch_page(&dsi_ctx, 0x01); 402 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); 403 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x3B); 404 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x74); 405 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); 406 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xAF); 407 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00); 408 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x00); 409 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0xAF); 410 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x00); 411 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x26); 412 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x09); 413 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x04); 414 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00); 415 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x01); 416 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x78); 417 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0xFF); 418 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0xFF); 419 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x7F); 420 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06); 421 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xA0); 422 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x81); 423 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x14); 424 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x23); 425 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x28); 426 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02); 427 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x69); 428 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0A); 429 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0x2A); 430 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x17); 431 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x7F); 432 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x6B); 433 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x5C); 434 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x4F); 435 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x4D); 436 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x3F); 437 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x42); 438 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x2B); 439 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x44); 440 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x43); 441 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x43); 442 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x63); 443 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x52); 444 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x5A); 445 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x4F); 446 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x4E); 447 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x20); 448 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x0F); 449 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x00); 450 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7F); 451 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x6B); 452 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x5C); 453 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x4F); 454 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x4D); 455 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x3F); 456 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x42); 457 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x2B); 458 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x44); 459 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x43); 460 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x43); 461 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7B, 0x63); 462 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x52); 463 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x5A); 464 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x4F); 465 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7F, 0x4E); 466 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x20); 467 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x0F); 468 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x00); 469 470 jd9365da_switch_page(&dsi_ctx, 0x02); 471 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x02); 472 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x02); 473 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x00); 474 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00); 475 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x1E); 476 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x1E); 477 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x1F); 478 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x1F); 479 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x1F); 480 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x17); 481 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0A, 0x17); 482 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0B, 0x37); 483 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x37); 484 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0D, 0x47); 485 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x47); 486 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0F, 0x45); 487 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x45); 488 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x4B); 489 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x4B); 490 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x49); 491 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x49); 492 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x1F); 493 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x01); 494 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x01); 495 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x00); 496 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x00); 497 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x1E); 498 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0x1E); 499 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x1F); 500 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1D, 0x1F); 501 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1E, 0x1F); 502 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1F, 0x17); 503 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x17); 504 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x37); 505 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x37); 506 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x46); 507 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x46); 508 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x44); 509 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x44); 510 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x4A); 511 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x4A); 512 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x48); 513 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0x48); 514 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2B, 0x1F); 515 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2C, 0x01); 516 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2D, 0x01); 517 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2E, 0x00); 518 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2F, 0x00); 519 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x1F); 520 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x1F); 521 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1E); 522 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x1E); 523 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x1F); 524 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x17); 525 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x17); 526 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x37); 527 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x37); 528 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08); 529 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x08); 530 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0x0A); 531 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3C, 0x0A); 532 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0x04); 533 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3E, 0x04); 534 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x06); 535 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06); 536 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1F); 537 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x02); 538 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x02); 539 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x00); 540 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00); 541 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x1F); 542 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x1F); 543 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1E); 544 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x1E); 545 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4A, 0x1F); 546 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0x17); 547 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4C, 0x17); 548 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4D, 0x37); 549 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4E, 0x37); 550 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4F, 0x09); 551 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x09); 552 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x0B); 553 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x0B); 554 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x05); 555 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x05); 556 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x07); 557 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x07); 558 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1F); 559 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40); 560 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x30); 561 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x16); 562 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x34); 563 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x05); 564 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x02); 565 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x00); 566 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6A); 567 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x73); 568 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x1D); 569 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x08); 570 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x6A); 571 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x08); 572 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x00); 573 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x00); 574 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x00); 575 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x88); 576 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xFF); 577 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xDD); 578 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x3F); 579 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x15); 580 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x17); 581 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x14); 582 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x82); 583 584 jd9365da_switch_page(&dsi_ctx, 0x04); 585 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0E); 586 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xB3); 587 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61); 588 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x48); 589 590 jd9365da_switch_page(&dsi_ctx, 0x00); 591 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE6, 0x02); 592 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE7, 0x0C); 593 594 mipi_dsi_msleep(&dsi_ctx, 120); 595 596 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); 597 598 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); 599 600 return dsi_ctx.accum_err; 601 }; 602 603 static const struct jadard_panel_desc cz101b4001_desc = { 604 .mode = { 605 .clock = 70000, 606 607 .hdisplay = 800, 608 .hsync_start = 800 + 40, 609 .hsync_end = 800 + 40 + 18, 610 .htotal = 800 + 40 + 18 + 20, 611 612 .vdisplay = 1280, 613 .vsync_start = 1280 + 20, 614 .vsync_end = 1280 + 20 + 4, 615 .vtotal = 1280 + 20 + 4 + 20, 616 617 .width_mm = 62, 618 .height_mm = 110, 619 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 620 }, 621 .lanes = 4, 622 .format = MIPI_DSI_FMT_RGB888, 623 .init = cz101b4001_init_cmds, 624 }; 625 626 static int kingdisplay_kd101ne3_init_cmds(struct jadard *jadard) 627 { 628 struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi }; 629 630 jd9365da_switch_page(&dsi_ctx, 0x00); 631 jadard_enable_standard_cmds(&dsi_ctx); 632 633 jd9365da_switch_page(&dsi_ctx, 0x01); 634 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74); 635 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); 636 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xc7); 637 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01); 638 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00); 639 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xc7); 640 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01); 641 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfe); 642 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19); 643 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28); 644 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05); 645 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08); 646 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12); 647 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e); 648 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff); 649 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff); 650 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f); 651 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06); 652 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0); 653 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e); 654 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b); 655 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02); 656 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a); 657 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a); 658 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e); 659 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a); 660 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15); 661 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x7f); 662 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x61); 663 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x50); 664 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x43); 665 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x3f); 666 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x32); 667 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x35); 668 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x1f); 669 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x38); 670 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x36); 671 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x36); 672 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x54); 673 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x42); 674 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x48); 675 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x39); 676 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x34); 677 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x26); 678 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x14); 679 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02); 680 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x7f); 681 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x61); 682 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x50); 683 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x43); 684 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x3f); 685 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x32); 686 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x35); 687 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x1f); 688 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x38); 689 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x36); 690 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x36); 691 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x54); 692 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x42); 693 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x48); 694 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x39); 695 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x34); 696 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x26); 697 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x14); 698 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02); 699 700 jd9365da_switch_page(&dsi_ctx, 0x02); 701 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x52); 702 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x5f); 703 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x5f); 704 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x50); 705 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x77); 706 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x57); 707 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x5f); 708 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4e); 709 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4c); 710 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5f); 711 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x4a); 712 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x48); 713 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x5f); 714 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x46); 715 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x44); 716 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x40); 717 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x5f); 718 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x5f); 719 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x5f); 720 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x5f); 721 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x5f); 722 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x5f); 723 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x53); 724 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x5f); 725 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x5f); 726 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x51); 727 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x77); 728 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x57); 729 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x5f); 730 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4f); 731 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4d); 732 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x5f); 733 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x4b); 734 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x49); 735 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x5f); 736 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x47); 737 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x45); 738 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x41); 739 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x5f); 740 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x5f); 741 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x5f); 742 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x5f); 743 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x5f); 744 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x5f); 745 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x13); 746 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x1f); 747 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x1f); 748 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x01); 749 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x17); 750 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x17); 751 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x1f); 752 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0d); 753 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x0f); 754 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x1f); 755 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x05); 756 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x07); 757 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x1f); 758 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x09); 759 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0b); 760 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x11); 761 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x1f); 762 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x1f); 763 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x1f); 764 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x1f); 765 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x1f); 766 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x1f); 767 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x12); 768 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1f); 769 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x1f); 770 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00); 771 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x17); 772 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x17); 773 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x1f); 774 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0c); 775 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x0e); 776 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x1f); 777 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x04); 778 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x06); 779 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x1f); 780 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x08); 781 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x0a); 782 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x10); 783 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x1f); 784 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x1f); 785 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x1f); 786 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x1f); 787 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x1f); 788 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x1f); 789 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40); 790 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10); 791 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06); 792 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40); 793 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x00); 794 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00); 795 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x40); 796 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03); 797 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04); 798 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x6c); 799 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6c); 800 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x75); 801 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x08); 802 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xb4); 803 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x08); 804 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x6c); 805 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6c); 806 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x0c); 807 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00); 808 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00); 809 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88); 810 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xbb); 811 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00); 812 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x05); 813 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2a); 814 815 jd9365da_switch_page(&dsi_ctx, 0x04); 816 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x0e); 817 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0xb3); 818 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x61); 819 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48); 820 821 jd9365da_switch_page(&dsi_ctx, 0x00); 822 823 mipi_dsi_msleep(&dsi_ctx, 120); 824 825 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); 826 827 mipi_dsi_msleep(&dsi_ctx, 120); 828 829 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); 830 831 mipi_dsi_msleep(&dsi_ctx, 20); 832 833 return dsi_ctx.accum_err; 834 }; 835 836 static const struct jadard_panel_desc kingdisplay_kd101ne3_40ti_desc = { 837 .mode = { 838 .clock = (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000, 839 840 .hdisplay = 800, 841 .hsync_start = 800 + 24, 842 .hsync_end = 800 + 24 + 24, 843 .htotal = 800 + 24 + 24 + 24, 844 845 .vdisplay = 1280, 846 .vsync_start = 1280 + 30, 847 .vsync_end = 1280 + 30 + 4, 848 .vtotal = 1280 + 30 + 4 + 8, 849 850 .width_mm = 135, 851 .height_mm = 216, 852 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 853 }, 854 .lanes = 4, 855 .format = MIPI_DSI_FMT_RGB888, 856 .init = kingdisplay_kd101ne3_init_cmds, 857 .lp11_before_reset = true, 858 .reset_before_power_off_vcioo = true, 859 .vcioo_to_lp11_delay_ms = 5, 860 .lp11_to_reset_delay_ms = 10, 861 .backlight_off_to_display_off_delay_ms = 100, 862 .display_off_to_enter_sleep_delay_ms = 50, 863 .enter_sleep_to_reset_down_delay_ms = 100, 864 }; 865 866 static int melfas_lmfbx101117480_init_cmds(struct jadard *jadard) 867 { 868 struct mipi_dsi_multi_context dsi_ctx = { .dsi = jadard->dsi }; 869 870 jd9365da_switch_page(&dsi_ctx, 0x00); 871 jadard_enable_standard_cmds(&dsi_ctx); 872 873 jd9365da_switch_page(&dsi_ctx, 0x01); 874 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74); 875 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); 876 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0xd7); 877 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x01); 878 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x00); 879 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0xd7); 880 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x01); 881 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x70); 882 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x2d); 883 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x2d); 884 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x7e); 885 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0xfd); 886 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x19); 887 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x28); 888 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x05); 889 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x08); 890 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x12); 891 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x7e); 892 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0xff); 893 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0xff); 894 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x7f); 895 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x06); 896 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xa0); 897 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x1e); 898 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x0b); 899 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x74); 900 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x02); 901 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x01); 902 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x6a); 903 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x09); 904 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x0a); 905 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x2e); 906 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x1a); 907 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x15); 908 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x73); 909 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x56); 910 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x43); 911 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x38); 912 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x36); 913 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x28); 914 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x2f); 915 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x19); 916 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x32); 917 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x31); 918 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x31); 919 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x4f); 920 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x3e); 921 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x47); 922 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x36); 923 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x31); 924 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x24); 925 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x12); 926 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x02); 927 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x73); 928 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x56); 929 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x43); 930 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x38); 931 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x36); 932 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x28); 933 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x2f); 934 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x19); 935 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x32); 936 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x31); 937 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7a, 0x31); 938 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7b, 0x4f); 939 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7c, 0x3e); 940 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7d, 0x47); 941 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x36); 942 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x31); 943 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x24); 944 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x12); 945 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x02); 946 947 jd9365da_switch_page(&dsi_ctx, 0x02); 948 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x52); 949 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x55); 950 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x55); 951 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x50); 952 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x77); 953 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x57); 954 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x55); 955 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x4e); 956 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x4c); 957 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x5f); 958 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x4a); 959 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x48); 960 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x55); 961 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x46); 962 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x44); 963 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x40); 964 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x55); 965 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x55); 966 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x55); 967 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x55); 968 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x55); 969 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x55); 970 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x53); 971 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x55); 972 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x55); 973 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x51); 974 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x77); 975 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x57); 976 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x55); 977 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x4f); 978 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x4d); 979 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x5f); 980 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x4b); 981 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x49); 982 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x55); 983 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x47); 984 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x45); 985 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x41); 986 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x55); 987 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x55); 988 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x55); 989 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x55); 990 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x55); 991 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x55); 992 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2c, 0x13); 993 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2d, 0x15); 994 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x15); 995 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x01); 996 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x37); 997 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x17); 998 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x15); 999 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0d); 1000 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x0f); 1001 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x15); 1002 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x05); 1003 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x07); 1004 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x15); 1005 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x09); 1006 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3a, 0x0b); 1007 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x11); 1008 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3c, 0x15); 1009 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3d, 0x15); 1010 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3e, 0x15); 1011 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x15); 1012 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x15); 1013 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x15); 1014 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x12); 1015 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x15); 1016 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x15); 1017 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x00); 1018 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x37); 1019 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x17); 1020 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x15); 1021 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x0c); 1022 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x0e); 1023 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x15); 1024 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x04); 1025 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x06); 1026 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x15); 1027 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4f, 0x08); 1028 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x0a); 1029 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x10); 1030 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x15); 1031 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x15); 1032 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x15); 1033 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x15); 1034 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x15); 1035 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x57, 0x15); 1036 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x40); 1037 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x10); 1038 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x06); 1039 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x40); 1040 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5e, 0x00); 1041 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00); 1042 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x40); 1043 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x03); 1044 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x04); 1045 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x6c); 1046 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x6c); 1047 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x75); 1048 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x08); 1049 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xb4); 1050 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x08); 1051 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x6c); 1052 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x6c); 1053 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6b, 0x0c); 1054 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00); 1055 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6e, 0x00); 1056 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x88); 1057 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xbb); 1058 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x00); 1059 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x05); 1060 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x2a); 1061 1062 jd9365da_switch_page(&dsi_ctx, 0x04); 1063 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x23); 1064 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x11); 1065 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x48); 1066 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x49); 1067 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x08); 1068 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2e, 0x03); 1069 1070 jd9365da_switch_page(&dsi_ctx, 0x00); 1071 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x02); 1072 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe7, 0x06); 1073 1074 mipi_dsi_msleep(&dsi_ctx, 120); 1075 1076 mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); 1077 1078 mipi_dsi_msleep(&dsi_ctx, 120); 1079 1080 mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); 1081 1082 mipi_dsi_msleep(&dsi_ctx, 20); 1083 1084 return dsi_ctx.accum_err; 1085 }; 1086 1087 static const struct jadard_panel_desc melfas_lmfbx101117480_desc = { 1088 .mode = { 1089 .clock = (800 + 24 + 24 + 24) * (1280 + 30 + 4 + 8) * 60 / 1000, 1090 1091 .hdisplay = 800, 1092 .hsync_start = 800 + 24, 1093 .hsync_end = 800 + 24 + 24, 1094 .htotal = 800 + 24 + 24 + 24, 1095 1096 .vdisplay = 1280, 1097 .vsync_start = 1280 + 30, 1098 .vsync_end = 1280 + 30 + 4, 1099 .vtotal = 1280 + 30 + 4 + 8, 1100 1101 .width_mm = 135, 1102 .height_mm = 216, 1103 .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, 1104 }, 1105 .lanes = 4, 1106 .format = MIPI_DSI_FMT_RGB888, 1107 .init = melfas_lmfbx101117480_init_cmds, 1108 .lp11_before_reset = true, 1109 .reset_before_power_off_vcioo = true, 1110 .vcioo_to_lp11_delay_ms = 5, 1111 .lp11_to_reset_delay_ms = 10, 1112 .backlight_off_to_display_off_delay_ms = 100, 1113 .display_off_to_enter_sleep_delay_ms = 50, 1114 .enter_sleep_to_reset_down_delay_ms = 100, 1115 }; 1116 1117 static int jadard_dsi_probe(struct mipi_dsi_device *dsi) 1118 { 1119 struct device *dev = &dsi->dev; 1120 const struct jadard_panel_desc *desc; 1121 struct jadard *jadard; 1122 int ret; 1123 1124 jadard = devm_kzalloc(&dsi->dev, sizeof(*jadard), GFP_KERNEL); 1125 if (!jadard) 1126 return -ENOMEM; 1127 1128 desc = of_device_get_match_data(dev); 1129 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 1130 MIPI_DSI_MODE_NO_EOT_PACKET; 1131 dsi->format = desc->format; 1132 dsi->lanes = desc->lanes; 1133 1134 jadard->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); 1135 if (IS_ERR(jadard->reset)) { 1136 DRM_DEV_ERROR(&dsi->dev, "failed to get our reset GPIO\n"); 1137 return PTR_ERR(jadard->reset); 1138 } 1139 1140 jadard->vdd = devm_regulator_get(dev, "vdd"); 1141 if (IS_ERR(jadard->vdd)) { 1142 DRM_DEV_ERROR(&dsi->dev, "failed to get vdd regulator\n"); 1143 return PTR_ERR(jadard->vdd); 1144 } 1145 1146 jadard->vccio = devm_regulator_get(dev, "vccio"); 1147 if (IS_ERR(jadard->vccio)) { 1148 DRM_DEV_ERROR(&dsi->dev, "failed to get vccio regulator\n"); 1149 return PTR_ERR(jadard->vccio); 1150 } 1151 1152 drm_panel_init(&jadard->panel, dev, &jadard_funcs, 1153 DRM_MODE_CONNECTOR_DSI); 1154 1155 ret = of_drm_get_panel_orientation(dev->of_node, &jadard->orientation); 1156 if (ret < 0) 1157 return dev_err_probe(dev, ret, "failed to get orientation\n"); 1158 1159 ret = drm_panel_of_backlight(&jadard->panel); 1160 if (ret) 1161 return ret; 1162 1163 drm_panel_add(&jadard->panel); 1164 1165 mipi_dsi_set_drvdata(dsi, jadard); 1166 jadard->dsi = dsi; 1167 jadard->desc = desc; 1168 1169 ret = mipi_dsi_attach(dsi); 1170 if (ret < 0) 1171 drm_panel_remove(&jadard->panel); 1172 1173 return ret; 1174 } 1175 1176 static void jadard_dsi_remove(struct mipi_dsi_device *dsi) 1177 { 1178 struct jadard *jadard = mipi_dsi_get_drvdata(dsi); 1179 1180 mipi_dsi_detach(dsi); 1181 drm_panel_remove(&jadard->panel); 1182 } 1183 1184 static const struct of_device_id jadard_of_match[] = { 1185 { 1186 .compatible = "chongzhou,cz101b4001", 1187 .data = &cz101b4001_desc 1188 }, 1189 { 1190 .compatible = "kingdisplay,kd101ne3-40ti", 1191 .data = &kingdisplay_kd101ne3_40ti_desc 1192 }, 1193 { 1194 .compatible = "melfas,lmfbx101117480", 1195 .data = &melfas_lmfbx101117480_desc 1196 }, 1197 { 1198 .compatible = "radxa,display-10hd-ad001", 1199 .data = &cz101b4001_desc 1200 }, 1201 { 1202 .compatible = "radxa,display-8hd-ad002", 1203 .data = &radxa_display_8hd_ad002_desc 1204 }, 1205 { /* sentinel */ } 1206 }; 1207 MODULE_DEVICE_TABLE(of, jadard_of_match); 1208 1209 static struct mipi_dsi_driver jadard_driver = { 1210 .probe = jadard_dsi_probe, 1211 .remove = jadard_dsi_remove, 1212 .driver = { 1213 .name = "jadard-jd9365da", 1214 .of_match_table = jadard_of_match, 1215 }, 1216 }; 1217 module_mipi_dsi_driver(jadard_driver); 1218 1219 MODULE_AUTHOR("Jagan Teki <jagan@edgeble.ai>"); 1220 MODULE_AUTHOR("Stephen Chen <stephen@radxa.com>"); 1221 MODULE_DESCRIPTION("Jadard JD9365DA-H3 WXGA DSI panel"); 1222 MODULE_LICENSE("GPL"); 1223