1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/debugfs.h> 25 #include <linux/delay.h> 26 #include <linux/gpio/consumer.h> 27 #include <linux/iopoll.h> 28 #include <linux/module.h> 29 #include <linux/of_platform.h> 30 #include <linux/platform_device.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/regulator/consumer.h> 33 34 #include <video/display_timing.h> 35 #include <video/of_display_timing.h> 36 #include <video/videomode.h> 37 38 #include <drm/display/drm_dp_aux_bus.h> 39 #include <drm/display/drm_dp_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_device.h> 42 #include <drm/drm_edid.h> 43 #include <drm/drm_of.h> 44 #include <drm/drm_panel.h> 45 46 /** 47 * struct panel_delay - Describes delays for a simple panel. 48 */ 49 struct panel_delay { 50 /** 51 * @hpd_reliable: Time for HPD to be reliable 52 * 53 * The time (in milliseconds) that it takes after powering the panel 54 * before the HPD signal is reliable. Ideally this is 0 but some panels, 55 * board designs, or bad pulldown configs can cause a glitch here. 56 * 57 * NOTE: on some old panel data this number appears to be much too big. 58 * Presumably some old panels simply didn't have HPD hooked up and put 59 * the hpd_absent here because this field predates the 60 * hpd_absent. While that works, it's non-ideal. 61 */ 62 unsigned int hpd_reliable; 63 64 /** 65 * @hpd_absent: Time to wait if HPD isn't hooked up. 66 * 67 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 68 * 69 * This is T3-max on eDP timing diagrams or the delay from power on 70 * until HPD is guaranteed to be asserted. 71 */ 72 unsigned int hpd_absent; 73 74 /** 75 * @powered_on_to_enable: Time between panel powered on and enable. 76 * 77 * The minimum time, in milliseconds, that needs to have passed 78 * between when panel powered on and enable may begin. 79 * 80 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the 81 * power supply enabled until we can turn the backlight on and see 82 * valid data. 83 * 84 * This doesn't normally need to be set if timings are already met by 85 * prepare_to_enable or enable. 86 */ 87 unsigned int powered_on_to_enable; 88 89 /** 90 * @prepare_to_enable: Time between prepare and enable. 91 * 92 * The minimum time, in milliseconds, that needs to have passed 93 * between when prepare finished and enable may begin. If at 94 * enable time less time has passed since prepare finished, 95 * the driver waits for the remaining time. 96 * 97 * If a fixed enable delay is also specified, we'll start 98 * counting before delaying for the fixed delay. 99 * 100 * If a fixed prepare delay is also specified, we won't start 101 * counting until after the fixed delay. We can't overlap this 102 * fixed delay with the min time because the fixed delay 103 * doesn't happen at the end of the function if a HPD GPIO was 104 * specified. 105 * 106 * In other words: 107 * prepare() 108 * ... 109 * // do fixed prepare delay 110 * // wait for HPD GPIO if applicable 111 * // start counting for prepare_to_enable 112 * 113 * enable() 114 * // do fixed enable delay 115 * // enforce prepare_to_enable min time 116 * 117 * This is usually (T4+T5+T6+T8)-min on eDP timing diagrams. 118 * It is effectively the time from HPD going high till you can 119 * turn on the backlight. 120 */ 121 unsigned int prepare_to_enable; 122 123 /** 124 * @enable: Time for the panel to display a valid frame. 125 * 126 * The time (in milliseconds) that it takes for the panel to 127 * display the first valid frame after starting to receive 128 * video data. 129 * 130 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 131 * the delay after link training finishes until we can turn the 132 * backlight on and see valid data. 133 */ 134 unsigned int enable; 135 136 /** 137 * @disable: Time for the panel to turn the display off. 138 * 139 * The time (in milliseconds) that it takes for the panel to 140 * turn the display off (no content is visible). 141 * 142 * This is T9-min (delay from backlight off to end of valid video 143 * data) on eDP timing diagrams. It is not common to set. 144 */ 145 unsigned int disable; 146 147 /** 148 * @unprepare: Time to power down completely. 149 * 150 * The time (in milliseconds) that it takes for the panel 151 * to power itself down completely. 152 * 153 * This time is used to prevent a future "prepare" from 154 * starting until at least this many milliseconds has passed. 155 * If at prepare time less time has passed since unprepare 156 * finished, the driver waits for the remaining time. 157 * 158 * This is T12-min on eDP timing diagrams. 159 */ 160 unsigned int unprepare; 161 }; 162 163 /** 164 * struct panel_desc - Describes a simple panel. 165 */ 166 struct panel_desc { 167 /** 168 * @modes: Pointer to array of fixed modes appropriate for this panel. 169 * 170 * If only one mode then this can just be the address of the mode. 171 * NOTE: cannot be used with "timings" and also if this is specified 172 * then you cannot override the mode in the device tree. 173 */ 174 const struct drm_display_mode *modes; 175 176 /** @num_modes: Number of elements in modes array. */ 177 unsigned int num_modes; 178 179 /** 180 * @timings: Pointer to array of display timings 181 * 182 * NOTE: cannot be used with "modes" and also these will be used to 183 * validate a device tree override if one is present. 184 */ 185 const struct display_timing *timings; 186 187 /** @num_timings: Number of elements in timings array. */ 188 unsigned int num_timings; 189 190 /** @bpc: Bits per color. */ 191 unsigned int bpc; 192 193 /** @size: Structure containing the physical size of this panel. */ 194 struct { 195 /** 196 * @size.width: Width (in mm) of the active display area. 197 */ 198 unsigned int width; 199 200 /** 201 * @size.height: Height (in mm) of the active display area. 202 */ 203 unsigned int height; 204 } size; 205 206 /** @delay: Structure containing various delay values for this panel. */ 207 struct panel_delay delay; 208 }; 209 210 /** 211 * struct edp_panel_entry - Maps panel ID to delay / panel name. 212 */ 213 struct edp_panel_entry { 214 /** @ident: edid identity used for panel matching. */ 215 const struct drm_edid_ident ident; 216 217 /** @delay: The power sequencing delays needed for this panel. */ 218 const struct panel_delay *delay; 219 220 /** @override_edid_mode: Override the mode obtained by edid. */ 221 const struct drm_display_mode *override_edid_mode; 222 }; 223 224 struct panel_edp { 225 struct drm_panel base; 226 bool no_hpd; 227 228 ktime_t prepared_time; 229 ktime_t powered_on_time; 230 ktime_t unprepared_time; 231 232 const struct panel_desc *desc; 233 234 struct regulator *supply; 235 struct i2c_adapter *ddc; 236 struct drm_dp_aux *aux; 237 238 struct gpio_desc *enable_gpio; 239 struct gpio_desc *hpd_gpio; 240 241 const struct edp_panel_entry *detected_panel; 242 243 const struct drm_edid *drm_edid; 244 245 struct drm_display_mode override_mode; 246 247 enum drm_panel_orientation orientation; 248 }; 249 250 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 251 { 252 return container_of(panel, struct panel_edp, base); 253 } 254 255 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 256 struct drm_connector *connector) 257 { 258 struct drm_display_mode *mode; 259 unsigned int i, num = 0; 260 261 for (i = 0; i < panel->desc->num_timings; i++) { 262 const struct display_timing *dt = &panel->desc->timings[i]; 263 struct videomode vm; 264 265 videomode_from_timing(dt, &vm); 266 mode = drm_mode_create(connector->dev); 267 if (!mode) { 268 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 269 dt->hactive.typ, dt->vactive.typ); 270 continue; 271 } 272 273 drm_display_mode_from_videomode(&vm, mode); 274 275 mode->type |= DRM_MODE_TYPE_DRIVER; 276 277 if (panel->desc->num_timings == 1) 278 mode->type |= DRM_MODE_TYPE_PREFERRED; 279 280 drm_mode_probed_add(connector, mode); 281 num++; 282 } 283 284 return num; 285 } 286 287 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 288 struct drm_connector *connector) 289 { 290 struct drm_display_mode *mode; 291 unsigned int i, num = 0; 292 293 for (i = 0; i < panel->desc->num_modes; i++) { 294 const struct drm_display_mode *m = &panel->desc->modes[i]; 295 296 mode = drm_mode_duplicate(connector->dev, m); 297 if (!mode) { 298 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 299 m->hdisplay, m->vdisplay, 300 drm_mode_vrefresh(m)); 301 continue; 302 } 303 304 mode->type |= DRM_MODE_TYPE_DRIVER; 305 306 if (panel->desc->num_modes == 1) 307 mode->type |= DRM_MODE_TYPE_PREFERRED; 308 309 drm_mode_set_name(mode); 310 311 drm_mode_probed_add(connector, mode); 312 num++; 313 } 314 315 return num; 316 } 317 318 static int panel_edp_override_edid_mode(struct panel_edp *panel, 319 struct drm_connector *connector, 320 const struct drm_display_mode *override_mode) 321 { 322 struct drm_display_mode *mode; 323 324 mode = drm_mode_duplicate(connector->dev, override_mode); 325 if (!mode) { 326 dev_err(panel->base.dev, "failed to add additional mode\n"); 327 return 0; 328 } 329 330 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 331 drm_mode_set_name(mode); 332 drm_mode_probed_add(connector, mode); 333 return 1; 334 } 335 336 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 337 struct drm_connector *connector) 338 { 339 struct drm_display_mode *mode; 340 bool has_override = panel->override_mode.type; 341 unsigned int num = 0; 342 343 if (!panel->desc) 344 return 0; 345 346 if (has_override) { 347 mode = drm_mode_duplicate(connector->dev, 348 &panel->override_mode); 349 if (mode) { 350 drm_mode_probed_add(connector, mode); 351 num = 1; 352 } else { 353 dev_err(panel->base.dev, "failed to add override mode\n"); 354 } 355 } 356 357 /* Only add timings if override was not there or failed to validate */ 358 if (num == 0 && panel->desc->num_timings) 359 num = panel_edp_get_timings_modes(panel, connector); 360 361 /* 362 * Only add fixed modes if timings/override added no mode. 363 * 364 * We should only ever have either the display timings specified 365 * or a fixed mode. Anything else is rather bogus. 366 */ 367 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 368 if (num == 0) 369 num = panel_edp_get_display_modes(panel, connector); 370 371 connector->display_info.bpc = panel->desc->bpc; 372 connector->display_info.width_mm = panel->desc->size.width; 373 connector->display_info.height_mm = panel->desc->size.height; 374 375 return num; 376 } 377 378 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 379 { 380 ktime_t now_ktime, min_ktime; 381 382 if (!min_ms) 383 return; 384 385 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 386 now_ktime = ktime_get_boottime(); 387 388 if (ktime_before(now_ktime, min_ktime)) 389 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 390 } 391 392 static int panel_edp_disable(struct drm_panel *panel) 393 { 394 struct panel_edp *p = to_panel_edp(panel); 395 396 if (p->desc->delay.disable) 397 msleep(p->desc->delay.disable); 398 399 return 0; 400 } 401 402 static int panel_edp_suspend(struct device *dev) 403 { 404 struct panel_edp *p = dev_get_drvdata(dev); 405 406 drm_dp_dpcd_set_powered(p->aux, false); 407 gpiod_set_value_cansleep(p->enable_gpio, 0); 408 regulator_disable(p->supply); 409 p->unprepared_time = ktime_get_boottime(); 410 411 return 0; 412 } 413 414 static int panel_edp_unprepare(struct drm_panel *panel) 415 { 416 int ret; 417 418 ret = pm_runtime_put_sync_suspend(panel->dev); 419 if (ret < 0) 420 return ret; 421 422 return 0; 423 } 424 425 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 426 { 427 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 428 if (IS_ERR(p->hpd_gpio)) 429 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 430 "failed to get 'hpd' GPIO\n"); 431 432 return 0; 433 } 434 435 static bool panel_edp_can_read_hpd(struct panel_edp *p) 436 { 437 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 438 } 439 440 static int panel_edp_prepare_once(struct panel_edp *p) 441 { 442 struct device *dev = p->base.dev; 443 unsigned int delay; 444 int err; 445 int hpd_asserted; 446 unsigned long hpd_wait_us; 447 448 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 449 450 err = regulator_enable(p->supply); 451 if (err < 0) { 452 dev_err(dev, "failed to enable supply: %d\n", err); 453 return err; 454 } 455 456 gpiod_set_value_cansleep(p->enable_gpio, 1); 457 drm_dp_dpcd_set_powered(p->aux, true); 458 459 p->powered_on_time = ktime_get_boottime(); 460 461 delay = p->desc->delay.hpd_reliable; 462 if (p->no_hpd) 463 delay = max(delay, p->desc->delay.hpd_absent); 464 if (delay) 465 msleep(delay); 466 467 if (panel_edp_can_read_hpd(p)) { 468 if (p->desc->delay.hpd_absent) 469 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 470 else 471 hpd_wait_us = 2000000; 472 473 if (p->hpd_gpio) { 474 err = readx_poll_timeout(gpiod_get_value_cansleep, 475 p->hpd_gpio, hpd_asserted, 476 hpd_asserted, 1000, hpd_wait_us); 477 if (hpd_asserted < 0) 478 err = hpd_asserted; 479 } else { 480 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 481 } 482 483 if (err) { 484 if (err != -ETIMEDOUT) 485 dev_err(dev, 486 "error waiting for hpd GPIO: %d\n", err); 487 goto error; 488 } 489 } 490 491 p->prepared_time = ktime_get_boottime(); 492 493 return 0; 494 495 error: 496 drm_dp_dpcd_set_powered(p->aux, false); 497 gpiod_set_value_cansleep(p->enable_gpio, 0); 498 regulator_disable(p->supply); 499 p->unprepared_time = ktime_get_boottime(); 500 501 return err; 502 } 503 504 /* 505 * Some panels simply don't always come up and need to be power cycled to 506 * work properly. We'll allow for a handful of retries. 507 */ 508 #define MAX_PANEL_PREPARE_TRIES 5 509 510 static int panel_edp_resume(struct device *dev) 511 { 512 struct panel_edp *p = dev_get_drvdata(dev); 513 int ret; 514 int try; 515 516 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 517 ret = panel_edp_prepare_once(p); 518 if (ret != -ETIMEDOUT) 519 break; 520 } 521 522 if (ret == -ETIMEDOUT) 523 dev_err(dev, "Prepare timeout after %d tries\n", try); 524 else if (try) 525 dev_warn(dev, "Prepare needed %d retries\n", try); 526 527 return ret; 528 } 529 530 static int panel_edp_prepare(struct drm_panel *panel) 531 { 532 int ret; 533 534 ret = pm_runtime_get_sync(panel->dev); 535 if (ret < 0) { 536 pm_runtime_put_autosuspend(panel->dev); 537 return ret; 538 } 539 540 return 0; 541 } 542 543 static int panel_edp_enable(struct drm_panel *panel) 544 { 545 struct panel_edp *p = to_panel_edp(panel); 546 unsigned int delay; 547 548 delay = p->desc->delay.enable; 549 550 /* 551 * If there is a "prepare_to_enable" delay then that's supposed to be 552 * the delay from HPD going high until we can turn the backlight on. 553 * However, we can only count this if HPD is readable by the panel 554 * driver. 555 * 556 * If we aren't handling the HPD pin ourselves then the best we 557 * can do is assume that HPD went high immediately before we were 558 * called (and link training took zero time). Note that "no-hpd" 559 * actually counts as handling HPD ourselves since we're doing the 560 * worst case delay (in prepare) ourselves. 561 * 562 * NOTE: if we ever end up in this "if" statement then we're 563 * guaranteed that the panel_edp_wait() call below will do no delay. 564 * It already handles that case, though, so we don't need any special 565 * code for it. 566 */ 567 if (p->desc->delay.prepare_to_enable && 568 !panel_edp_can_read_hpd(p) && !p->no_hpd) 569 delay = max(delay, p->desc->delay.prepare_to_enable); 570 571 if (delay) 572 msleep(delay); 573 574 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 575 576 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); 577 578 return 0; 579 } 580 581 static int panel_edp_get_modes(struct drm_panel *panel, 582 struct drm_connector *connector) 583 { 584 struct panel_edp *p = to_panel_edp(panel); 585 int num = 0; 586 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; 587 bool has_override_edid_mode = p->detected_panel && 588 p->detected_panel != ERR_PTR(-EINVAL) && 589 p->detected_panel->override_edid_mode; 590 591 /* probe EDID if a DDC bus is available */ 592 if (p->ddc) { 593 pm_runtime_get_sync(panel->dev); 594 595 if (!p->drm_edid) 596 p->drm_edid = drm_edid_read_ddc(connector, p->ddc); 597 598 drm_edid_connector_update(connector, p->drm_edid); 599 600 /* 601 * If both edid and hard-coded modes exists, skip edid modes to 602 * avoid multiple preferred modes. 603 */ 604 if (p->drm_edid && !has_hard_coded_modes) { 605 if (has_override_edid_mode) { 606 /* 607 * override_edid_mode is specified. Use 608 * override_edid_mode instead of from edid. 609 */ 610 num += panel_edp_override_edid_mode(p, connector, 611 p->detected_panel->override_edid_mode); 612 } else { 613 num += drm_edid_connector_add_modes(connector); 614 } 615 } 616 617 pm_runtime_mark_last_busy(panel->dev); 618 pm_runtime_put_autosuspend(panel->dev); 619 } 620 621 if (has_hard_coded_modes) 622 num += panel_edp_get_non_edid_modes(p, connector); 623 else if (!num) 624 dev_warn(p->base.dev, "No display modes\n"); 625 626 /* 627 * TODO: Remove once all drm drivers call 628 * drm_connector_set_orientation_from_panel() 629 */ 630 drm_connector_set_panel_orientation(connector, p->orientation); 631 632 return num; 633 } 634 635 static int panel_edp_get_timings(struct drm_panel *panel, 636 unsigned int num_timings, 637 struct display_timing *timings) 638 { 639 struct panel_edp *p = to_panel_edp(panel); 640 unsigned int i; 641 642 if (p->desc->num_timings < num_timings) 643 num_timings = p->desc->num_timings; 644 645 if (timings) 646 for (i = 0; i < num_timings; i++) 647 timings[i] = p->desc->timings[i]; 648 649 return p->desc->num_timings; 650 } 651 652 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 653 { 654 struct panel_edp *p = to_panel_edp(panel); 655 656 return p->orientation; 657 } 658 659 static int detected_panel_show(struct seq_file *s, void *data) 660 { 661 struct drm_panel *panel = s->private; 662 struct panel_edp *p = to_panel_edp(panel); 663 664 if (IS_ERR(p->detected_panel)) 665 seq_puts(s, "UNKNOWN\n"); 666 else if (!p->detected_panel) 667 seq_puts(s, "HARDCODED\n"); 668 else 669 seq_printf(s, "%s\n", p->detected_panel->ident.name); 670 671 return 0; 672 } 673 674 DEFINE_SHOW_ATTRIBUTE(detected_panel); 675 676 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 677 { 678 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 679 } 680 681 static const struct drm_panel_funcs panel_edp_funcs = { 682 .disable = panel_edp_disable, 683 .unprepare = panel_edp_unprepare, 684 .prepare = panel_edp_prepare, 685 .enable = panel_edp_enable, 686 .get_modes = panel_edp_get_modes, 687 .get_orientation = panel_edp_get_orientation, 688 .get_timings = panel_edp_get_timings, 689 .debugfs_init = panel_edp_debugfs_init, 690 }; 691 692 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 693 (to_check->field.typ >= bounds->field.min && \ 694 to_check->field.typ <= bounds->field.max) 695 static void panel_edp_parse_panel_timing_node(struct device *dev, 696 struct panel_edp *panel, 697 const struct display_timing *ot) 698 { 699 const struct panel_desc *desc = panel->desc; 700 struct videomode vm; 701 unsigned int i; 702 703 if (WARN_ON(desc->num_modes)) { 704 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 705 return; 706 } 707 if (WARN_ON(!desc->num_timings)) { 708 dev_err(dev, "Reject override mode: no timings specified\n"); 709 return; 710 } 711 712 for (i = 0; i < panel->desc->num_timings; i++) { 713 const struct display_timing *dt = &panel->desc->timings[i]; 714 715 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 716 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 717 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 718 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 719 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 720 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 721 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 722 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 723 continue; 724 725 if (ot->flags != dt->flags) 726 continue; 727 728 videomode_from_timing(ot, &vm); 729 drm_display_mode_from_videomode(&vm, &panel->override_mode); 730 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 731 DRM_MODE_TYPE_PREFERRED; 732 break; 733 } 734 735 if (WARN_ON(!panel->override_mode.type)) 736 dev_err(dev, "Reject override mode: No display_timing found\n"); 737 } 738 739 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid); 740 741 static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc) 742 { 743 /* 744 * It's highly likely that the panel will work if we use very 745 * conservative timings, so let's do that. 746 * 747 * Nearly all panels have a "unprepare" delay of 500 ms though 748 * there are a few with 1000. Let's stick 2000 in just to be 749 * super conservative. 750 * 751 * An "enable" delay of 80 ms seems the most common, but we'll 752 * throw in 200 ms to be safe. 753 */ 754 desc->delay.unprepare = 2000; 755 desc->delay.enable = 200; 756 757 panel->detected_panel = ERR_PTR(-EINVAL); 758 } 759 760 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 761 { 762 struct panel_desc *desc; 763 const struct drm_edid *base_block; 764 u32 panel_id; 765 char vend[4]; 766 u16 product_id; 767 u32 reliable_ms = 0; 768 u32 absent_ms = 0; 769 int ret; 770 771 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 772 if (!desc) 773 return -ENOMEM; 774 panel->desc = desc; 775 776 /* 777 * Read the dts properties for the initial probe. These are used by 778 * the runtime resume code which will get called by the 779 * pm_runtime_get_sync() call below. 780 */ 781 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 782 desc->delay.hpd_reliable = reliable_ms; 783 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 784 desc->delay.hpd_absent = absent_ms; 785 786 /* Power the panel on so we can read the EDID */ 787 ret = pm_runtime_get_sync(dev); 788 if (ret < 0) { 789 dev_err(dev, 790 "Couldn't power on panel to ID it; using conservative timings: %d\n", 791 ret); 792 panel_edp_set_conservative_timings(panel, desc); 793 goto exit; 794 } 795 796 base_block = drm_edid_read_base_block(panel->ddc); 797 if (base_block) { 798 panel_id = drm_edid_get_panel_id(base_block); 799 } else { 800 dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n"); 801 panel_edp_set_conservative_timings(panel, desc); 802 goto exit; 803 } 804 drm_edid_decode_panel_id(panel_id, vend, &product_id); 805 806 panel->detected_panel = find_edp_panel(panel_id, base_block); 807 808 drm_edid_free(base_block); 809 810 /* 811 * We're using non-optimized timings and want it really obvious that 812 * someone needs to add an entry to the table, so we'll do a WARN_ON 813 * splat. 814 */ 815 if (WARN_ON(!panel->detected_panel)) { 816 dev_warn(dev, 817 "Unknown panel %s %#06x, using conservative timings\n", 818 vend, product_id); 819 panel_edp_set_conservative_timings(panel, desc); 820 } else { 821 dev_info(dev, "Detected %s %s (%#06x)\n", 822 vend, panel->detected_panel->ident.name, product_id); 823 824 /* Update the delay; everything else comes from EDID */ 825 desc->delay = *panel->detected_panel->delay; 826 } 827 828 exit: 829 pm_runtime_mark_last_busy(dev); 830 pm_runtime_put_autosuspend(dev); 831 832 return 0; 833 } 834 835 static void panel_edp_put_adapter(void *_adap) 836 { 837 struct i2c_adapter *adap = _adap; 838 839 i2c_put_adapter(adap); 840 } 841 842 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 843 struct drm_dp_aux *aux) 844 { 845 struct panel_edp *panel; 846 struct display_timing dt; 847 struct device_node *ddc; 848 int err; 849 850 panel = devm_drm_panel_alloc(dev, struct panel_edp, base, 851 &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 852 if (IS_ERR(panel)) 853 return PTR_ERR(panel); 854 855 panel->prepared_time = 0; 856 panel->desc = desc; 857 panel->aux = aux; 858 859 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 860 if (!panel->no_hpd) { 861 err = panel_edp_get_hpd_gpio(dev, panel); 862 if (err) 863 return err; 864 } 865 866 panel->supply = devm_regulator_get(dev, "power"); 867 if (IS_ERR(panel->supply)) 868 return PTR_ERR(panel->supply); 869 870 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 871 GPIOD_OUT_LOW); 872 if (IS_ERR(panel->enable_gpio)) 873 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 874 "failed to request GPIO\n"); 875 876 err = drm_of_get_panel_orientation(dev->of_node, &panel->orientation); 877 if (err) { 878 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 879 return err; 880 } 881 882 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 883 if (ddc) { 884 panel->ddc = of_get_i2c_adapter_by_node(ddc); 885 of_node_put(ddc); 886 887 if (!panel->ddc) 888 return -EPROBE_DEFER; 889 890 err = devm_add_action_or_reset(dev, panel_edp_put_adapter, 891 panel->ddc); 892 if (err) 893 return err; 894 } else if (aux) { 895 panel->ddc = &aux->ddc; 896 } 897 898 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 899 panel_edp_parse_panel_timing_node(dev, panel, &dt); 900 901 dev_set_drvdata(dev, panel); 902 903 err = drm_panel_of_backlight(&panel->base); 904 if (err) 905 return err; 906 907 /* 908 * We use runtime PM for prepare / unprepare since those power the panel 909 * on and off and those can be very slow operations. This is important 910 * to optimize powering the panel on briefly to read the EDID before 911 * fully enabling the panel. 912 */ 913 pm_runtime_enable(dev); 914 pm_runtime_set_autosuspend_delay(dev, 1000); 915 pm_runtime_use_autosuspend(dev); 916 917 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 918 err = generic_edp_panel_probe(dev, panel); 919 if (err) { 920 dev_err_probe(dev, err, 921 "Couldn't detect panel nor find a fallback\n"); 922 goto err_finished_pm_runtime; 923 } 924 /* generic_edp_panel_probe() replaces desc in the panel */ 925 desc = panel->desc; 926 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 927 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 928 } 929 930 if (!panel->base.backlight && panel->aux) { 931 pm_runtime_get_sync(dev); 932 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 933 pm_runtime_mark_last_busy(dev); 934 pm_runtime_put_autosuspend(dev); 935 936 /* 937 * Warn if we get an error, but don't consider it fatal. Having 938 * a panel where we can't control the backlight is better than 939 * no panel. 940 */ 941 if (err) 942 dev_warn(dev, "failed to register dp aux backlight: %d\n", err); 943 } 944 945 drm_panel_add(&panel->base); 946 947 return 0; 948 949 err_finished_pm_runtime: 950 pm_runtime_dont_use_autosuspend(dev); 951 pm_runtime_disable(dev); 952 953 return err; 954 } 955 956 static void panel_edp_shutdown(struct device *dev) 957 { 958 struct panel_edp *panel = dev_get_drvdata(dev); 959 960 /* 961 * NOTE: the following two calls don't really belong here. It is the 962 * responsibility of a correctly written DRM modeset driver to call 963 * drm_atomic_helper_shutdown() at shutdown time and that should 964 * cause the panel to be disabled / unprepared if needed. For now, 965 * however, we'll keep these calls due to the sheer number of 966 * different DRM modeset drivers used with panel-edp. Once we've 967 * confirmed that all DRM modeset drivers using this panel properly 968 * call drm_atomic_helper_shutdown() we can simply delete the two 969 * calls below. 970 * 971 * TO BE EXPLICIT: THE CALLS BELOW SHOULDN'T BE COPIED TO ANY NEW 972 * PANEL DRIVERS. 973 * 974 * FIXME: If we're still haven't figured out if all DRM modeset 975 * drivers properly call drm_atomic_helper_shutdown() but we _have_ 976 * managed to make sure that DRM modeset drivers get their shutdown() 977 * callback before the panel's shutdown() callback (perhaps using 978 * device link), we could add a WARN_ON here to help move forward. 979 */ 980 if (panel->base.enabled) 981 drm_panel_disable(&panel->base); 982 if (panel->base.prepared) 983 drm_panel_unprepare(&panel->base); 984 } 985 986 static void panel_edp_remove(struct device *dev) 987 { 988 struct panel_edp *panel = dev_get_drvdata(dev); 989 990 drm_panel_remove(&panel->base); 991 panel_edp_shutdown(dev); 992 993 pm_runtime_dont_use_autosuspend(dev); 994 pm_runtime_disable(dev); 995 996 drm_edid_free(panel->drm_edid); 997 panel->drm_edid = NULL; 998 } 999 1000 static const struct display_timing auo_b101ean01_timing = { 1001 .pixelclock = { 65300000, 72500000, 75000000 }, 1002 .hactive = { 1280, 1280, 1280 }, 1003 .hfront_porch = { 18, 119, 119 }, 1004 .hback_porch = { 21, 21, 21 }, 1005 .hsync_len = { 32, 32, 32 }, 1006 .vactive = { 800, 800, 800 }, 1007 .vfront_porch = { 4, 4, 4 }, 1008 .vback_porch = { 8, 8, 8 }, 1009 .vsync_len = { 18, 20, 20 }, 1010 }; 1011 1012 static const struct panel_desc auo_b101ean01 = { 1013 .timings = &auo_b101ean01_timing, 1014 .num_timings = 1, 1015 .bpc = 6, 1016 .size = { 1017 .width = 217, 1018 .height = 136, 1019 }, 1020 }; 1021 1022 static const struct drm_display_mode auo_b116xa3_mode = { 1023 .clock = 70589, 1024 .hdisplay = 1366, 1025 .hsync_start = 1366 + 40, 1026 .hsync_end = 1366 + 40 + 40, 1027 .htotal = 1366 + 40 + 40 + 32, 1028 .vdisplay = 768, 1029 .vsync_start = 768 + 10, 1030 .vsync_end = 768 + 10 + 12, 1031 .vtotal = 768 + 10 + 12 + 6, 1032 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1033 }; 1034 1035 static const struct drm_display_mode auo_b116xak01_mode = { 1036 .clock = 69300, 1037 .hdisplay = 1366, 1038 .hsync_start = 1366 + 48, 1039 .hsync_end = 1366 + 48 + 32, 1040 .htotal = 1366 + 48 + 32 + 10, 1041 .vdisplay = 768, 1042 .vsync_start = 768 + 4, 1043 .vsync_end = 768 + 4 + 6, 1044 .vtotal = 768 + 4 + 6 + 15, 1045 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1046 }; 1047 1048 static const struct panel_desc auo_b116xak01 = { 1049 .modes = &auo_b116xak01_mode, 1050 .num_modes = 1, 1051 .bpc = 6, 1052 .size = { 1053 .width = 256, 1054 .height = 144, 1055 }, 1056 .delay = { 1057 .hpd_absent = 200, 1058 .unprepare = 500, 1059 .enable = 50, 1060 }, 1061 }; 1062 1063 static const struct drm_display_mode auo_b133htn01_mode = { 1064 .clock = 150660, 1065 .hdisplay = 1920, 1066 .hsync_start = 1920 + 172, 1067 .hsync_end = 1920 + 172 + 80, 1068 .htotal = 1920 + 172 + 80 + 60, 1069 .vdisplay = 1080, 1070 .vsync_start = 1080 + 25, 1071 .vsync_end = 1080 + 25 + 10, 1072 .vtotal = 1080 + 25 + 10 + 10, 1073 }; 1074 1075 static const struct panel_desc auo_b133htn01 = { 1076 .modes = &auo_b133htn01_mode, 1077 .num_modes = 1, 1078 .bpc = 6, 1079 .size = { 1080 .width = 293, 1081 .height = 165, 1082 }, 1083 .delay = { 1084 .hpd_reliable = 105, 1085 .enable = 20, 1086 .unprepare = 50, 1087 }, 1088 }; 1089 1090 static const struct drm_display_mode auo_b133xtn01_mode = { 1091 .clock = 69500, 1092 .hdisplay = 1366, 1093 .hsync_start = 1366 + 48, 1094 .hsync_end = 1366 + 48 + 32, 1095 .htotal = 1366 + 48 + 32 + 20, 1096 .vdisplay = 768, 1097 .vsync_start = 768 + 3, 1098 .vsync_end = 768 + 3 + 6, 1099 .vtotal = 768 + 3 + 6 + 13, 1100 }; 1101 1102 static const struct panel_desc auo_b133xtn01 = { 1103 .modes = &auo_b133xtn01_mode, 1104 .num_modes = 1, 1105 .bpc = 6, 1106 .size = { 1107 .width = 293, 1108 .height = 165, 1109 }, 1110 }; 1111 1112 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1113 { 1114 .clock = 71900, 1115 .hdisplay = 1280, 1116 .hsync_start = 1280 + 48, 1117 .hsync_end = 1280 + 48 + 32, 1118 .htotal = 1280 + 48 + 32 + 80, 1119 .vdisplay = 800, 1120 .vsync_start = 800 + 3, 1121 .vsync_end = 800 + 3 + 5, 1122 .vtotal = 800 + 3 + 5 + 24, 1123 }, 1124 { 1125 .clock = 57500, 1126 .hdisplay = 1280, 1127 .hsync_start = 1280 + 48, 1128 .hsync_end = 1280 + 48 + 32, 1129 .htotal = 1280 + 48 + 32 + 80, 1130 .vdisplay = 800, 1131 .vsync_start = 800 + 3, 1132 .vsync_end = 800 + 3 + 5, 1133 .vtotal = 800 + 3 + 5 + 24, 1134 }, 1135 }; 1136 1137 static const struct panel_desc boe_nv101wxmn51 = { 1138 .modes = boe_nv101wxmn51_modes, 1139 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1140 .bpc = 8, 1141 .size = { 1142 .width = 217, 1143 .height = 136, 1144 }, 1145 .delay = { 1146 /* TODO: should be hpd-absent and no-hpd should be set? */ 1147 .hpd_reliable = 210, 1148 .enable = 50, 1149 .unprepare = 160, 1150 }, 1151 }; 1152 1153 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1154 { 1155 .clock = 207800, 1156 .hdisplay = 2160, 1157 .hsync_start = 2160 + 48, 1158 .hsync_end = 2160 + 48 + 32, 1159 .htotal = 2160 + 48 + 32 + 100, 1160 .vdisplay = 1440, 1161 .vsync_start = 1440 + 3, 1162 .vsync_end = 1440 + 3 + 6, 1163 .vtotal = 1440 + 3 + 6 + 31, 1164 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1165 }, 1166 { 1167 .clock = 138500, 1168 .hdisplay = 2160, 1169 .hsync_start = 2160 + 48, 1170 .hsync_end = 2160 + 48 + 32, 1171 .htotal = 2160 + 48 + 32 + 100, 1172 .vdisplay = 1440, 1173 .vsync_start = 1440 + 3, 1174 .vsync_end = 1440 + 3 + 6, 1175 .vtotal = 1440 + 3 + 6 + 31, 1176 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1177 }, 1178 }; 1179 1180 static const struct panel_desc boe_nv110wtm_n61 = { 1181 .modes = boe_nv110wtm_n61_modes, 1182 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1183 .bpc = 8, 1184 .size = { 1185 .width = 233, 1186 .height = 155, 1187 }, 1188 .delay = { 1189 .hpd_absent = 200, 1190 .prepare_to_enable = 80, 1191 .enable = 50, 1192 .unprepare = 500, 1193 }, 1194 }; 1195 1196 /* Also used for boe_nv133fhm_n62 */ 1197 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1198 .clock = 147840, 1199 .hdisplay = 1920, 1200 .hsync_start = 1920 + 48, 1201 .hsync_end = 1920 + 48 + 32, 1202 .htotal = 1920 + 48 + 32 + 200, 1203 .vdisplay = 1080, 1204 .vsync_start = 1080 + 3, 1205 .vsync_end = 1080 + 3 + 6, 1206 .vtotal = 1080 + 3 + 6 + 31, 1207 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1208 }; 1209 1210 /* Also used for boe_nv133fhm_n62 */ 1211 static const struct panel_desc boe_nv133fhm_n61 = { 1212 .modes = &boe_nv133fhm_n61_modes, 1213 .num_modes = 1, 1214 .bpc = 6, 1215 .size = { 1216 .width = 294, 1217 .height = 165, 1218 }, 1219 .delay = { 1220 /* 1221 * When power is first given to the panel there's a short 1222 * spike on the HPD line. It was explained that this spike 1223 * was until the TCON data download was complete. On 1224 * one system this was measured at 8 ms. We'll put 15 ms 1225 * in the prepare delay just to be safe. That means: 1226 * - If HPD isn't hooked up you still have 200 ms delay. 1227 * - If HPD is hooked up we won't try to look at it for the 1228 * first 15 ms. 1229 */ 1230 .hpd_reliable = 15, 1231 .hpd_absent = 200, 1232 1233 .unprepare = 500, 1234 }, 1235 }; 1236 1237 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1238 { 1239 .clock = 148500, 1240 .hdisplay = 1920, 1241 .hsync_start = 1920 + 48, 1242 .hsync_end = 1920 + 48 + 32, 1243 .htotal = 2200, 1244 .vdisplay = 1080, 1245 .vsync_start = 1080 + 3, 1246 .vsync_end = 1080 + 3 + 5, 1247 .vtotal = 1125, 1248 }, 1249 }; 1250 1251 static const struct panel_desc boe_nv140fhmn49 = { 1252 .modes = boe_nv140fhmn49_modes, 1253 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1254 .bpc = 6, 1255 .size = { 1256 .width = 309, 1257 .height = 174, 1258 }, 1259 .delay = { 1260 /* TODO: should be hpd-absent and no-hpd should be set? */ 1261 .hpd_reliable = 210, 1262 .enable = 50, 1263 .unprepare = 160, 1264 }, 1265 }; 1266 1267 static const struct drm_display_mode friendlyarm_hd702e_mode = { 1268 .clock = 67185, 1269 .hdisplay = 800, 1270 .hsync_start = 800 + 20, 1271 .hsync_end = 800 + 20 + 24, 1272 .htotal = 800 + 20 + 24 + 20, 1273 .vdisplay = 1280, 1274 .vsync_start = 1280 + 4, 1275 .vsync_end = 1280 + 4 + 8, 1276 .vtotal = 1280 + 4 + 8 + 4, 1277 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1278 }; 1279 1280 static const struct panel_desc friendlyarm_hd702e = { 1281 .modes = &friendlyarm_hd702e_mode, 1282 .num_modes = 1, 1283 .bpc = 8, 1284 .size = { 1285 .width = 94, 1286 .height = 151, 1287 }, 1288 }; 1289 1290 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1291 .clock = 76420, 1292 .hdisplay = 1366, 1293 .hsync_start = 1366 + 136, 1294 .hsync_end = 1366 + 136 + 30, 1295 .htotal = 1366 + 136 + 30 + 60, 1296 .vdisplay = 768, 1297 .vsync_start = 768 + 8, 1298 .vsync_end = 768 + 8 + 12, 1299 .vtotal = 768 + 8 + 12 + 12, 1300 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1301 }; 1302 1303 static const struct panel_desc innolux_n116bca_ea1 = { 1304 .modes = &innolux_n116bca_ea1_mode, 1305 .num_modes = 1, 1306 .bpc = 6, 1307 .size = { 1308 .width = 256, 1309 .height = 144, 1310 }, 1311 .delay = { 1312 .hpd_absent = 200, 1313 .enable = 80, 1314 .disable = 50, 1315 .unprepare = 500, 1316 }, 1317 }; 1318 1319 /* 1320 * Datasheet specifies that at 60 Hz refresh rate: 1321 * - total horizontal time: { 1506, 1592, 1716 } 1322 * - total vertical time: { 788, 800, 868 } 1323 * 1324 * ...but doesn't go into exactly how that should be split into a front 1325 * porch, back porch, or sync length. For now we'll leave a single setting 1326 * here which allows a bit of tweaking of the pixel clock at the expense of 1327 * refresh rate. 1328 */ 1329 static const struct display_timing innolux_n116bge_timing = { 1330 .pixelclock = { 72600000, 76420000, 80240000 }, 1331 .hactive = { 1366, 1366, 1366 }, 1332 .hfront_porch = { 136, 136, 136 }, 1333 .hback_porch = { 60, 60, 60 }, 1334 .hsync_len = { 30, 30, 30 }, 1335 .vactive = { 768, 768, 768 }, 1336 .vfront_porch = { 8, 8, 8 }, 1337 .vback_porch = { 12, 12, 12 }, 1338 .vsync_len = { 12, 12, 12 }, 1339 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1340 }; 1341 1342 static const struct panel_desc innolux_n116bge = { 1343 .timings = &innolux_n116bge_timing, 1344 .num_timings = 1, 1345 .bpc = 6, 1346 .size = { 1347 .width = 256, 1348 .height = 144, 1349 }, 1350 }; 1351 1352 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1353 .clock = 162000, 1354 .hdisplay = 1920, 1355 .hsync_start = 1920 + 40, 1356 .hsync_end = 1920 + 40 + 40, 1357 .htotal = 1920 + 40 + 40 + 80, 1358 .vdisplay = 1080, 1359 .vsync_start = 1080 + 4, 1360 .vsync_end = 1080 + 4 + 4, 1361 .vtotal = 1080 + 4 + 4 + 24, 1362 }; 1363 1364 static const struct panel_desc innolux_n125hce_gn1 = { 1365 .modes = &innolux_n125hce_gn1_mode, 1366 .num_modes = 1, 1367 .bpc = 8, 1368 .size = { 1369 .width = 276, 1370 .height = 155, 1371 }, 1372 }; 1373 1374 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1375 .clock = 206016, 1376 .hdisplay = 2160, 1377 .hsync_start = 2160 + 48, 1378 .hsync_end = 2160 + 48 + 32, 1379 .htotal = 2160 + 48 + 32 + 80, 1380 .vdisplay = 1440, 1381 .vsync_start = 1440 + 3, 1382 .vsync_end = 1440 + 3 + 10, 1383 .vtotal = 1440 + 3 + 10 + 27, 1384 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1385 }; 1386 1387 static const struct panel_desc innolux_p120zdg_bf1 = { 1388 .modes = &innolux_p120zdg_bf1_mode, 1389 .num_modes = 1, 1390 .bpc = 8, 1391 .size = { 1392 .width = 254, 1393 .height = 169, 1394 }, 1395 .delay = { 1396 .hpd_absent = 200, 1397 .unprepare = 500, 1398 }, 1399 }; 1400 1401 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1402 .clock = 81000, 1403 .hdisplay = 1366, 1404 .hsync_start = 1366 + 40, 1405 .hsync_end = 1366 + 40 + 32, 1406 .htotal = 1366 + 40 + 32 + 62, 1407 .vdisplay = 768, 1408 .vsync_start = 768 + 5, 1409 .vsync_end = 768 + 5 + 5, 1410 .vtotal = 768 + 5 + 5 + 122, 1411 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1412 }; 1413 1414 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1415 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1416 .num_modes = 1, 1417 .bpc = 6, 1418 .size = { 1419 .width = 256, 1420 .height = 144, 1421 }, 1422 .delay = { 1423 .hpd_absent = 200, 1424 }, 1425 }; 1426 1427 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1428 .clock = 200000, 1429 .hdisplay = 1536, 1430 .hsync_start = 1536 + 12, 1431 .hsync_end = 1536 + 12 + 16, 1432 .htotal = 1536 + 12 + 16 + 48, 1433 .vdisplay = 2048, 1434 .vsync_start = 2048 + 8, 1435 .vsync_end = 2048 + 8 + 4, 1436 .vtotal = 2048 + 8 + 4 + 8, 1437 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1438 }; 1439 1440 static const struct panel_desc lg_lp079qx1_sp0v = { 1441 .modes = &lg_lp079qx1_sp0v_mode, 1442 .num_modes = 1, 1443 .size = { 1444 .width = 129, 1445 .height = 171, 1446 }, 1447 }; 1448 1449 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1450 .clock = 205210, 1451 .hdisplay = 2048, 1452 .hsync_start = 2048 + 150, 1453 .hsync_end = 2048 + 150 + 5, 1454 .htotal = 2048 + 150 + 5 + 5, 1455 .vdisplay = 1536, 1456 .vsync_start = 1536 + 3, 1457 .vsync_end = 1536 + 3 + 1, 1458 .vtotal = 1536 + 3 + 1 + 9, 1459 }; 1460 1461 static const struct panel_desc lg_lp097qx1_spa1 = { 1462 .modes = &lg_lp097qx1_spa1_mode, 1463 .num_modes = 1, 1464 .size = { 1465 .width = 208, 1466 .height = 147, 1467 }, 1468 }; 1469 1470 static const struct drm_display_mode lg_lp120up1_mode = { 1471 .clock = 162300, 1472 .hdisplay = 1920, 1473 .hsync_start = 1920 + 40, 1474 .hsync_end = 1920 + 40 + 40, 1475 .htotal = 1920 + 40 + 40 + 80, 1476 .vdisplay = 1280, 1477 .vsync_start = 1280 + 4, 1478 .vsync_end = 1280 + 4 + 4, 1479 .vtotal = 1280 + 4 + 4 + 12, 1480 }; 1481 1482 static const struct panel_desc lg_lp120up1 = { 1483 .modes = &lg_lp120up1_mode, 1484 .num_modes = 1, 1485 .bpc = 8, 1486 .size = { 1487 .width = 267, 1488 .height = 183, 1489 }, 1490 }; 1491 1492 static const struct drm_display_mode lg_lp129qe_mode = { 1493 .clock = 285250, 1494 .hdisplay = 2560, 1495 .hsync_start = 2560 + 48, 1496 .hsync_end = 2560 + 48 + 32, 1497 .htotal = 2560 + 48 + 32 + 80, 1498 .vdisplay = 1700, 1499 .vsync_start = 1700 + 3, 1500 .vsync_end = 1700 + 3 + 10, 1501 .vtotal = 1700 + 3 + 10 + 36, 1502 }; 1503 1504 static const struct panel_desc lg_lp129qe = { 1505 .modes = &lg_lp129qe_mode, 1506 .num_modes = 1, 1507 .bpc = 8, 1508 .size = { 1509 .width = 272, 1510 .height = 181, 1511 }, 1512 }; 1513 1514 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1515 { 1516 .clock = 138500, 1517 .hdisplay = 1920, 1518 .hsync_start = 1920 + 48, 1519 .hsync_end = 1920 + 48 + 32, 1520 .htotal = 1920 + 48 + 32 + 80, 1521 .vdisplay = 1080, 1522 .vsync_start = 1080 + 3, 1523 .vsync_end = 1080 + 3 + 5, 1524 .vtotal = 1080 + 3 + 5 + 23, 1525 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1526 }, { 1527 .clock = 110920, 1528 .hdisplay = 1920, 1529 .hsync_start = 1920 + 48, 1530 .hsync_end = 1920 + 48 + 32, 1531 .htotal = 1920 + 48 + 32 + 80, 1532 .vdisplay = 1080, 1533 .vsync_start = 1080 + 3, 1534 .vsync_end = 1080 + 3 + 5, 1535 .vtotal = 1080 + 3 + 5 + 23, 1536 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1537 } 1538 }; 1539 1540 static const struct panel_desc neweast_wjfh116008a = { 1541 .modes = neweast_wjfh116008a_modes, 1542 .num_modes = 2, 1543 .bpc = 6, 1544 .size = { 1545 .width = 260, 1546 .height = 150, 1547 }, 1548 .delay = { 1549 .hpd_reliable = 110, 1550 .enable = 20, 1551 .unprepare = 500, 1552 }, 1553 }; 1554 1555 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1556 .clock = 271560, 1557 .hdisplay = 2560, 1558 .hsync_start = 2560 + 48, 1559 .hsync_end = 2560 + 48 + 32, 1560 .htotal = 2560 + 48 + 32 + 80, 1561 .vdisplay = 1600, 1562 .vsync_start = 1600 + 2, 1563 .vsync_end = 1600 + 2 + 5, 1564 .vtotal = 1600 + 2 + 5 + 57, 1565 }; 1566 1567 static const struct panel_desc samsung_lsn122dl01_c01 = { 1568 .modes = &samsung_lsn122dl01_c01_mode, 1569 .num_modes = 1, 1570 .size = { 1571 .width = 263, 1572 .height = 164, 1573 }, 1574 }; 1575 1576 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1577 .clock = 76300, 1578 .hdisplay = 1366, 1579 .hsync_start = 1366 + 64, 1580 .hsync_end = 1366 + 64 + 48, 1581 .htotal = 1366 + 64 + 48 + 128, 1582 .vdisplay = 768, 1583 .vsync_start = 768 + 2, 1584 .vsync_end = 768 + 2 + 5, 1585 .vtotal = 768 + 2 + 5 + 17, 1586 }; 1587 1588 static const struct panel_desc samsung_ltn140at29_301 = { 1589 .modes = &samsung_ltn140at29_301_mode, 1590 .num_modes = 1, 1591 .bpc = 6, 1592 .size = { 1593 .width = 320, 1594 .height = 187, 1595 }, 1596 }; 1597 1598 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1599 .clock = 168480, 1600 .hdisplay = 1920, 1601 .hsync_start = 1920 + 48, 1602 .hsync_end = 1920 + 48 + 32, 1603 .htotal = 1920 + 48 + 32 + 80, 1604 .vdisplay = 1280, 1605 .vsync_start = 1280 + 3, 1606 .vsync_end = 1280 + 3 + 10, 1607 .vtotal = 1280 + 3 + 10 + 57, 1608 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1609 }; 1610 1611 static const struct panel_desc sharp_ld_d5116z01b = { 1612 .modes = &sharp_ld_d5116z01b_mode, 1613 .num_modes = 1, 1614 .bpc = 8, 1615 .size = { 1616 .width = 260, 1617 .height = 120, 1618 }, 1619 }; 1620 1621 static const struct display_timing sharp_lq123p1jx31_timing = { 1622 .pixelclock = { 252750000, 252750000, 266604720 }, 1623 .hactive = { 2400, 2400, 2400 }, 1624 .hfront_porch = { 48, 48, 48 }, 1625 .hback_porch = { 80, 80, 84 }, 1626 .hsync_len = { 32, 32, 32 }, 1627 .vactive = { 1600, 1600, 1600 }, 1628 .vfront_porch = { 3, 3, 3 }, 1629 .vback_porch = { 33, 33, 120 }, 1630 .vsync_len = { 10, 10, 10 }, 1631 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1632 }; 1633 1634 static const struct panel_desc sharp_lq123p1jx31 = { 1635 .timings = &sharp_lq123p1jx31_timing, 1636 .num_timings = 1, 1637 .bpc = 8, 1638 .size = { 1639 .width = 259, 1640 .height = 173, 1641 }, 1642 .delay = { 1643 .hpd_reliable = 110, 1644 .enable = 50, 1645 .unprepare = 550, 1646 }, 1647 }; 1648 1649 static const struct of_device_id platform_of_match[] = { 1650 { 1651 /* Must be first */ 1652 .compatible = "edp-panel", 1653 }, 1654 /* 1655 * Do not add panels to the list below unless they cannot be handled by 1656 * the generic edp-panel compatible. 1657 * 1658 * The only two valid reasons are: 1659 * - Because of the panel issues (e.g. broken EDID or broken 1660 * identification). 1661 * - Because the eDP drivers didn't wire up the AUX bus properly. 1662 * NOTE that, though this is a marginally valid reason, 1663 * some justification needs to be made for why the platform can't 1664 * wire up the AUX bus properly. 1665 * 1666 * In all other cases the platform should use the aux-bus and declare 1667 * the panel using the 'edp-panel' compatible as a device on the AUX 1668 * bus. 1669 */ 1670 { 1671 .compatible = "auo,b101ean01", 1672 .data = &auo_b101ean01, 1673 }, { 1674 .compatible = "auo,b116xa01", 1675 .data = &auo_b116xak01, 1676 }, { 1677 .compatible = "auo,b133htn01", 1678 .data = &auo_b133htn01, 1679 }, { 1680 .compatible = "auo,b133xtn01", 1681 .data = &auo_b133xtn01, 1682 }, { 1683 .compatible = "boe,nv101wxmn51", 1684 .data = &boe_nv101wxmn51, 1685 }, { 1686 .compatible = "boe,nv110wtm-n61", 1687 .data = &boe_nv110wtm_n61, 1688 }, { 1689 .compatible = "boe,nv133fhm-n61", 1690 .data = &boe_nv133fhm_n61, 1691 }, { 1692 .compatible = "boe,nv133fhm-n62", 1693 .data = &boe_nv133fhm_n61, 1694 }, { 1695 .compatible = "boe,nv140fhmn49", 1696 .data = &boe_nv140fhmn49, 1697 }, { 1698 .compatible = "friendlyarm,hd702e", 1699 .data = &friendlyarm_hd702e, 1700 }, { 1701 .compatible = "innolux,n116bca-ea1", 1702 .data = &innolux_n116bca_ea1, 1703 }, { 1704 .compatible = "innolux,n116bge", 1705 .data = &innolux_n116bge, 1706 }, { 1707 .compatible = "innolux,n125hce-gn1", 1708 .data = &innolux_n125hce_gn1, 1709 }, { 1710 .compatible = "innolux,p120zdg-bf1", 1711 .data = &innolux_p120zdg_bf1, 1712 }, { 1713 .compatible = "kingdisplay,kd116n21-30nv-a010", 1714 .data = &kingdisplay_kd116n21_30nv_a010, 1715 }, { 1716 .compatible = "lg,lp079qx1-sp0v", 1717 .data = &lg_lp079qx1_sp0v, 1718 }, { 1719 .compatible = "lg,lp097qx1-spa1", 1720 .data = &lg_lp097qx1_spa1, 1721 }, { 1722 .compatible = "lg,lp120up1", 1723 .data = &lg_lp120up1, 1724 }, { 1725 .compatible = "lg,lp129qe", 1726 .data = &lg_lp129qe, 1727 }, { 1728 .compatible = "neweast,wjfh116008a", 1729 .data = &neweast_wjfh116008a, 1730 }, { 1731 .compatible = "samsung,lsn122dl01-c01", 1732 .data = &samsung_lsn122dl01_c01, 1733 }, { 1734 .compatible = "samsung,ltn140at29-301", 1735 .data = &samsung_ltn140at29_301, 1736 }, { 1737 .compatible = "sharp,ld-d5116z01b", 1738 .data = &sharp_ld_d5116z01b, 1739 }, { 1740 .compatible = "sharp,lq123p1jx31", 1741 .data = &sharp_lq123p1jx31, 1742 }, { 1743 /* sentinel */ 1744 } 1745 }; 1746 MODULE_DEVICE_TABLE(of, platform_of_match); 1747 1748 static const struct panel_delay delay_200_500_p2e80 = { 1749 .hpd_absent = 200, 1750 .unprepare = 500, 1751 .prepare_to_enable = 80, 1752 }; 1753 1754 static const struct panel_delay delay_200_500_e50_p2e80 = { 1755 .hpd_absent = 200, 1756 .unprepare = 500, 1757 .enable = 50, 1758 .prepare_to_enable = 80, 1759 }; 1760 1761 static const struct panel_delay delay_200_500_p2e100 = { 1762 .hpd_absent = 200, 1763 .unprepare = 500, 1764 .prepare_to_enable = 100, 1765 }; 1766 1767 static const struct panel_delay delay_200_500_p2e200 = { 1768 .hpd_absent = 200, 1769 .unprepare = 500, 1770 .prepare_to_enable = 200, 1771 }; 1772 1773 static const struct panel_delay delay_200_500_e50 = { 1774 .hpd_absent = 200, 1775 .unprepare = 500, 1776 .enable = 50, 1777 }; 1778 1779 static const struct panel_delay delay_200_500_e50_d50_p2e200 = { 1780 .hpd_absent = 200, 1781 .unprepare = 500, 1782 .enable = 50, 1783 .disable = 50, 1784 .prepare_to_enable = 200, 1785 }; 1786 1787 static const struct panel_delay delay_200_500_e80 = { 1788 .hpd_absent = 200, 1789 .unprepare = 500, 1790 .enable = 80, 1791 }; 1792 1793 static const struct panel_delay delay_200_500_e80_d50 = { 1794 .hpd_absent = 200, 1795 .unprepare = 500, 1796 .enable = 80, 1797 .disable = 50, 1798 }; 1799 1800 static const struct panel_delay delay_80_500_e50 = { 1801 .hpd_absent = 80, 1802 .unprepare = 500, 1803 .enable = 50, 1804 }; 1805 1806 static const struct panel_delay delay_80_500_e80_p2e200 = { 1807 .hpd_absent = 80, 1808 .unprepare = 500, 1809 .enable = 80, 1810 .prepare_to_enable = 200, 1811 }; 1812 1813 static const struct panel_delay delay_100_500_e200 = { 1814 .hpd_absent = 100, 1815 .unprepare = 500, 1816 .enable = 200, 1817 }; 1818 1819 static const struct panel_delay delay_200_500_e200 = { 1820 .hpd_absent = 200, 1821 .unprepare = 500, 1822 .enable = 200, 1823 }; 1824 1825 static const struct panel_delay delay_200_500_e200_d100 = { 1826 .hpd_absent = 200, 1827 .unprepare = 500, 1828 .enable = 200, 1829 .disable = 100, 1830 }; 1831 1832 static const struct panel_delay delay_200_500_e200_d200 = { 1833 .hpd_absent = 200, 1834 .unprepare = 500, 1835 .enable = 200, 1836 .disable = 200, 1837 }; 1838 1839 static const struct panel_delay delay_200_500_e200_d10 = { 1840 .hpd_absent = 200, 1841 .unprepare = 500, 1842 .enable = 200, 1843 .disable = 10, 1844 }; 1845 1846 static const struct panel_delay delay_200_500_e200_d50 = { 1847 .hpd_absent = 200, 1848 .unprepare = 500, 1849 .enable = 200, 1850 .disable = 50, 1851 }; 1852 1853 static const struct panel_delay delay_200_150_e200 = { 1854 .hpd_absent = 200, 1855 .unprepare = 150, 1856 .enable = 200, 1857 }; 1858 1859 static const struct panel_delay delay_200_500_e50_po2e200 = { 1860 .hpd_absent = 200, 1861 .unprepare = 500, 1862 .enable = 50, 1863 .powered_on_to_enable = 200, 1864 }; 1865 1866 static const struct panel_delay delay_200_500_e50_po2e200_d100 = { 1867 .hpd_absent = 200, 1868 .unprepare = 500, 1869 .enable = 50, 1870 .powered_on_to_enable = 200, 1871 .disable = 100, 1872 }; 1873 1874 static const struct panel_delay delay_200_150_e50 = { 1875 .hpd_absent = 200, 1876 .unprepare = 150, 1877 .enable = 50, 1878 }; 1879 1880 static const struct panel_delay delay_200_500_e250 = { 1881 .hpd_absent = 200, 1882 .unprepare = 500, 1883 .enable = 250, 1884 }; 1885 1886 static const struct panel_delay delay_50_500_e200_d200_po2e335 = { 1887 .hpd_absent = 50, 1888 .unprepare = 500, 1889 .enable = 200, 1890 .disable = 200, 1891 .powered_on_to_enable = 335, 1892 }; 1893 1894 static const struct panel_delay delay_200_500_e50_d100 = { 1895 .hpd_absent = 200, 1896 .unprepare = 500, 1897 .enable = 50, 1898 .disable = 100, 1899 }; 1900 1901 static const struct panel_delay delay_80_500_e50_d50 = { 1902 .hpd_absent = 80, 1903 .unprepare = 500, 1904 .enable = 50, 1905 .disable = 50, 1906 }; 1907 1908 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1909 { \ 1910 .ident = { \ 1911 .name = _name, \ 1912 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1913 product_id), \ 1914 }, \ 1915 .delay = _delay \ 1916 } 1917 1918 #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1919 { \ 1920 .ident = { \ 1921 .name = _name, \ 1922 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1923 product_id), \ 1924 }, \ 1925 .delay = _delay, \ 1926 .override_edid_mode = _mode \ 1927 } 1928 1929 /* 1930 * This table is used to figure out power sequencing delays for panels that 1931 * are detected by EDID. Entries here may point to entries in the 1932 * platform_of_match table (if a panel is listed in both places). 1933 * 1934 * Sort first by vendor, then by product ID. 1935 */ 1936 static const struct edp_panel_entry edp_panels[] = { 1937 EDP_PANEL_ENTRY('A', 'U', 'O', 0x0290, &delay_200_500_e50, "B140XTN07.5"), 1938 EDP_PANEL_ENTRY('A', 'U', 'O', 0x04a4, &delay_200_500_e50, "B122UAN01.0"), 1939 EDP_PANEL_ENTRY('A', 'U', 'O', 0x0ba4, &delay_200_500_e50, "B140QAX01.H"), 1940 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), 1941 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1942 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), 1943 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1944 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"), 1945 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1946 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e200, "B116XAK01.6"), 1947 EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"), 1948 EDP_PANEL_ENTRY('A', 'U', 'O', 0x205c, &delay_200_500_e50, "B116XAN02.0"), 1949 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"), 1950 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1951 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"), 1952 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"), 1953 EDP_PANEL_ENTRY('A', 'U', 'O', 0x29c0, &delay_200_500_e50, "B116XAT04.3"), 1954 EDP_PANEL_ENTRY('A', 'U', 'O', 0x30ed, &delay_200_500_e50, "G156HAN03.0"), 1955 EDP_PANEL_ENTRY('A', 'U', 'O', 0x3c9f, &delay_200_500_e50, "B140HAK03.5"), 1956 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), 1957 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"), 1958 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0", 1959 &auo_b116xa3_mode), 1960 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), 1961 EDP_PANEL_ENTRY('A', 'U', 'O', 0x49ba, &delay_200_500_e50, "B116XTN02.3"), 1962 EDP_PANEL_ENTRY('A', 'U', 'O', 0x52b0, &delay_200_500_e50, "B116XAK02.0"), 1963 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1964 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1965 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), 1966 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), 1967 EDP_PANEL_ENTRY('A', 'U', 'O', 0x643d, &delay_200_500_e50, "B140HAN06.4"), 1968 EDP_PANEL_ENTRY('A', 'U', 'O', 0x67a8, &delay_200_500_e200, "B140XTK02.4"), 1969 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), 1970 EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3"), 1971 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 1972 EDP_PANEL_ENTRY('A', 'U', 'O', 0x89ba, &delay_200_500_e50, "B116XAT04.1"), 1973 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8bba, &delay_200_500_e50, "B140UAN08.5"), 1974 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa199, &delay_200_500_e50, "B116XAN06.1"), 1975 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa7b3, &delay_200_500_e50, "B140UAN04.4"), 1976 EDP_PANEL_ENTRY('A', 'U', 'O', 0xb7a9, &delay_200_500_e50, "B140HAK03.3"), 1977 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc4b4, &delay_200_500_e50, "B116XAT04.1"), 1978 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc7ad, &delay_200_500_e50, "B140HAN07.7"), 1979 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc9a8, &delay_200_500_e50, "B140QAN08.H"), 1980 EDP_PANEL_ENTRY('A', 'U', 'O', 0xcb8f, &delay_200_500_e50, "B133HAN06.6"), 1981 EDP_PANEL_ENTRY('A', 'U', 'O', 0xcdba, &delay_200_500_e50, "B140UAX01.2"), 1982 EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"), 1983 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), 1984 1985 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), 1986 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"), 1987 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1"), 1988 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0"), 1989 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), 1990 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), 1991 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), 1992 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), 1993 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"), 1994 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"), 1995 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"), 1996 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"), 1997 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), 1998 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), 1999 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), 2000 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"), 2001 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), 2002 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 2003 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), 2004 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21"), 2005 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 2006 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), 2007 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"), 2008 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), 2009 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), 2010 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"), 2011 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 2012 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), 2013 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"), 2014 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), 2015 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), 2016 EDP_PANEL_ENTRY('B', 'O', 'E', 0x090d, &delay_200_500_e50, "NT140WHM-N4T"), 2017 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 2018 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 2019 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"), 2020 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 2021 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0964, &delay_200_500_e50, "NV133WUM-N61"), 2022 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"), 2023 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 2024 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0985, &delay_200_500_e50, "NE160QDM-NY1"), 2025 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 2026 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"), 2027 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"), 2028 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"), 2029 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 2030 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a1b, &delay_200_500_e50, "NV133WUM-N63"), 2031 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a25, &delay_200_500_e50_po2e200, "NV133FHM-N4F V8.0"), 2032 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), 2033 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80_d50, "NV116WHM-N49"), 2034 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 2035 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a6a, &delay_200_500_e80, "NV140WUM-N44"), 2036 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a84, &delay_200_500_e50, "NV133WUM-T01"), 2037 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 2038 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41"), 2039 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b09, &delay_200_500_e50_po2e200, "NV140FHM-NZ"), 2040 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b1e, &delay_200_500_e80, "NE140QDM-N6A"), 2041 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80_d50, "NV122WUM-N41"), 2042 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"), 2043 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"), 2044 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G"), 2045 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b85, &delay_200_500_e50, "NT140WHM-T05"), 2046 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"), 2047 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c26, &delay_200_500_p2e200, "NV140WUM-T08"), 2048 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c6f, &delay_200_500_e50, "NV140FHM-N40"), 2049 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c93, &delay_200_500_e200, "Unknown"), 2050 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"), 2051 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cc9, &delay_200_500_e50, "NE120DRM-N28"), 2052 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf2, &delay_200_500_e200, "NV156FHM-N4S"), 2053 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf6, &delay_200_500_e200_d100, "NV140WUM-N64"), 2054 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"), 2055 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d45, &delay_200_500_e80, "NV116WHM-N4B"), 2056 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d73, &delay_200_500_e80, "NE140WUM-N6S"), 2057 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d98, &delay_200_500_e50_po2e200_d100, "NV140FHM-N5B"), 2058 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0db3, &delay_200_500_e80, "NV153WUM-N42"), 2059 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ddf, &delay_200_500_e80, "NV116WHM-T01"), 2060 EDP_PANEL_ENTRY('B', 'O', 'E', 0x386e, &delay_200_500_e80, "NV116WH2-M30"), 2061 EDP_PANEL_ENTRY('B', 'O', 'E', 0x3879, &delay_200_500_e80, "NT116WHM-N21"), 2062 EDP_PANEL_ENTRY('B', 'O', 'E', 0x388b, &delay_200_500_e80, "NV116FH1-M31"), 2063 EDP_PANEL_ENTRY('B', 'O', 'E', 0x388c, &delay_200_500_e80, "NV116FH1-M30"), 2064 2065 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), 2066 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"), 2067 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"), 2068 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 2069 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), 2070 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"), 2071 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), 2072 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 2073 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 2074 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 2075 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 2076 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), 2077 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"), 2078 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"), 2079 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115d, &delay_200_500_e80_d50, "N116BCA-EA2"), 2080 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"), 2081 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115f, &delay_200_500_e80_d50, "N116BCL-EAK"), 2082 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2083 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2"), 2084 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1163, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2085 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1169, &delay_200_500_e80_d50, "N116BCN-EA1"), 2086 EDP_PANEL_ENTRY('C', 'M', 'N', 0x116d, &delay_200_500_e80_d50, "N116BCP-EA2"), 2087 EDP_PANEL_ENTRY('C', 'M', 'N', 0x117a, &delay_200_500_e80_d50, "N116BCL-EAK"), 2088 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 2089 EDP_PANEL_ENTRY('C', 'M', 'N', 0x124c, &delay_200_500_e80_d50, "N122JCA-ENK"), 2090 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"), 2091 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"), 2092 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1441, &delay_200_500_e80_d50, "N140JCA-ELK"), 2093 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"), 2094 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), 2095 EDP_PANEL_ENTRY('C', 'M', 'N', 0x148f, &delay_200_500_e80, "N140HCA-EAC"), 2096 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14a8, &delay_200_500_e80, "N140JCA-ELP"), 2097 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14c7, &delay_200_500_e80, "N140HCA-EEK"), 2098 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 2099 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80, "N140BGA-E54"), 2100 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"), 2101 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1565, &delay_200_500_e80, "N156HCA-EAB"), 2102 EDP_PANEL_ENTRY('C', 'M', 'N', 0x156b, &delay_200_500_e80_d50, "N153JCA-ELK"), 2103 EDP_PANEL_ENTRY('C', 'M', 'N', 0x162b, &delay_200_500_e80_d50, "N160JCE-ELL"), 2104 EDP_PANEL_ENTRY('C', 'M', 'N', 0x7402, &delay_200_500_e200_d50, "N116BCA-EAK"), 2105 2106 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_d50_p2e200, "MNC207QS1-1"), 2107 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1413, &delay_200_500_e50_d50_p2e200, "MNE007JA1-2"), 2108 2109 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"), 2110 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"), 2111 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50_d100, "MNB601LS1-4"), 2112 EDP_PANEL_ENTRY('C', 'S', 'W', 0x110a, &delay_200_500_e50, "PNB601LS1-2"), 2113 EDP_PANEL_ENTRY('C', 'S', 'W', 0x110d, &delay_200_500_e50, "MNB601LS1-8"), 2114 EDP_PANEL_ENTRY('C', 'S', 'W', 0x143f, &delay_200_500_e50, "MNE007QS3-6"), 2115 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"), 2116 EDP_PANEL_ENTRY('C', 'S', 'W', 0x144b, &delay_200_500_e80, "MNE001BS1-4"), 2117 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8"), 2118 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1462, &delay_200_500_e50, "MNE007QS5-2"), 2119 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1468, &delay_200_500_e50, "MNE007QB2-2"), 2120 EDP_PANEL_ENTRY('C', 'S', 'W', 0x146e, &delay_80_500_e50_d50, "MNE007QB3-1"), 2121 EDP_PANEL_ENTRY('C', 'S', 'W', 0x147c, &delay_200_500_e50_d100, "MNE007QB3-1"), 2122 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1486, &delay_200_500_e50_d100, "MNE001BS6-2"), 2123 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1519, &delay_200_500_e80_d50, "MNF601BS1-3"), 2124 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1529, &delay_200_500_e80_d50, "MNF307QS3-2"), 2125 EDP_PANEL_ENTRY('C', 'S', 'W', 0x153f, &delay_200_500_e200_d50, "MNF601BS4-1"), 2126 2127 EDP_PANEL_ENTRY('E', 'T', 'C', 0x0000, &delay_50_500_e200_d200_po2e335, "LP079QX1-SP0V"), 2128 2129 EDP_PANEL_ENTRY('H', 'K', 'C', 0x1203, &delay_200_500_e80, "MB116AS01'3"), 2130 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), 2131 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "MB116AN01"), 2132 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"), 2133 2134 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"), 2135 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 2136 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 2137 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 2138 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"), 2139 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8cd5, &delay_200_500_e200_d10, "M140NWFQ R5"), 2140 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8ce6, &delay_200_500_e200, "R140NWFW R0"), 2141 2142 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), 2143 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 2144 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"), 2145 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 2146 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16"), 2147 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1707, &delay_200_150_e50, "KD116N2130B12"), 2148 2149 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0110, &delay_200_500_e50, "KD116N3730A07"), 2150 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0397, &delay_200_500_e50, "KD116N3730A12"), 2151 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"), 2152 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"), 2153 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), 2154 EDP_PANEL_ENTRY('K', 'D', 'C', 0x1220, &delay_200_500_e50, "KD116N3730A05"), 2155 2156 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"), 2157 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"), 2158 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"), 2159 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"), 2160 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"), 2161 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"), 2162 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"), 2163 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"), 2164 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"), 2165 EDP_PANEL_ENTRY('L', 'G', 'D', 0x06b2, &delay_200_500_e200_d200, "LP129WT232166"), 2166 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"), 2167 EDP_PANEL_ENTRY('L', 'G', 'D', 0x07fe, &delay_200_500_e200_d200, "LP116WHA-SPB1"), 2168 2169 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 2170 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"), 2171 EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"), 2172 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 2173 EDP_PANEL_ENTRY('S', 'H', 'P', 0x158f, &delay_200_500_p2e100, "LQ134Z1"), 2174 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1593, &delay_200_500_p2e100, "LQ134N1"), 2175 2176 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0004, &delay_200_500_e200, "116KHD024006"), 2177 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0009, &delay_200_500_e250, "116QHD024002"), 2178 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 2179 2180 EDP_PANEL_ENTRY('T', 'M', 'A', 0x0811, &delay_200_500_e80_d50, "TM140VDXP01-04"), 2181 EDP_PANEL_ENTRY('T', 'M', 'A', 0x2094, &delay_200_500_e50_d100, "TL140VDMS03-01"), 2182 EDP_PANEL_ENTRY('T', 'M', 'A', 0x2139, &delay_200_500_e50_d100, "TM156VDXP25"), 2183 2184 { /* sentinal */ } 2185 }; 2186 2187 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid) 2188 { 2189 const struct edp_panel_entry *panel; 2190 2191 if (!panel_id) 2192 return NULL; 2193 2194 /* 2195 * Match with identity first. This allows handling the case where 2196 * vendors incorrectly reused the same panel ID for multiple panels that 2197 * need different settings. If there's no match, try again with panel 2198 * ID, which should be unique. 2199 */ 2200 for (panel = edp_panels; panel->ident.panel_id; panel++) 2201 if (drm_edid_match(edid, &panel->ident)) 2202 return panel; 2203 2204 for (panel = edp_panels; panel->ident.panel_id; panel++) 2205 if (panel->ident.panel_id == panel_id) 2206 return panel; 2207 2208 return NULL; 2209 } 2210 2211 static int panel_edp_platform_probe(struct platform_device *pdev) 2212 { 2213 const struct of_device_id *id; 2214 2215 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 2216 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 2217 if (!id) 2218 return -ENODEV; 2219 2220 return panel_edp_probe(&pdev->dev, id->data, NULL); 2221 } 2222 2223 static void panel_edp_platform_remove(struct platform_device *pdev) 2224 { 2225 panel_edp_remove(&pdev->dev); 2226 } 2227 2228 static void panel_edp_platform_shutdown(struct platform_device *pdev) 2229 { 2230 panel_edp_shutdown(&pdev->dev); 2231 } 2232 2233 static const struct dev_pm_ops panel_edp_pm_ops = { 2234 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 2235 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 2236 pm_runtime_force_resume) 2237 }; 2238 2239 static struct platform_driver panel_edp_platform_driver = { 2240 .driver = { 2241 .name = "panel-edp", 2242 .of_match_table = platform_of_match, 2243 .pm = &panel_edp_pm_ops, 2244 }, 2245 .probe = panel_edp_platform_probe, 2246 .remove = panel_edp_platform_remove, 2247 .shutdown = panel_edp_platform_shutdown, 2248 }; 2249 2250 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 2251 { 2252 const struct of_device_id *id; 2253 2254 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 2255 if (!id) 2256 return -ENODEV; 2257 2258 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 2259 } 2260 2261 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 2262 { 2263 panel_edp_remove(&aux_ep->dev); 2264 } 2265 2266 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 2267 { 2268 panel_edp_shutdown(&aux_ep->dev); 2269 } 2270 2271 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2272 .driver = { 2273 .name = "panel-simple-dp-aux", 2274 .of_match_table = platform_of_match, /* Same as platform one! */ 2275 .pm = &panel_edp_pm_ops, 2276 }, 2277 .probe = panel_edp_dp_aux_ep_probe, 2278 .remove = panel_edp_dp_aux_ep_remove, 2279 .shutdown = panel_edp_dp_aux_ep_shutdown, 2280 }; 2281 2282 static int __init panel_edp_init(void) 2283 { 2284 int err; 2285 2286 err = platform_driver_register(&panel_edp_platform_driver); 2287 if (err < 0) 2288 return err; 2289 2290 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2291 if (err < 0) 2292 goto err_did_platform_register; 2293 2294 return 0; 2295 2296 err_did_platform_register: 2297 platform_driver_unregister(&panel_edp_platform_driver); 2298 2299 return err; 2300 } 2301 module_init(panel_edp_init); 2302 2303 static void __exit panel_edp_exit(void) 2304 { 2305 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2306 platform_driver_unregister(&panel_edp_platform_driver); 2307 } 2308 module_exit(panel_edp_exit); 2309 2310 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2311 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2312 MODULE_LICENSE("GPL and additional rights"); 2313