1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/debugfs.h> 25 #include <linux/delay.h> 26 #include <linux/gpio/consumer.h> 27 #include <linux/iopoll.h> 28 #include <linux/module.h> 29 #include <linux/of_platform.h> 30 #include <linux/platform_device.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/regulator/consumer.h> 33 34 #include <video/display_timing.h> 35 #include <video/of_display_timing.h> 36 #include <video/videomode.h> 37 38 #include <drm/display/drm_dp_aux_bus.h> 39 #include <drm/display/drm_dp_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_device.h> 42 #include <drm/drm_edid.h> 43 #include <drm/drm_of.h> 44 #include <drm/drm_panel.h> 45 46 /** 47 * struct panel_delay - Describes delays for a simple panel. 48 */ 49 struct panel_delay { 50 /** 51 * @hpd_reliable: Time for HPD to be reliable 52 * 53 * The time (in milliseconds) that it takes after powering the panel 54 * before the HPD signal is reliable. Ideally this is 0 but some panels, 55 * board designs, or bad pulldown configs can cause a glitch here. 56 * 57 * NOTE: on some old panel data this number appears to be much too big. 58 * Presumably some old panels simply didn't have HPD hooked up and put 59 * the hpd_absent here because this field predates the 60 * hpd_absent. While that works, it's non-ideal. 61 */ 62 unsigned int hpd_reliable; 63 64 /** 65 * @hpd_absent: Time to wait if HPD isn't hooked up. 66 * 67 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 68 * 69 * This is T3-max on eDP timing diagrams or the delay from power on 70 * until HPD is guaranteed to be asserted. 71 */ 72 unsigned int hpd_absent; 73 74 /** 75 * @powered_on_to_enable: Time between panel powered on and enable. 76 * 77 * The minimum time, in milliseconds, that needs to have passed 78 * between when panel powered on and enable may begin. 79 * 80 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the 81 * power supply enabled until we can turn the backlight on and see 82 * valid data. 83 * 84 * This doesn't normally need to be set if timings are already met by 85 * prepare_to_enable or enable. 86 */ 87 unsigned int powered_on_to_enable; 88 89 /** 90 * @prepare_to_enable: Time between prepare and enable. 91 * 92 * The minimum time, in milliseconds, that needs to have passed 93 * between when prepare finished and enable may begin. If at 94 * enable time less time has passed since prepare finished, 95 * the driver waits for the remaining time. 96 * 97 * If a fixed enable delay is also specified, we'll start 98 * counting before delaying for the fixed delay. 99 * 100 * If a fixed prepare delay is also specified, we won't start 101 * counting until after the fixed delay. We can't overlap this 102 * fixed delay with the min time because the fixed delay 103 * doesn't happen at the end of the function if a HPD GPIO was 104 * specified. 105 * 106 * In other words: 107 * prepare() 108 * ... 109 * // do fixed prepare delay 110 * // wait for HPD GPIO if applicable 111 * // start counting for prepare_to_enable 112 * 113 * enable() 114 * // do fixed enable delay 115 * // enforce prepare_to_enable min time 116 * 117 * This is usually (T4+T5+T6+T8)-min on eDP timing diagrams. 118 * It is effectively the time from HPD going high till you can 119 * turn on the backlight. 120 */ 121 unsigned int prepare_to_enable; 122 123 /** 124 * @enable: Time for the panel to display a valid frame. 125 * 126 * The time (in milliseconds) that it takes for the panel to 127 * display the first valid frame after starting to receive 128 * video data. 129 * 130 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 131 * the delay after link training finishes until we can turn the 132 * backlight on and see valid data. 133 */ 134 unsigned int enable; 135 136 /** 137 * @disable: Time for the panel to turn the display off. 138 * 139 * The time (in milliseconds) that it takes for the panel to 140 * turn the display off (no content is visible). 141 * 142 * This is T9-min (delay from backlight off to end of valid video 143 * data) on eDP timing diagrams. It is not common to set. 144 */ 145 unsigned int disable; 146 147 /** 148 * @unprepare: Time to power down completely. 149 * 150 * The time (in milliseconds) that it takes for the panel 151 * to power itself down completely. 152 * 153 * This time is used to prevent a future "prepare" from 154 * starting until at least this many milliseconds has passed. 155 * If at prepare time less time has passed since unprepare 156 * finished, the driver waits for the remaining time. 157 * 158 * This is T12-min on eDP timing diagrams. 159 */ 160 unsigned int unprepare; 161 }; 162 163 /** 164 * struct panel_desc - Describes a simple panel. 165 */ 166 struct panel_desc { 167 /** 168 * @modes: Pointer to array of fixed modes appropriate for this panel. 169 * 170 * If only one mode then this can just be the address of the mode. 171 * NOTE: cannot be used with "timings" and also if this is specified 172 * then you cannot override the mode in the device tree. 173 */ 174 const struct drm_display_mode *modes; 175 176 /** @num_modes: Number of elements in modes array. */ 177 unsigned int num_modes; 178 179 /** 180 * @timings: Pointer to array of display timings 181 * 182 * NOTE: cannot be used with "modes" and also these will be used to 183 * validate a device tree override if one is present. 184 */ 185 const struct display_timing *timings; 186 187 /** @num_timings: Number of elements in timings array. */ 188 unsigned int num_timings; 189 190 /** @bpc: Bits per color. */ 191 unsigned int bpc; 192 193 /** @size: Structure containing the physical size of this panel. */ 194 struct { 195 /** 196 * @size.width: Width (in mm) of the active display area. 197 */ 198 unsigned int width; 199 200 /** 201 * @size.height: Height (in mm) of the active display area. 202 */ 203 unsigned int height; 204 } size; 205 206 /** @delay: Structure containing various delay values for this panel. */ 207 struct panel_delay delay; 208 }; 209 210 /** 211 * struct edp_panel_entry - Maps panel ID to delay / panel name. 212 */ 213 struct edp_panel_entry { 214 /** @ident: edid identity used for panel matching. */ 215 const struct drm_edid_ident ident; 216 217 /** @delay: The power sequencing delays needed for this panel. */ 218 const struct panel_delay *delay; 219 220 /** @override_edid_mode: Override the mode obtained by edid. */ 221 const struct drm_display_mode *override_edid_mode; 222 }; 223 224 struct panel_edp { 225 struct drm_panel base; 226 bool no_hpd; 227 228 ktime_t prepared_time; 229 ktime_t powered_on_time; 230 ktime_t unprepared_time; 231 232 const struct panel_desc *desc; 233 234 struct regulator *supply; 235 struct i2c_adapter *ddc; 236 struct drm_dp_aux *aux; 237 238 struct gpio_desc *enable_gpio; 239 struct gpio_desc *hpd_gpio; 240 241 const struct edp_panel_entry *detected_panel; 242 243 const struct drm_edid *drm_edid; 244 245 struct drm_display_mode override_mode; 246 247 enum drm_panel_orientation orientation; 248 }; 249 250 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 251 { 252 return container_of(panel, struct panel_edp, base); 253 } 254 255 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 256 struct drm_connector *connector) 257 { 258 struct drm_display_mode *mode; 259 unsigned int i, num = 0; 260 261 for (i = 0; i < panel->desc->num_timings; i++) { 262 const struct display_timing *dt = &panel->desc->timings[i]; 263 struct videomode vm; 264 265 videomode_from_timing(dt, &vm); 266 mode = drm_mode_create(connector->dev); 267 if (!mode) { 268 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 269 dt->hactive.typ, dt->vactive.typ); 270 continue; 271 } 272 273 drm_display_mode_from_videomode(&vm, mode); 274 275 mode->type |= DRM_MODE_TYPE_DRIVER; 276 277 if (panel->desc->num_timings == 1) 278 mode->type |= DRM_MODE_TYPE_PREFERRED; 279 280 drm_mode_probed_add(connector, mode); 281 num++; 282 } 283 284 return num; 285 } 286 287 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 288 struct drm_connector *connector) 289 { 290 struct drm_display_mode *mode; 291 unsigned int i, num = 0; 292 293 for (i = 0; i < panel->desc->num_modes; i++) { 294 const struct drm_display_mode *m = &panel->desc->modes[i]; 295 296 mode = drm_mode_duplicate(connector->dev, m); 297 if (!mode) { 298 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 299 m->hdisplay, m->vdisplay, 300 drm_mode_vrefresh(m)); 301 continue; 302 } 303 304 mode->type |= DRM_MODE_TYPE_DRIVER; 305 306 if (panel->desc->num_modes == 1) 307 mode->type |= DRM_MODE_TYPE_PREFERRED; 308 309 drm_mode_set_name(mode); 310 311 drm_mode_probed_add(connector, mode); 312 num++; 313 } 314 315 return num; 316 } 317 318 static int panel_edp_override_edid_mode(struct panel_edp *panel, 319 struct drm_connector *connector, 320 const struct drm_display_mode *override_mode) 321 { 322 struct drm_display_mode *mode; 323 324 mode = drm_mode_duplicate(connector->dev, override_mode); 325 if (!mode) { 326 dev_err(panel->base.dev, "failed to add additional mode\n"); 327 return 0; 328 } 329 330 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 331 drm_mode_set_name(mode); 332 drm_mode_probed_add(connector, mode); 333 return 1; 334 } 335 336 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 337 struct drm_connector *connector) 338 { 339 struct drm_display_mode *mode; 340 bool has_override = panel->override_mode.type; 341 unsigned int num = 0; 342 343 if (!panel->desc) 344 return 0; 345 346 if (has_override) { 347 mode = drm_mode_duplicate(connector->dev, 348 &panel->override_mode); 349 if (mode) { 350 drm_mode_probed_add(connector, mode); 351 num = 1; 352 } else { 353 dev_err(panel->base.dev, "failed to add override mode\n"); 354 } 355 } 356 357 /* Only add timings if override was not there or failed to validate */ 358 if (num == 0 && panel->desc->num_timings) 359 num = panel_edp_get_timings_modes(panel, connector); 360 361 /* 362 * Only add fixed modes if timings/override added no mode. 363 * 364 * We should only ever have either the display timings specified 365 * or a fixed mode. Anything else is rather bogus. 366 */ 367 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 368 if (num == 0) 369 num = panel_edp_get_display_modes(panel, connector); 370 371 connector->display_info.bpc = panel->desc->bpc; 372 connector->display_info.width_mm = panel->desc->size.width; 373 connector->display_info.height_mm = panel->desc->size.height; 374 375 return num; 376 } 377 378 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 379 { 380 ktime_t now_ktime, min_ktime; 381 382 if (!min_ms) 383 return; 384 385 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 386 now_ktime = ktime_get_boottime(); 387 388 if (ktime_before(now_ktime, min_ktime)) 389 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 390 } 391 392 static int panel_edp_disable(struct drm_panel *panel) 393 { 394 struct panel_edp *p = to_panel_edp(panel); 395 396 if (p->desc->delay.disable) 397 msleep(p->desc->delay.disable); 398 399 return 0; 400 } 401 402 static int panel_edp_suspend(struct device *dev) 403 { 404 struct panel_edp *p = dev_get_drvdata(dev); 405 406 drm_dp_dpcd_set_powered(p->aux, false); 407 gpiod_set_value_cansleep(p->enable_gpio, 0); 408 regulator_disable(p->supply); 409 p->unprepared_time = ktime_get_boottime(); 410 411 return 0; 412 } 413 414 static int panel_edp_unprepare(struct drm_panel *panel) 415 { 416 int ret; 417 418 ret = pm_runtime_put_sync_suspend(panel->dev); 419 if (ret < 0) 420 return ret; 421 422 return 0; 423 } 424 425 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 426 { 427 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 428 if (IS_ERR(p->hpd_gpio)) 429 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 430 "failed to get 'hpd' GPIO\n"); 431 432 return 0; 433 } 434 435 static bool panel_edp_can_read_hpd(struct panel_edp *p) 436 { 437 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 438 } 439 440 static int panel_edp_prepare_once(struct panel_edp *p) 441 { 442 struct device *dev = p->base.dev; 443 unsigned int delay; 444 int err; 445 int hpd_asserted; 446 unsigned long hpd_wait_us; 447 448 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 449 450 err = regulator_enable(p->supply); 451 if (err < 0) { 452 dev_err(dev, "failed to enable supply: %d\n", err); 453 return err; 454 } 455 456 gpiod_set_value_cansleep(p->enable_gpio, 1); 457 drm_dp_dpcd_set_powered(p->aux, true); 458 459 p->powered_on_time = ktime_get_boottime(); 460 461 delay = p->desc->delay.hpd_reliable; 462 if (p->no_hpd) 463 delay = max(delay, p->desc->delay.hpd_absent); 464 if (delay) 465 msleep(delay); 466 467 if (panel_edp_can_read_hpd(p)) { 468 if (p->desc->delay.hpd_absent) 469 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 470 else 471 hpd_wait_us = 2000000; 472 473 if (p->hpd_gpio) { 474 err = readx_poll_timeout(gpiod_get_value_cansleep, 475 p->hpd_gpio, hpd_asserted, 476 hpd_asserted, 1000, hpd_wait_us); 477 if (hpd_asserted < 0) 478 err = hpd_asserted; 479 } else { 480 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 481 } 482 483 if (err) { 484 if (err != -ETIMEDOUT) 485 dev_err(dev, 486 "error waiting for hpd GPIO: %d\n", err); 487 goto error; 488 } 489 } 490 491 p->prepared_time = ktime_get_boottime(); 492 493 return 0; 494 495 error: 496 drm_dp_dpcd_set_powered(p->aux, false); 497 gpiod_set_value_cansleep(p->enable_gpio, 0); 498 regulator_disable(p->supply); 499 p->unprepared_time = ktime_get_boottime(); 500 501 return err; 502 } 503 504 /* 505 * Some panels simply don't always come up and need to be power cycled to 506 * work properly. We'll allow for a handful of retries. 507 */ 508 #define MAX_PANEL_PREPARE_TRIES 5 509 510 static int panel_edp_resume(struct device *dev) 511 { 512 struct panel_edp *p = dev_get_drvdata(dev); 513 int ret; 514 int try; 515 516 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 517 ret = panel_edp_prepare_once(p); 518 if (ret != -ETIMEDOUT) 519 break; 520 } 521 522 if (ret == -ETIMEDOUT) 523 dev_err(dev, "Prepare timeout after %d tries\n", try); 524 else if (try) 525 dev_warn(dev, "Prepare needed %d retries\n", try); 526 527 return ret; 528 } 529 530 static int panel_edp_prepare(struct drm_panel *panel) 531 { 532 int ret; 533 534 ret = pm_runtime_get_sync(panel->dev); 535 if (ret < 0) { 536 pm_runtime_put_autosuspend(panel->dev); 537 return ret; 538 } 539 540 return 0; 541 } 542 543 static int panel_edp_enable(struct drm_panel *panel) 544 { 545 struct panel_edp *p = to_panel_edp(panel); 546 unsigned int delay; 547 548 delay = p->desc->delay.enable; 549 550 /* 551 * If there is a "prepare_to_enable" delay then that's supposed to be 552 * the delay from HPD going high until we can turn the backlight on. 553 * However, we can only count this if HPD is readable by the panel 554 * driver. 555 * 556 * If we aren't handling the HPD pin ourselves then the best we 557 * can do is assume that HPD went high immediately before we were 558 * called (and link training took zero time). Note that "no-hpd" 559 * actually counts as handling HPD ourselves since we're doing the 560 * worst case delay (in prepare) ourselves. 561 * 562 * NOTE: if we ever end up in this "if" statement then we're 563 * guaranteed that the panel_edp_wait() call below will do no delay. 564 * It already handles that case, though, so we don't need any special 565 * code for it. 566 */ 567 if (p->desc->delay.prepare_to_enable && 568 !panel_edp_can_read_hpd(p) && !p->no_hpd) 569 delay = max(delay, p->desc->delay.prepare_to_enable); 570 571 if (delay) 572 msleep(delay); 573 574 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 575 576 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); 577 578 return 0; 579 } 580 581 static int panel_edp_get_modes(struct drm_panel *panel, 582 struct drm_connector *connector) 583 { 584 struct panel_edp *p = to_panel_edp(panel); 585 int num = 0; 586 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; 587 bool has_override_edid_mode = p->detected_panel && 588 p->detected_panel != ERR_PTR(-EINVAL) && 589 p->detected_panel->override_edid_mode; 590 591 /* probe EDID if a DDC bus is available */ 592 if (p->ddc) { 593 pm_runtime_get_sync(panel->dev); 594 595 if (!p->drm_edid) 596 p->drm_edid = drm_edid_read_ddc(connector, p->ddc); 597 598 drm_edid_connector_update(connector, p->drm_edid); 599 600 /* 601 * If both edid and hard-coded modes exists, skip edid modes to 602 * avoid multiple preferred modes. 603 */ 604 if (p->drm_edid && !has_hard_coded_modes) { 605 if (has_override_edid_mode) { 606 /* 607 * override_edid_mode is specified. Use 608 * override_edid_mode instead of from edid. 609 */ 610 num += panel_edp_override_edid_mode(p, connector, 611 p->detected_panel->override_edid_mode); 612 } else { 613 num += drm_edid_connector_add_modes(connector); 614 } 615 } 616 617 pm_runtime_mark_last_busy(panel->dev); 618 pm_runtime_put_autosuspend(panel->dev); 619 } 620 621 if (has_hard_coded_modes) 622 num += panel_edp_get_non_edid_modes(p, connector); 623 else if (!num) 624 dev_warn(p->base.dev, "No display modes\n"); 625 626 /* 627 * TODO: Remove once all drm drivers call 628 * drm_connector_set_orientation_from_panel() 629 */ 630 drm_connector_set_panel_orientation(connector, p->orientation); 631 632 return num; 633 } 634 635 static int panel_edp_get_timings(struct drm_panel *panel, 636 unsigned int num_timings, 637 struct display_timing *timings) 638 { 639 struct panel_edp *p = to_panel_edp(panel); 640 unsigned int i; 641 642 if (p->desc->num_timings < num_timings) 643 num_timings = p->desc->num_timings; 644 645 if (timings) 646 for (i = 0; i < num_timings; i++) 647 timings[i] = p->desc->timings[i]; 648 649 return p->desc->num_timings; 650 } 651 652 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 653 { 654 struct panel_edp *p = to_panel_edp(panel); 655 656 return p->orientation; 657 } 658 659 static int detected_panel_show(struct seq_file *s, void *data) 660 { 661 struct drm_panel *panel = s->private; 662 struct panel_edp *p = to_panel_edp(panel); 663 664 if (IS_ERR(p->detected_panel)) 665 seq_puts(s, "UNKNOWN\n"); 666 else if (!p->detected_panel) 667 seq_puts(s, "HARDCODED\n"); 668 else 669 seq_printf(s, "%s\n", p->detected_panel->ident.name); 670 671 return 0; 672 } 673 674 DEFINE_SHOW_ATTRIBUTE(detected_panel); 675 676 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 677 { 678 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 679 } 680 681 static const struct drm_panel_funcs panel_edp_funcs = { 682 .disable = panel_edp_disable, 683 .unprepare = panel_edp_unprepare, 684 .prepare = panel_edp_prepare, 685 .enable = panel_edp_enable, 686 .get_modes = panel_edp_get_modes, 687 .get_orientation = panel_edp_get_orientation, 688 .get_timings = panel_edp_get_timings, 689 .debugfs_init = panel_edp_debugfs_init, 690 }; 691 692 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 693 (to_check->field.typ >= bounds->field.min && \ 694 to_check->field.typ <= bounds->field.max) 695 static void panel_edp_parse_panel_timing_node(struct device *dev, 696 struct panel_edp *panel, 697 const struct display_timing *ot) 698 { 699 const struct panel_desc *desc = panel->desc; 700 struct videomode vm; 701 unsigned int i; 702 703 if (WARN_ON(desc->num_modes)) { 704 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 705 return; 706 } 707 if (WARN_ON(!desc->num_timings)) { 708 dev_err(dev, "Reject override mode: no timings specified\n"); 709 return; 710 } 711 712 for (i = 0; i < panel->desc->num_timings; i++) { 713 const struct display_timing *dt = &panel->desc->timings[i]; 714 715 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 716 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 717 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 718 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 719 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 720 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 721 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 722 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 723 continue; 724 725 if (ot->flags != dt->flags) 726 continue; 727 728 videomode_from_timing(ot, &vm); 729 drm_display_mode_from_videomode(&vm, &panel->override_mode); 730 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 731 DRM_MODE_TYPE_PREFERRED; 732 break; 733 } 734 735 if (WARN_ON(!panel->override_mode.type)) 736 dev_err(dev, "Reject override mode: No display_timing found\n"); 737 } 738 739 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid); 740 741 static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc) 742 { 743 /* 744 * It's highly likely that the panel will work if we use very 745 * conservative timings, so let's do that. 746 * 747 * Nearly all panels have a "unprepare" delay of 500 ms though 748 * there are a few with 1000. Let's stick 2000 in just to be 749 * super conservative. 750 * 751 * An "enable" delay of 80 ms seems the most common, but we'll 752 * throw in 200 ms to be safe. 753 */ 754 desc->delay.unprepare = 2000; 755 desc->delay.enable = 200; 756 757 panel->detected_panel = ERR_PTR(-EINVAL); 758 } 759 760 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 761 { 762 struct panel_desc *desc; 763 const struct drm_edid *base_block; 764 u32 panel_id; 765 char vend[4]; 766 u16 product_id; 767 u32 reliable_ms = 0; 768 u32 absent_ms = 0; 769 int ret; 770 771 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 772 if (!desc) 773 return -ENOMEM; 774 panel->desc = desc; 775 776 /* 777 * Read the dts properties for the initial probe. These are used by 778 * the runtime resume code which will get called by the 779 * pm_runtime_get_sync() call below. 780 */ 781 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 782 desc->delay.hpd_reliable = reliable_ms; 783 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 784 desc->delay.hpd_absent = absent_ms; 785 786 /* Power the panel on so we can read the EDID */ 787 ret = pm_runtime_get_sync(dev); 788 if (ret < 0) { 789 dev_err(dev, 790 "Couldn't power on panel to ID it; using conservative timings: %d\n", 791 ret); 792 panel_edp_set_conservative_timings(panel, desc); 793 goto exit; 794 } 795 796 base_block = drm_edid_read_base_block(panel->ddc); 797 if (base_block) { 798 panel_id = drm_edid_get_panel_id(base_block); 799 } else { 800 dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n"); 801 panel_edp_set_conservative_timings(panel, desc); 802 goto exit; 803 } 804 drm_edid_decode_panel_id(panel_id, vend, &product_id); 805 806 panel->detected_panel = find_edp_panel(panel_id, base_block); 807 808 drm_edid_free(base_block); 809 810 /* 811 * We're using non-optimized timings and want it really obvious that 812 * someone needs to add an entry to the table, so we'll do a WARN_ON 813 * splat. 814 */ 815 if (WARN_ON(!panel->detected_panel)) { 816 dev_warn(dev, 817 "Unknown panel %s %#06x, using conservative timings\n", 818 vend, product_id); 819 panel_edp_set_conservative_timings(panel, desc); 820 } else { 821 dev_info(dev, "Detected %s %s (%#06x)\n", 822 vend, panel->detected_panel->ident.name, product_id); 823 824 /* Update the delay; everything else comes from EDID */ 825 desc->delay = *panel->detected_panel->delay; 826 } 827 828 exit: 829 pm_runtime_mark_last_busy(dev); 830 pm_runtime_put_autosuspend(dev); 831 832 return 0; 833 } 834 835 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 836 struct drm_dp_aux *aux) 837 { 838 struct panel_edp *panel; 839 struct display_timing dt; 840 struct device_node *ddc; 841 int err; 842 843 panel = devm_drm_panel_alloc(dev, struct panel_edp, base, 844 &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 845 if (IS_ERR(panel)) 846 return PTR_ERR(panel); 847 848 panel->prepared_time = 0; 849 panel->desc = desc; 850 panel->aux = aux; 851 852 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 853 if (!panel->no_hpd) { 854 err = panel_edp_get_hpd_gpio(dev, panel); 855 if (err) 856 return err; 857 } 858 859 panel->supply = devm_regulator_get(dev, "power"); 860 if (IS_ERR(panel->supply)) 861 return PTR_ERR(panel->supply); 862 863 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 864 GPIOD_OUT_LOW); 865 if (IS_ERR(panel->enable_gpio)) 866 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 867 "failed to request GPIO\n"); 868 869 err = drm_of_get_panel_orientation(dev->of_node, &panel->orientation); 870 if (err) { 871 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 872 return err; 873 } 874 875 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 876 if (ddc) { 877 panel->ddc = of_find_i2c_adapter_by_node(ddc); 878 of_node_put(ddc); 879 880 if (!panel->ddc) 881 return -EPROBE_DEFER; 882 } else if (aux) { 883 panel->ddc = &aux->ddc; 884 } 885 886 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 887 panel_edp_parse_panel_timing_node(dev, panel, &dt); 888 889 dev_set_drvdata(dev, panel); 890 891 err = drm_panel_of_backlight(&panel->base); 892 if (err) 893 goto err_finished_ddc_init; 894 895 /* 896 * We use runtime PM for prepare / unprepare since those power the panel 897 * on and off and those can be very slow operations. This is important 898 * to optimize powering the panel on briefly to read the EDID before 899 * fully enabling the panel. 900 */ 901 pm_runtime_enable(dev); 902 pm_runtime_set_autosuspend_delay(dev, 1000); 903 pm_runtime_use_autosuspend(dev); 904 905 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 906 err = generic_edp_panel_probe(dev, panel); 907 if (err) { 908 dev_err_probe(dev, err, 909 "Couldn't detect panel nor find a fallback\n"); 910 goto err_finished_pm_runtime; 911 } 912 /* generic_edp_panel_probe() replaces desc in the panel */ 913 desc = panel->desc; 914 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 915 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 916 } 917 918 if (!panel->base.backlight && panel->aux) { 919 pm_runtime_get_sync(dev); 920 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 921 pm_runtime_mark_last_busy(dev); 922 pm_runtime_put_autosuspend(dev); 923 924 /* 925 * Warn if we get an error, but don't consider it fatal. Having 926 * a panel where we can't control the backlight is better than 927 * no panel. 928 */ 929 if (err) 930 dev_warn(dev, "failed to register dp aux backlight: %d\n", err); 931 } 932 933 drm_panel_add(&panel->base); 934 935 return 0; 936 937 err_finished_pm_runtime: 938 pm_runtime_dont_use_autosuspend(dev); 939 pm_runtime_disable(dev); 940 err_finished_ddc_init: 941 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 942 put_device(&panel->ddc->dev); 943 944 return err; 945 } 946 947 static void panel_edp_shutdown(struct device *dev) 948 { 949 struct panel_edp *panel = dev_get_drvdata(dev); 950 951 /* 952 * NOTE: the following two calls don't really belong here. It is the 953 * responsibility of a correctly written DRM modeset driver to call 954 * drm_atomic_helper_shutdown() at shutdown time and that should 955 * cause the panel to be disabled / unprepared if needed. For now, 956 * however, we'll keep these calls due to the sheer number of 957 * different DRM modeset drivers used with panel-edp. Once we've 958 * confirmed that all DRM modeset drivers using this panel properly 959 * call drm_atomic_helper_shutdown() we can simply delete the two 960 * calls below. 961 * 962 * TO BE EXPLICIT: THE CALLS BELOW SHOULDN'T BE COPIED TO ANY NEW 963 * PANEL DRIVERS. 964 * 965 * FIXME: If we're still haven't figured out if all DRM modeset 966 * drivers properly call drm_atomic_helper_shutdown() but we _have_ 967 * managed to make sure that DRM modeset drivers get their shutdown() 968 * callback before the panel's shutdown() callback (perhaps using 969 * device link), we could add a WARN_ON here to help move forward. 970 */ 971 if (panel->base.enabled) 972 drm_panel_disable(&panel->base); 973 if (panel->base.prepared) 974 drm_panel_unprepare(&panel->base); 975 } 976 977 static void panel_edp_remove(struct device *dev) 978 { 979 struct panel_edp *panel = dev_get_drvdata(dev); 980 981 drm_panel_remove(&panel->base); 982 panel_edp_shutdown(dev); 983 984 pm_runtime_dont_use_autosuspend(dev); 985 pm_runtime_disable(dev); 986 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 987 put_device(&panel->ddc->dev); 988 989 drm_edid_free(panel->drm_edid); 990 panel->drm_edid = NULL; 991 } 992 993 static const struct display_timing auo_b101ean01_timing = { 994 .pixelclock = { 65300000, 72500000, 75000000 }, 995 .hactive = { 1280, 1280, 1280 }, 996 .hfront_porch = { 18, 119, 119 }, 997 .hback_porch = { 21, 21, 21 }, 998 .hsync_len = { 32, 32, 32 }, 999 .vactive = { 800, 800, 800 }, 1000 .vfront_porch = { 4, 4, 4 }, 1001 .vback_porch = { 8, 8, 8 }, 1002 .vsync_len = { 18, 20, 20 }, 1003 }; 1004 1005 static const struct panel_desc auo_b101ean01 = { 1006 .timings = &auo_b101ean01_timing, 1007 .num_timings = 1, 1008 .bpc = 6, 1009 .size = { 1010 .width = 217, 1011 .height = 136, 1012 }, 1013 }; 1014 1015 static const struct drm_display_mode auo_b116xa3_mode = { 1016 .clock = 70589, 1017 .hdisplay = 1366, 1018 .hsync_start = 1366 + 40, 1019 .hsync_end = 1366 + 40 + 40, 1020 .htotal = 1366 + 40 + 40 + 32, 1021 .vdisplay = 768, 1022 .vsync_start = 768 + 10, 1023 .vsync_end = 768 + 10 + 12, 1024 .vtotal = 768 + 10 + 12 + 6, 1025 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1026 }; 1027 1028 static const struct drm_display_mode auo_b116xak01_mode = { 1029 .clock = 69300, 1030 .hdisplay = 1366, 1031 .hsync_start = 1366 + 48, 1032 .hsync_end = 1366 + 48 + 32, 1033 .htotal = 1366 + 48 + 32 + 10, 1034 .vdisplay = 768, 1035 .vsync_start = 768 + 4, 1036 .vsync_end = 768 + 4 + 6, 1037 .vtotal = 768 + 4 + 6 + 15, 1038 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1039 }; 1040 1041 static const struct panel_desc auo_b116xak01 = { 1042 .modes = &auo_b116xak01_mode, 1043 .num_modes = 1, 1044 .bpc = 6, 1045 .size = { 1046 .width = 256, 1047 .height = 144, 1048 }, 1049 .delay = { 1050 .hpd_absent = 200, 1051 .unprepare = 500, 1052 .enable = 50, 1053 }, 1054 }; 1055 1056 static const struct drm_display_mode auo_b133htn01_mode = { 1057 .clock = 150660, 1058 .hdisplay = 1920, 1059 .hsync_start = 1920 + 172, 1060 .hsync_end = 1920 + 172 + 80, 1061 .htotal = 1920 + 172 + 80 + 60, 1062 .vdisplay = 1080, 1063 .vsync_start = 1080 + 25, 1064 .vsync_end = 1080 + 25 + 10, 1065 .vtotal = 1080 + 25 + 10 + 10, 1066 }; 1067 1068 static const struct panel_desc auo_b133htn01 = { 1069 .modes = &auo_b133htn01_mode, 1070 .num_modes = 1, 1071 .bpc = 6, 1072 .size = { 1073 .width = 293, 1074 .height = 165, 1075 }, 1076 .delay = { 1077 .hpd_reliable = 105, 1078 .enable = 20, 1079 .unprepare = 50, 1080 }, 1081 }; 1082 1083 static const struct drm_display_mode auo_b133xtn01_mode = { 1084 .clock = 69500, 1085 .hdisplay = 1366, 1086 .hsync_start = 1366 + 48, 1087 .hsync_end = 1366 + 48 + 32, 1088 .htotal = 1366 + 48 + 32 + 20, 1089 .vdisplay = 768, 1090 .vsync_start = 768 + 3, 1091 .vsync_end = 768 + 3 + 6, 1092 .vtotal = 768 + 3 + 6 + 13, 1093 }; 1094 1095 static const struct panel_desc auo_b133xtn01 = { 1096 .modes = &auo_b133xtn01_mode, 1097 .num_modes = 1, 1098 .bpc = 6, 1099 .size = { 1100 .width = 293, 1101 .height = 165, 1102 }, 1103 }; 1104 1105 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1106 { 1107 .clock = 71900, 1108 .hdisplay = 1280, 1109 .hsync_start = 1280 + 48, 1110 .hsync_end = 1280 + 48 + 32, 1111 .htotal = 1280 + 48 + 32 + 80, 1112 .vdisplay = 800, 1113 .vsync_start = 800 + 3, 1114 .vsync_end = 800 + 3 + 5, 1115 .vtotal = 800 + 3 + 5 + 24, 1116 }, 1117 { 1118 .clock = 57500, 1119 .hdisplay = 1280, 1120 .hsync_start = 1280 + 48, 1121 .hsync_end = 1280 + 48 + 32, 1122 .htotal = 1280 + 48 + 32 + 80, 1123 .vdisplay = 800, 1124 .vsync_start = 800 + 3, 1125 .vsync_end = 800 + 3 + 5, 1126 .vtotal = 800 + 3 + 5 + 24, 1127 }, 1128 }; 1129 1130 static const struct panel_desc boe_nv101wxmn51 = { 1131 .modes = boe_nv101wxmn51_modes, 1132 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1133 .bpc = 8, 1134 .size = { 1135 .width = 217, 1136 .height = 136, 1137 }, 1138 .delay = { 1139 /* TODO: should be hpd-absent and no-hpd should be set? */ 1140 .hpd_reliable = 210, 1141 .enable = 50, 1142 .unprepare = 160, 1143 }, 1144 }; 1145 1146 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1147 { 1148 .clock = 207800, 1149 .hdisplay = 2160, 1150 .hsync_start = 2160 + 48, 1151 .hsync_end = 2160 + 48 + 32, 1152 .htotal = 2160 + 48 + 32 + 100, 1153 .vdisplay = 1440, 1154 .vsync_start = 1440 + 3, 1155 .vsync_end = 1440 + 3 + 6, 1156 .vtotal = 1440 + 3 + 6 + 31, 1157 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1158 }, 1159 { 1160 .clock = 138500, 1161 .hdisplay = 2160, 1162 .hsync_start = 2160 + 48, 1163 .hsync_end = 2160 + 48 + 32, 1164 .htotal = 2160 + 48 + 32 + 100, 1165 .vdisplay = 1440, 1166 .vsync_start = 1440 + 3, 1167 .vsync_end = 1440 + 3 + 6, 1168 .vtotal = 1440 + 3 + 6 + 31, 1169 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1170 }, 1171 }; 1172 1173 static const struct panel_desc boe_nv110wtm_n61 = { 1174 .modes = boe_nv110wtm_n61_modes, 1175 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1176 .bpc = 8, 1177 .size = { 1178 .width = 233, 1179 .height = 155, 1180 }, 1181 .delay = { 1182 .hpd_absent = 200, 1183 .prepare_to_enable = 80, 1184 .enable = 50, 1185 .unprepare = 500, 1186 }, 1187 }; 1188 1189 /* Also used for boe_nv133fhm_n62 */ 1190 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1191 .clock = 147840, 1192 .hdisplay = 1920, 1193 .hsync_start = 1920 + 48, 1194 .hsync_end = 1920 + 48 + 32, 1195 .htotal = 1920 + 48 + 32 + 200, 1196 .vdisplay = 1080, 1197 .vsync_start = 1080 + 3, 1198 .vsync_end = 1080 + 3 + 6, 1199 .vtotal = 1080 + 3 + 6 + 31, 1200 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1201 }; 1202 1203 /* Also used for boe_nv133fhm_n62 */ 1204 static const struct panel_desc boe_nv133fhm_n61 = { 1205 .modes = &boe_nv133fhm_n61_modes, 1206 .num_modes = 1, 1207 .bpc = 6, 1208 .size = { 1209 .width = 294, 1210 .height = 165, 1211 }, 1212 .delay = { 1213 /* 1214 * When power is first given to the panel there's a short 1215 * spike on the HPD line. It was explained that this spike 1216 * was until the TCON data download was complete. On 1217 * one system this was measured at 8 ms. We'll put 15 ms 1218 * in the prepare delay just to be safe. That means: 1219 * - If HPD isn't hooked up you still have 200 ms delay. 1220 * - If HPD is hooked up we won't try to look at it for the 1221 * first 15 ms. 1222 */ 1223 .hpd_reliable = 15, 1224 .hpd_absent = 200, 1225 1226 .unprepare = 500, 1227 }, 1228 }; 1229 1230 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1231 { 1232 .clock = 148500, 1233 .hdisplay = 1920, 1234 .hsync_start = 1920 + 48, 1235 .hsync_end = 1920 + 48 + 32, 1236 .htotal = 2200, 1237 .vdisplay = 1080, 1238 .vsync_start = 1080 + 3, 1239 .vsync_end = 1080 + 3 + 5, 1240 .vtotal = 1125, 1241 }, 1242 }; 1243 1244 static const struct panel_desc boe_nv140fhmn49 = { 1245 .modes = boe_nv140fhmn49_modes, 1246 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1247 .bpc = 6, 1248 .size = { 1249 .width = 309, 1250 .height = 174, 1251 }, 1252 .delay = { 1253 /* TODO: should be hpd-absent and no-hpd should be set? */ 1254 .hpd_reliable = 210, 1255 .enable = 50, 1256 .unprepare = 160, 1257 }, 1258 }; 1259 1260 static const struct drm_display_mode friendlyarm_hd702e_mode = { 1261 .clock = 67185, 1262 .hdisplay = 800, 1263 .hsync_start = 800 + 20, 1264 .hsync_end = 800 + 20 + 24, 1265 .htotal = 800 + 20 + 24 + 20, 1266 .vdisplay = 1280, 1267 .vsync_start = 1280 + 4, 1268 .vsync_end = 1280 + 4 + 8, 1269 .vtotal = 1280 + 4 + 8 + 4, 1270 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1271 }; 1272 1273 static const struct panel_desc friendlyarm_hd702e = { 1274 .modes = &friendlyarm_hd702e_mode, 1275 .num_modes = 1, 1276 .bpc = 8, 1277 .size = { 1278 .width = 94, 1279 .height = 151, 1280 }, 1281 }; 1282 1283 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1284 .clock = 76420, 1285 .hdisplay = 1366, 1286 .hsync_start = 1366 + 136, 1287 .hsync_end = 1366 + 136 + 30, 1288 .htotal = 1366 + 136 + 30 + 60, 1289 .vdisplay = 768, 1290 .vsync_start = 768 + 8, 1291 .vsync_end = 768 + 8 + 12, 1292 .vtotal = 768 + 8 + 12 + 12, 1293 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1294 }; 1295 1296 static const struct panel_desc innolux_n116bca_ea1 = { 1297 .modes = &innolux_n116bca_ea1_mode, 1298 .num_modes = 1, 1299 .bpc = 6, 1300 .size = { 1301 .width = 256, 1302 .height = 144, 1303 }, 1304 .delay = { 1305 .hpd_absent = 200, 1306 .enable = 80, 1307 .disable = 50, 1308 .unprepare = 500, 1309 }, 1310 }; 1311 1312 /* 1313 * Datasheet specifies that at 60 Hz refresh rate: 1314 * - total horizontal time: { 1506, 1592, 1716 } 1315 * - total vertical time: { 788, 800, 868 } 1316 * 1317 * ...but doesn't go into exactly how that should be split into a front 1318 * porch, back porch, or sync length. For now we'll leave a single setting 1319 * here which allows a bit of tweaking of the pixel clock at the expense of 1320 * refresh rate. 1321 */ 1322 static const struct display_timing innolux_n116bge_timing = { 1323 .pixelclock = { 72600000, 76420000, 80240000 }, 1324 .hactive = { 1366, 1366, 1366 }, 1325 .hfront_porch = { 136, 136, 136 }, 1326 .hback_porch = { 60, 60, 60 }, 1327 .hsync_len = { 30, 30, 30 }, 1328 .vactive = { 768, 768, 768 }, 1329 .vfront_porch = { 8, 8, 8 }, 1330 .vback_porch = { 12, 12, 12 }, 1331 .vsync_len = { 12, 12, 12 }, 1332 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1333 }; 1334 1335 static const struct panel_desc innolux_n116bge = { 1336 .timings = &innolux_n116bge_timing, 1337 .num_timings = 1, 1338 .bpc = 6, 1339 .size = { 1340 .width = 256, 1341 .height = 144, 1342 }, 1343 }; 1344 1345 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1346 .clock = 162000, 1347 .hdisplay = 1920, 1348 .hsync_start = 1920 + 40, 1349 .hsync_end = 1920 + 40 + 40, 1350 .htotal = 1920 + 40 + 40 + 80, 1351 .vdisplay = 1080, 1352 .vsync_start = 1080 + 4, 1353 .vsync_end = 1080 + 4 + 4, 1354 .vtotal = 1080 + 4 + 4 + 24, 1355 }; 1356 1357 static const struct panel_desc innolux_n125hce_gn1 = { 1358 .modes = &innolux_n125hce_gn1_mode, 1359 .num_modes = 1, 1360 .bpc = 8, 1361 .size = { 1362 .width = 276, 1363 .height = 155, 1364 }, 1365 }; 1366 1367 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1368 .clock = 206016, 1369 .hdisplay = 2160, 1370 .hsync_start = 2160 + 48, 1371 .hsync_end = 2160 + 48 + 32, 1372 .htotal = 2160 + 48 + 32 + 80, 1373 .vdisplay = 1440, 1374 .vsync_start = 1440 + 3, 1375 .vsync_end = 1440 + 3 + 10, 1376 .vtotal = 1440 + 3 + 10 + 27, 1377 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1378 }; 1379 1380 static const struct panel_desc innolux_p120zdg_bf1 = { 1381 .modes = &innolux_p120zdg_bf1_mode, 1382 .num_modes = 1, 1383 .bpc = 8, 1384 .size = { 1385 .width = 254, 1386 .height = 169, 1387 }, 1388 .delay = { 1389 .hpd_absent = 200, 1390 .unprepare = 500, 1391 }, 1392 }; 1393 1394 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1395 .clock = 81000, 1396 .hdisplay = 1366, 1397 .hsync_start = 1366 + 40, 1398 .hsync_end = 1366 + 40 + 32, 1399 .htotal = 1366 + 40 + 32 + 62, 1400 .vdisplay = 768, 1401 .vsync_start = 768 + 5, 1402 .vsync_end = 768 + 5 + 5, 1403 .vtotal = 768 + 5 + 5 + 122, 1404 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1405 }; 1406 1407 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1408 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1409 .num_modes = 1, 1410 .bpc = 6, 1411 .size = { 1412 .width = 256, 1413 .height = 144, 1414 }, 1415 .delay = { 1416 .hpd_absent = 200, 1417 }, 1418 }; 1419 1420 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1421 .clock = 200000, 1422 .hdisplay = 1536, 1423 .hsync_start = 1536 + 12, 1424 .hsync_end = 1536 + 12 + 16, 1425 .htotal = 1536 + 12 + 16 + 48, 1426 .vdisplay = 2048, 1427 .vsync_start = 2048 + 8, 1428 .vsync_end = 2048 + 8 + 4, 1429 .vtotal = 2048 + 8 + 4 + 8, 1430 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1431 }; 1432 1433 static const struct panel_desc lg_lp079qx1_sp0v = { 1434 .modes = &lg_lp079qx1_sp0v_mode, 1435 .num_modes = 1, 1436 .size = { 1437 .width = 129, 1438 .height = 171, 1439 }, 1440 }; 1441 1442 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1443 .clock = 205210, 1444 .hdisplay = 2048, 1445 .hsync_start = 2048 + 150, 1446 .hsync_end = 2048 + 150 + 5, 1447 .htotal = 2048 + 150 + 5 + 5, 1448 .vdisplay = 1536, 1449 .vsync_start = 1536 + 3, 1450 .vsync_end = 1536 + 3 + 1, 1451 .vtotal = 1536 + 3 + 1 + 9, 1452 }; 1453 1454 static const struct panel_desc lg_lp097qx1_spa1 = { 1455 .modes = &lg_lp097qx1_spa1_mode, 1456 .num_modes = 1, 1457 .size = { 1458 .width = 208, 1459 .height = 147, 1460 }, 1461 }; 1462 1463 static const struct drm_display_mode lg_lp120up1_mode = { 1464 .clock = 162300, 1465 .hdisplay = 1920, 1466 .hsync_start = 1920 + 40, 1467 .hsync_end = 1920 + 40 + 40, 1468 .htotal = 1920 + 40 + 40 + 80, 1469 .vdisplay = 1280, 1470 .vsync_start = 1280 + 4, 1471 .vsync_end = 1280 + 4 + 4, 1472 .vtotal = 1280 + 4 + 4 + 12, 1473 }; 1474 1475 static const struct panel_desc lg_lp120up1 = { 1476 .modes = &lg_lp120up1_mode, 1477 .num_modes = 1, 1478 .bpc = 8, 1479 .size = { 1480 .width = 267, 1481 .height = 183, 1482 }, 1483 }; 1484 1485 static const struct drm_display_mode lg_lp129qe_mode = { 1486 .clock = 285250, 1487 .hdisplay = 2560, 1488 .hsync_start = 2560 + 48, 1489 .hsync_end = 2560 + 48 + 32, 1490 .htotal = 2560 + 48 + 32 + 80, 1491 .vdisplay = 1700, 1492 .vsync_start = 1700 + 3, 1493 .vsync_end = 1700 + 3 + 10, 1494 .vtotal = 1700 + 3 + 10 + 36, 1495 }; 1496 1497 static const struct panel_desc lg_lp129qe = { 1498 .modes = &lg_lp129qe_mode, 1499 .num_modes = 1, 1500 .bpc = 8, 1501 .size = { 1502 .width = 272, 1503 .height = 181, 1504 }, 1505 }; 1506 1507 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1508 { 1509 .clock = 138500, 1510 .hdisplay = 1920, 1511 .hsync_start = 1920 + 48, 1512 .hsync_end = 1920 + 48 + 32, 1513 .htotal = 1920 + 48 + 32 + 80, 1514 .vdisplay = 1080, 1515 .vsync_start = 1080 + 3, 1516 .vsync_end = 1080 + 3 + 5, 1517 .vtotal = 1080 + 3 + 5 + 23, 1518 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1519 }, { 1520 .clock = 110920, 1521 .hdisplay = 1920, 1522 .hsync_start = 1920 + 48, 1523 .hsync_end = 1920 + 48 + 32, 1524 .htotal = 1920 + 48 + 32 + 80, 1525 .vdisplay = 1080, 1526 .vsync_start = 1080 + 3, 1527 .vsync_end = 1080 + 3 + 5, 1528 .vtotal = 1080 + 3 + 5 + 23, 1529 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1530 } 1531 }; 1532 1533 static const struct panel_desc neweast_wjfh116008a = { 1534 .modes = neweast_wjfh116008a_modes, 1535 .num_modes = 2, 1536 .bpc = 6, 1537 .size = { 1538 .width = 260, 1539 .height = 150, 1540 }, 1541 .delay = { 1542 .hpd_reliable = 110, 1543 .enable = 20, 1544 .unprepare = 500, 1545 }, 1546 }; 1547 1548 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1549 .clock = 271560, 1550 .hdisplay = 2560, 1551 .hsync_start = 2560 + 48, 1552 .hsync_end = 2560 + 48 + 32, 1553 .htotal = 2560 + 48 + 32 + 80, 1554 .vdisplay = 1600, 1555 .vsync_start = 1600 + 2, 1556 .vsync_end = 1600 + 2 + 5, 1557 .vtotal = 1600 + 2 + 5 + 57, 1558 }; 1559 1560 static const struct panel_desc samsung_lsn122dl01_c01 = { 1561 .modes = &samsung_lsn122dl01_c01_mode, 1562 .num_modes = 1, 1563 .size = { 1564 .width = 263, 1565 .height = 164, 1566 }, 1567 }; 1568 1569 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1570 .clock = 76300, 1571 .hdisplay = 1366, 1572 .hsync_start = 1366 + 64, 1573 .hsync_end = 1366 + 64 + 48, 1574 .htotal = 1366 + 64 + 48 + 128, 1575 .vdisplay = 768, 1576 .vsync_start = 768 + 2, 1577 .vsync_end = 768 + 2 + 5, 1578 .vtotal = 768 + 2 + 5 + 17, 1579 }; 1580 1581 static const struct panel_desc samsung_ltn140at29_301 = { 1582 .modes = &samsung_ltn140at29_301_mode, 1583 .num_modes = 1, 1584 .bpc = 6, 1585 .size = { 1586 .width = 320, 1587 .height = 187, 1588 }, 1589 }; 1590 1591 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1592 .clock = 168480, 1593 .hdisplay = 1920, 1594 .hsync_start = 1920 + 48, 1595 .hsync_end = 1920 + 48 + 32, 1596 .htotal = 1920 + 48 + 32 + 80, 1597 .vdisplay = 1280, 1598 .vsync_start = 1280 + 3, 1599 .vsync_end = 1280 + 3 + 10, 1600 .vtotal = 1280 + 3 + 10 + 57, 1601 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1602 }; 1603 1604 static const struct panel_desc sharp_ld_d5116z01b = { 1605 .modes = &sharp_ld_d5116z01b_mode, 1606 .num_modes = 1, 1607 .bpc = 8, 1608 .size = { 1609 .width = 260, 1610 .height = 120, 1611 }, 1612 }; 1613 1614 static const struct display_timing sharp_lq123p1jx31_timing = { 1615 .pixelclock = { 252750000, 252750000, 266604720 }, 1616 .hactive = { 2400, 2400, 2400 }, 1617 .hfront_porch = { 48, 48, 48 }, 1618 .hback_porch = { 80, 80, 84 }, 1619 .hsync_len = { 32, 32, 32 }, 1620 .vactive = { 1600, 1600, 1600 }, 1621 .vfront_porch = { 3, 3, 3 }, 1622 .vback_porch = { 33, 33, 120 }, 1623 .vsync_len = { 10, 10, 10 }, 1624 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1625 }; 1626 1627 static const struct panel_desc sharp_lq123p1jx31 = { 1628 .timings = &sharp_lq123p1jx31_timing, 1629 .num_timings = 1, 1630 .bpc = 8, 1631 .size = { 1632 .width = 259, 1633 .height = 173, 1634 }, 1635 .delay = { 1636 .hpd_reliable = 110, 1637 .enable = 50, 1638 .unprepare = 550, 1639 }, 1640 }; 1641 1642 static const struct of_device_id platform_of_match[] = { 1643 { 1644 /* Must be first */ 1645 .compatible = "edp-panel", 1646 }, 1647 /* 1648 * Do not add panels to the list below unless they cannot be handled by 1649 * the generic edp-panel compatible. 1650 * 1651 * The only two valid reasons are: 1652 * - Because of the panel issues (e.g. broken EDID or broken 1653 * identification). 1654 * - Because the eDP drivers didn't wire up the AUX bus properly. 1655 * NOTE that, though this is a marginally valid reason, 1656 * some justification needs to be made for why the platform can't 1657 * wire up the AUX bus properly. 1658 * 1659 * In all other cases the platform should use the aux-bus and declare 1660 * the panel using the 'edp-panel' compatible as a device on the AUX 1661 * bus. 1662 */ 1663 { 1664 .compatible = "auo,b101ean01", 1665 .data = &auo_b101ean01, 1666 }, { 1667 .compatible = "auo,b116xa01", 1668 .data = &auo_b116xak01, 1669 }, { 1670 .compatible = "auo,b133htn01", 1671 .data = &auo_b133htn01, 1672 }, { 1673 .compatible = "auo,b133xtn01", 1674 .data = &auo_b133xtn01, 1675 }, { 1676 .compatible = "boe,nv101wxmn51", 1677 .data = &boe_nv101wxmn51, 1678 }, { 1679 .compatible = "boe,nv110wtm-n61", 1680 .data = &boe_nv110wtm_n61, 1681 }, { 1682 .compatible = "boe,nv133fhm-n61", 1683 .data = &boe_nv133fhm_n61, 1684 }, { 1685 .compatible = "boe,nv133fhm-n62", 1686 .data = &boe_nv133fhm_n61, 1687 }, { 1688 .compatible = "boe,nv140fhmn49", 1689 .data = &boe_nv140fhmn49, 1690 }, { 1691 .compatible = "friendlyarm,hd702e", 1692 .data = &friendlyarm_hd702e, 1693 }, { 1694 .compatible = "innolux,n116bca-ea1", 1695 .data = &innolux_n116bca_ea1, 1696 }, { 1697 .compatible = "innolux,n116bge", 1698 .data = &innolux_n116bge, 1699 }, { 1700 .compatible = "innolux,n125hce-gn1", 1701 .data = &innolux_n125hce_gn1, 1702 }, { 1703 .compatible = "innolux,p120zdg-bf1", 1704 .data = &innolux_p120zdg_bf1, 1705 }, { 1706 .compatible = "kingdisplay,kd116n21-30nv-a010", 1707 .data = &kingdisplay_kd116n21_30nv_a010, 1708 }, { 1709 .compatible = "lg,lp079qx1-sp0v", 1710 .data = &lg_lp079qx1_sp0v, 1711 }, { 1712 .compatible = "lg,lp097qx1-spa1", 1713 .data = &lg_lp097qx1_spa1, 1714 }, { 1715 .compatible = "lg,lp120up1", 1716 .data = &lg_lp120up1, 1717 }, { 1718 .compatible = "lg,lp129qe", 1719 .data = &lg_lp129qe, 1720 }, { 1721 .compatible = "neweast,wjfh116008a", 1722 .data = &neweast_wjfh116008a, 1723 }, { 1724 .compatible = "samsung,lsn122dl01-c01", 1725 .data = &samsung_lsn122dl01_c01, 1726 }, { 1727 .compatible = "samsung,ltn140at29-301", 1728 .data = &samsung_ltn140at29_301, 1729 }, { 1730 .compatible = "sharp,ld-d5116z01b", 1731 .data = &sharp_ld_d5116z01b, 1732 }, { 1733 .compatible = "sharp,lq123p1jx31", 1734 .data = &sharp_lq123p1jx31, 1735 }, { 1736 /* sentinel */ 1737 } 1738 }; 1739 MODULE_DEVICE_TABLE(of, platform_of_match); 1740 1741 static const struct panel_delay delay_200_500_p2e80 = { 1742 .hpd_absent = 200, 1743 .unprepare = 500, 1744 .prepare_to_enable = 80, 1745 }; 1746 1747 static const struct panel_delay delay_200_500_e50_p2e80 = { 1748 .hpd_absent = 200, 1749 .unprepare = 500, 1750 .enable = 50, 1751 .prepare_to_enable = 80, 1752 }; 1753 1754 static const struct panel_delay delay_200_500_p2e100 = { 1755 .hpd_absent = 200, 1756 .unprepare = 500, 1757 .prepare_to_enable = 100, 1758 }; 1759 1760 static const struct panel_delay delay_200_500_p2e200 = { 1761 .hpd_absent = 200, 1762 .unprepare = 500, 1763 .prepare_to_enable = 200, 1764 }; 1765 1766 static const struct panel_delay delay_200_500_e50 = { 1767 .hpd_absent = 200, 1768 .unprepare = 500, 1769 .enable = 50, 1770 }; 1771 1772 static const struct panel_delay delay_200_500_e50_d50_p2e200 = { 1773 .hpd_absent = 200, 1774 .unprepare = 500, 1775 .enable = 50, 1776 .disable = 50, 1777 .prepare_to_enable = 200, 1778 }; 1779 1780 static const struct panel_delay delay_200_500_e80 = { 1781 .hpd_absent = 200, 1782 .unprepare = 500, 1783 .enable = 80, 1784 }; 1785 1786 static const struct panel_delay delay_200_500_e80_d50 = { 1787 .hpd_absent = 200, 1788 .unprepare = 500, 1789 .enable = 80, 1790 .disable = 50, 1791 }; 1792 1793 static const struct panel_delay delay_80_500_e50 = { 1794 .hpd_absent = 80, 1795 .unprepare = 500, 1796 .enable = 50, 1797 }; 1798 1799 static const struct panel_delay delay_80_500_e80_p2e200 = { 1800 .hpd_absent = 80, 1801 .unprepare = 500, 1802 .enable = 80, 1803 .prepare_to_enable = 200, 1804 }; 1805 1806 static const struct panel_delay delay_100_500_e200 = { 1807 .hpd_absent = 100, 1808 .unprepare = 500, 1809 .enable = 200, 1810 }; 1811 1812 static const struct panel_delay delay_200_500_e200 = { 1813 .hpd_absent = 200, 1814 .unprepare = 500, 1815 .enable = 200, 1816 }; 1817 1818 static const struct panel_delay delay_200_500_e200_d100 = { 1819 .hpd_absent = 200, 1820 .unprepare = 500, 1821 .enable = 200, 1822 .disable = 100, 1823 }; 1824 1825 static const struct panel_delay delay_200_500_e200_d200 = { 1826 .hpd_absent = 200, 1827 .unprepare = 500, 1828 .enable = 200, 1829 .disable = 200, 1830 }; 1831 1832 static const struct panel_delay delay_200_500_e200_d10 = { 1833 .hpd_absent = 200, 1834 .unprepare = 500, 1835 .enable = 200, 1836 .disable = 10, 1837 }; 1838 1839 static const struct panel_delay delay_200_500_e200_d50 = { 1840 .hpd_absent = 200, 1841 .unprepare = 500, 1842 .enable = 200, 1843 .disable = 50, 1844 }; 1845 1846 static const struct panel_delay delay_200_150_e200 = { 1847 .hpd_absent = 200, 1848 .unprepare = 150, 1849 .enable = 200, 1850 }; 1851 1852 static const struct panel_delay delay_200_500_e50_po2e200 = { 1853 .hpd_absent = 200, 1854 .unprepare = 500, 1855 .enable = 50, 1856 .powered_on_to_enable = 200, 1857 }; 1858 1859 static const struct panel_delay delay_200_500_e50_po2e200_d100 = { 1860 .hpd_absent = 200, 1861 .unprepare = 500, 1862 .enable = 50, 1863 .powered_on_to_enable = 200, 1864 .disable = 100, 1865 }; 1866 1867 static const struct panel_delay delay_200_150_e50 = { 1868 .hpd_absent = 200, 1869 .unprepare = 150, 1870 .enable = 50, 1871 }; 1872 1873 static const struct panel_delay delay_200_500_e250 = { 1874 .hpd_absent = 200, 1875 .unprepare = 500, 1876 .enable = 250, 1877 }; 1878 1879 static const struct panel_delay delay_50_500_e200_d200_po2e335 = { 1880 .hpd_absent = 50, 1881 .unprepare = 500, 1882 .enable = 200, 1883 .disable = 200, 1884 .powered_on_to_enable = 335, 1885 }; 1886 1887 static const struct panel_delay delay_200_500_e50_d100 = { 1888 .hpd_absent = 200, 1889 .unprepare = 500, 1890 .enable = 50, 1891 .disable = 100, 1892 }; 1893 1894 static const struct panel_delay delay_80_500_e50_d50 = { 1895 .hpd_absent = 80, 1896 .unprepare = 500, 1897 .enable = 50, 1898 .disable = 50, 1899 }; 1900 1901 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1902 { \ 1903 .ident = { \ 1904 .name = _name, \ 1905 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1906 product_id), \ 1907 }, \ 1908 .delay = _delay \ 1909 } 1910 1911 #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1912 { \ 1913 .ident = { \ 1914 .name = _name, \ 1915 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1916 product_id), \ 1917 }, \ 1918 .delay = _delay, \ 1919 .override_edid_mode = _mode \ 1920 } 1921 1922 /* 1923 * This table is used to figure out power sequencing delays for panels that 1924 * are detected by EDID. Entries here may point to entries in the 1925 * platform_of_match table (if a panel is listed in both places). 1926 * 1927 * Sort first by vendor, then by product ID. 1928 */ 1929 static const struct edp_panel_entry edp_panels[] = { 1930 EDP_PANEL_ENTRY('A', 'U', 'O', 0x0290, &delay_200_500_e50, "B140XTN07.5"), 1931 EDP_PANEL_ENTRY('A', 'U', 'O', 0x04a4, &delay_200_500_e50, "B122UAN01.0"), 1932 EDP_PANEL_ENTRY('A', 'U', 'O', 0x0ba4, &delay_200_500_e50, "B140QAX01.H"), 1933 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), 1934 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1935 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), 1936 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1937 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"), 1938 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1939 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"), 1940 EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"), 1941 EDP_PANEL_ENTRY('A', 'U', 'O', 0x205c, &delay_200_500_e50, "B116XAN02.0"), 1942 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"), 1943 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1944 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"), 1945 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"), 1946 EDP_PANEL_ENTRY('A', 'U', 'O', 0x29c0, &delay_200_500_e50, "B116XAT04.3"), 1947 EDP_PANEL_ENTRY('A', 'U', 'O', 0x30ed, &delay_200_500_e50, "G156HAN03.0"), 1948 EDP_PANEL_ENTRY('A', 'U', 'O', 0x3c9f, &delay_200_500_e50, "B140HAK03.5"), 1949 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), 1950 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"), 1951 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0", 1952 &auo_b116xa3_mode), 1953 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), 1954 EDP_PANEL_ENTRY('A', 'U', 'O', 0x49ba, &delay_200_500_e50, "B116XTN02.3"), 1955 EDP_PANEL_ENTRY('A', 'U', 'O', 0x52b0, &delay_200_500_e50, "B116XAK02.0"), 1956 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1957 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1958 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), 1959 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), 1960 EDP_PANEL_ENTRY('A', 'U', 'O', 0x643d, &delay_200_500_e50, "B140HAN06.4"), 1961 EDP_PANEL_ENTRY('A', 'U', 'O', 0x67a8, &delay_200_500_e50, "B140XTK02.4"), 1962 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), 1963 EDP_PANEL_ENTRY('A', 'U', 'O', 0x73aa, &delay_200_500_e50, "B116XTN02.3"), 1964 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 1965 EDP_PANEL_ENTRY('A', 'U', 'O', 0x89ba, &delay_200_500_e50, "B116XAT04.1"), 1966 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8bba, &delay_200_500_e50, "B140UAN08.5"), 1967 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa199, &delay_200_500_e50, "B116XAN06.1"), 1968 EDP_PANEL_ENTRY('A', 'U', 'O', 0xa7b3, &delay_200_500_e50, "B140UAN04.4"), 1969 EDP_PANEL_ENTRY('A', 'U', 'O', 0xb7a9, &delay_200_500_e50, "B140HAK03.3"), 1970 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc4b4, &delay_200_500_e50, "B116XAT04.1"), 1971 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc7ad, &delay_200_500_e50, "B140HAN07.7"), 1972 EDP_PANEL_ENTRY('A', 'U', 'O', 0xc9a8, &delay_200_500_e50, "B140QAN08.H"), 1973 EDP_PANEL_ENTRY('A', 'U', 'O', 0xcb8f, &delay_200_500_e50, "B133HAN06.6"), 1974 EDP_PANEL_ENTRY('A', 'U', 'O', 0xcdba, &delay_200_500_e50, "B140UAX01.2"), 1975 EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"), 1976 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), 1977 1978 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), 1979 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"), 1980 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1"), 1981 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0"), 1982 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), 1983 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), 1984 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), 1985 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), 1986 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"), 1987 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"), 1988 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"), 1989 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"), 1990 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), 1991 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), 1992 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), 1993 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"), 1994 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), 1995 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 1996 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), 1997 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21"), 1998 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 1999 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), 2000 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"), 2001 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), 2002 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), 2003 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"), 2004 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 2005 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), 2006 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"), 2007 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), 2008 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), 2009 EDP_PANEL_ENTRY('B', 'O', 'E', 0x090d, &delay_200_500_e50, "NT140WHM-N4T"), 2010 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 2011 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 2012 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"), 2013 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 2014 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0964, &delay_200_500_e50, "NV133WUM-N61"), 2015 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"), 2016 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 2017 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0985, &delay_200_500_e50, "NE160QDM-NY1"), 2018 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 2019 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"), 2020 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"), 2021 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"), 2022 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 2023 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a1b, &delay_200_500_e50, "NV133WUM-N63"), 2024 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a25, &delay_200_500_e50_po2e200, "NV133FHM-N4F V8.0"), 2025 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), 2026 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80_d50, "NV116WHM-N49"), 2027 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 2028 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a6a, &delay_200_500_e80, "NV140WUM-N44"), 2029 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a84, &delay_200_500_e50, "NV133WUM-T01"), 2030 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 2031 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41"), 2032 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b09, &delay_200_500_e50_po2e200, "NV140FHM-NZ"), 2033 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b1e, &delay_200_500_e80, "NE140QDM-N6A"), 2034 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80_d50, "NV122WUM-N41"), 2035 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"), 2036 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"), 2037 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b66, &delay_200_500_e80, "NE140WUM-N6G"), 2038 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b85, &delay_200_500_e50, "NT140WHM-T05"), 2039 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"), 2040 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c26, &delay_200_500_p2e200, "NV140WUM-T08"), 2041 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c6f, &delay_200_500_e50, "NV140FHM-N40"), 2042 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c93, &delay_200_500_e200, "Unknown"), 2043 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"), 2044 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cc9, &delay_200_500_e50, "NE120DRM-N28"), 2045 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf2, &delay_200_500_e200, "NV156FHM-N4S"), 2046 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cf6, &delay_200_500_e200_d100, "NV140WUM-N64"), 2047 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cfa, &delay_200_500_e50, "NV116WHM-A4D"), 2048 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d45, &delay_200_500_e80, "NV116WHM-N4B"), 2049 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d73, &delay_200_500_e80, "NE140WUM-N6S"), 2050 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0d98, &delay_200_500_e50_po2e200_d100, "NV140FHM-N5B"), 2051 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0db3, &delay_200_500_e80, "NV153WUM-N42"), 2052 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ddf, &delay_200_500_e80, "NV116WHM-T01"), 2053 EDP_PANEL_ENTRY('B', 'O', 'E', 0x386e, &delay_200_500_e80, "NV116WH2-M30"), 2054 EDP_PANEL_ENTRY('B', 'O', 'E', 0x3879, &delay_200_500_e80, "NT116WHM-N21"), 2055 EDP_PANEL_ENTRY('B', 'O', 'E', 0x388b, &delay_200_500_e80, "NV116FH1-M31"), 2056 EDP_PANEL_ENTRY('B', 'O', 'E', 0x388c, &delay_200_500_e80, "NV116FH1-M30"), 2057 2058 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), 2059 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"), 2060 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"), 2061 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 2062 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), 2063 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"), 2064 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), 2065 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 2066 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 2067 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 2068 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 2069 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), 2070 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"), 2071 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"), 2072 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115d, &delay_200_500_e80_d50, "N116BCA-EA2"), 2073 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"), 2074 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115f, &delay_200_500_e80_d50, "N116BCL-EAK"), 2075 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2076 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1161, &delay_200_500_e80, "N116BCP-EA2"), 2077 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1163, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2078 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1169, &delay_200_500_e80_d50, "N116BCN-EA1"), 2079 EDP_PANEL_ENTRY('C', 'M', 'N', 0x116d, &delay_200_500_e80_d50, "N116BCP-EA2"), 2080 EDP_PANEL_ENTRY('C', 'M', 'N', 0x117a, &delay_200_500_e80_d50, "N116BCL-EAK"), 2081 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 2082 EDP_PANEL_ENTRY('C', 'M', 'N', 0x124c, &delay_200_500_e80_d50, "N122JCA-ENK"), 2083 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"), 2084 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"), 2085 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1441, &delay_200_500_e80_d50, "N140JCA-ELK"), 2086 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"), 2087 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), 2088 EDP_PANEL_ENTRY('C', 'M', 'N', 0x148f, &delay_200_500_e80, "N140HCA-EAC"), 2089 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14a8, &delay_200_500_e80, "N140JCA-ELP"), 2090 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14c7, &delay_200_500_e80, "N140HCA-EEK"), 2091 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 2092 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80, "N140BGA-E54"), 2093 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"), 2094 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1565, &delay_200_500_e80, "N156HCA-EAB"), 2095 EDP_PANEL_ENTRY('C', 'M', 'N', 0x156b, &delay_200_500_e80_d50, "N153JCA-ELK"), 2096 EDP_PANEL_ENTRY('C', 'M', 'N', 0x162b, &delay_200_500_e80_d50, "N160JCE-ELL"), 2097 EDP_PANEL_ENTRY('C', 'M', 'N', 0x7402, &delay_200_500_e200_d50, "N116BCA-EAK"), 2098 2099 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_d50_p2e200, "MNC207QS1-1"), 2100 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1413, &delay_200_500_e50_d50_p2e200, "MNE007JA1-2"), 2101 2102 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"), 2103 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1103, &delay_200_500_e80_d50, "MNB601LS1-3"), 2104 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1104, &delay_200_500_e50_d100, "MNB601LS1-4"), 2105 EDP_PANEL_ENTRY('C', 'S', 'W', 0x110a, &delay_200_500_e50, "PNB601LS1-2"), 2106 EDP_PANEL_ENTRY('C', 'S', 'W', 0x110d, &delay_200_500_e50, "MNB601LS1-8"), 2107 EDP_PANEL_ENTRY('C', 'S', 'W', 0x143f, &delay_200_500_e50, "MNE007QS3-6"), 2108 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1448, &delay_200_500_e50, "MNE007QS3-7"), 2109 EDP_PANEL_ENTRY('C', 'S', 'W', 0x144b, &delay_200_500_e80, "MNE001BS1-4"), 2110 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1457, &delay_80_500_e80_p2e200, "MNE007QS3-8"), 2111 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1462, &delay_200_500_e50, "MNE007QS5-2"), 2112 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1468, &delay_200_500_e50, "MNE007QB2-2"), 2113 EDP_PANEL_ENTRY('C', 'S', 'W', 0x146e, &delay_80_500_e50_d50, "MNE007QB3-1"), 2114 EDP_PANEL_ENTRY('C', 'S', 'W', 0x147c, &delay_200_500_e50_d100, "MNE007QB3-1"), 2115 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1486, &delay_200_500_e50_d100, "MNE001BS6-2"), 2116 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1519, &delay_200_500_e80_d50, "MNF601BS1-3"), 2117 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1529, &delay_200_500_e80_d50, "MNF307QS3-2"), 2118 EDP_PANEL_ENTRY('C', 'S', 'W', 0x153f, &delay_200_500_e200_d50, "MNF601BS4-1"), 2119 2120 EDP_PANEL_ENTRY('E', 'T', 'C', 0x0000, &delay_50_500_e200_d200_po2e335, "LP079QX1-SP0V"), 2121 2122 EDP_PANEL_ENTRY('H', 'K', 'C', 0x1203, &delay_200_500_e80, "MB116AS01'3"), 2123 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), 2124 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "MB116AN01"), 2125 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"), 2126 2127 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"), 2128 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 2129 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 2130 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 2131 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"), 2132 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8cd5, &delay_200_500_e200_d10, "M140NWFQ R5"), 2133 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8ce6, &delay_200_500_e200, "R140NWFW R0"), 2134 2135 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), 2136 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 2137 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"), 2138 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 2139 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16"), 2140 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1707, &delay_200_150_e50, "KD116N2130B12"), 2141 2142 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0110, &delay_200_500_e50, "KD116N3730A07"), 2143 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0397, &delay_200_500_e50, "KD116N3730A12"), 2144 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"), 2145 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"), 2146 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), 2147 EDP_PANEL_ENTRY('K', 'D', 'C', 0x1220, &delay_200_500_e50, "KD116N3730A05"), 2148 2149 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"), 2150 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"), 2151 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"), 2152 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"), 2153 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"), 2154 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"), 2155 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"), 2156 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"), 2157 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"), 2158 EDP_PANEL_ENTRY('L', 'G', 'D', 0x06b2, &delay_200_500_e200_d200, "LP129WT232166"), 2159 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0778, &delay_200_500_e200_d200, "134WT1"), 2160 EDP_PANEL_ENTRY('L', 'G', 'D', 0x07fe, &delay_200_500_e200_d200, "LP116WHA-SPB1"), 2161 2162 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 2163 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &delay_80_500_e50, "LQ140M1JW46"), 2164 EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"), 2165 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 2166 EDP_PANEL_ENTRY('S', 'H', 'P', 0x158f, &delay_200_500_p2e100, "LQ134Z1"), 2167 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1593, &delay_200_500_p2e100, "LQ134N1"), 2168 2169 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0004, &delay_200_500_e200, "116KHD024006"), 2170 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0009, &delay_200_500_e250, "116QHD024002"), 2171 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 2172 2173 EDP_PANEL_ENTRY('T', 'M', 'A', 0x0811, &delay_200_500_e80_d50, "TM140VDXP01-04"), 2174 EDP_PANEL_ENTRY('T', 'M', 'A', 0x2094, &delay_200_500_e50_d100, "TL140VDMS03-01"), 2175 EDP_PANEL_ENTRY('T', 'M', 'A', 0x2139, &delay_200_500_e50_d100, "TM156VDXP25"), 2176 2177 { /* sentinal */ } 2178 }; 2179 2180 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid) 2181 { 2182 const struct edp_panel_entry *panel; 2183 2184 if (!panel_id) 2185 return NULL; 2186 2187 /* 2188 * Match with identity first. This allows handling the case where 2189 * vendors incorrectly reused the same panel ID for multiple panels that 2190 * need different settings. If there's no match, try again with panel 2191 * ID, which should be unique. 2192 */ 2193 for (panel = edp_panels; panel->ident.panel_id; panel++) 2194 if (drm_edid_match(edid, &panel->ident)) 2195 return panel; 2196 2197 for (panel = edp_panels; panel->ident.panel_id; panel++) 2198 if (panel->ident.panel_id == panel_id) 2199 return panel; 2200 2201 return NULL; 2202 } 2203 2204 static int panel_edp_platform_probe(struct platform_device *pdev) 2205 { 2206 const struct of_device_id *id; 2207 2208 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 2209 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 2210 if (!id) 2211 return -ENODEV; 2212 2213 return panel_edp_probe(&pdev->dev, id->data, NULL); 2214 } 2215 2216 static void panel_edp_platform_remove(struct platform_device *pdev) 2217 { 2218 panel_edp_remove(&pdev->dev); 2219 } 2220 2221 static void panel_edp_platform_shutdown(struct platform_device *pdev) 2222 { 2223 panel_edp_shutdown(&pdev->dev); 2224 } 2225 2226 static const struct dev_pm_ops panel_edp_pm_ops = { 2227 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 2228 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 2229 pm_runtime_force_resume) 2230 }; 2231 2232 static struct platform_driver panel_edp_platform_driver = { 2233 .driver = { 2234 .name = "panel-edp", 2235 .of_match_table = platform_of_match, 2236 .pm = &panel_edp_pm_ops, 2237 }, 2238 .probe = panel_edp_platform_probe, 2239 .remove = panel_edp_platform_remove, 2240 .shutdown = panel_edp_platform_shutdown, 2241 }; 2242 2243 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 2244 { 2245 const struct of_device_id *id; 2246 2247 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 2248 if (!id) 2249 return -ENODEV; 2250 2251 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 2252 } 2253 2254 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 2255 { 2256 panel_edp_remove(&aux_ep->dev); 2257 } 2258 2259 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 2260 { 2261 panel_edp_shutdown(&aux_ep->dev); 2262 } 2263 2264 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2265 .driver = { 2266 .name = "panel-simple-dp-aux", 2267 .of_match_table = platform_of_match, /* Same as platform one! */ 2268 .pm = &panel_edp_pm_ops, 2269 }, 2270 .probe = panel_edp_dp_aux_ep_probe, 2271 .remove = panel_edp_dp_aux_ep_remove, 2272 .shutdown = panel_edp_dp_aux_ep_shutdown, 2273 }; 2274 2275 static int __init panel_edp_init(void) 2276 { 2277 int err; 2278 2279 err = platform_driver_register(&panel_edp_platform_driver); 2280 if (err < 0) 2281 return err; 2282 2283 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2284 if (err < 0) 2285 goto err_did_platform_register; 2286 2287 return 0; 2288 2289 err_did_platform_register: 2290 platform_driver_unregister(&panel_edp_platform_driver); 2291 2292 return err; 2293 } 2294 module_init(panel_edp_init); 2295 2296 static void __exit panel_edp_exit(void) 2297 { 2298 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2299 platform_driver_unregister(&panel_edp_platform_driver); 2300 } 2301 module_exit(panel_edp_exit); 2302 2303 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2304 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2305 MODULE_LICENSE("GPL and additional rights"); 2306