1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/debugfs.h> 25 #include <linux/delay.h> 26 #include <linux/gpio/consumer.h> 27 #include <linux/iopoll.h> 28 #include <linux/module.h> 29 #include <linux/of_platform.h> 30 #include <linux/platform_device.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/regulator/consumer.h> 33 34 #include <video/display_timing.h> 35 #include <video/of_display_timing.h> 36 #include <video/videomode.h> 37 38 #include <drm/display/drm_dp_aux_bus.h> 39 #include <drm/display/drm_dp_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_device.h> 42 #include <drm/drm_edid.h> 43 #include <drm/drm_panel.h> 44 45 /** 46 * struct panel_delay - Describes delays for a simple panel. 47 */ 48 struct panel_delay { 49 /** 50 * @hpd_reliable: Time for HPD to be reliable 51 * 52 * The time (in milliseconds) that it takes after powering the panel 53 * before the HPD signal is reliable. Ideally this is 0 but some panels, 54 * board designs, or bad pulldown configs can cause a glitch here. 55 * 56 * NOTE: on some old panel data this number appears to be much too big. 57 * Presumably some old panels simply didn't have HPD hooked up and put 58 * the hpd_absent here because this field predates the 59 * hpd_absent. While that works, it's non-ideal. 60 */ 61 unsigned int hpd_reliable; 62 63 /** 64 * @hpd_absent: Time to wait if HPD isn't hooked up. 65 * 66 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 67 * 68 * This is T3-max on eDP timing diagrams or the delay from power on 69 * until HPD is guaranteed to be asserted. 70 */ 71 unsigned int hpd_absent; 72 73 /** 74 * @powered_on_to_enable: Time between panel powered on and enable. 75 * 76 * The minimum time, in milliseconds, that needs to have passed 77 * between when panel powered on and enable may begin. 78 * 79 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the 80 * power supply enabled until we can turn the backlight on and see 81 * valid data. 82 * 83 * This doesn't normally need to be set if timings are already met by 84 * prepare_to_enable or enable. 85 */ 86 unsigned int powered_on_to_enable; 87 88 /** 89 * @prepare_to_enable: Time between prepare and enable. 90 * 91 * The minimum time, in milliseconds, that needs to have passed 92 * between when prepare finished and enable may begin. If at 93 * enable time less time has passed since prepare finished, 94 * the driver waits for the remaining time. 95 * 96 * If a fixed enable delay is also specified, we'll start 97 * counting before delaying for the fixed delay. 98 * 99 * If a fixed prepare delay is also specified, we won't start 100 * counting until after the fixed delay. We can't overlap this 101 * fixed delay with the min time because the fixed delay 102 * doesn't happen at the end of the function if a HPD GPIO was 103 * specified. 104 * 105 * In other words: 106 * prepare() 107 * ... 108 * // do fixed prepare delay 109 * // wait for HPD GPIO if applicable 110 * // start counting for prepare_to_enable 111 * 112 * enable() 113 * // do fixed enable delay 114 * // enforce prepare_to_enable min time 115 * 116 * This is not specified in a standard way on eDP timing diagrams. 117 * It is effectively the time from HPD going high till you can 118 * turn on the backlight. 119 */ 120 unsigned int prepare_to_enable; 121 122 /** 123 * @enable: Time for the panel to display a valid frame. 124 * 125 * The time (in milliseconds) that it takes for the panel to 126 * display the first valid frame after starting to receive 127 * video data. 128 * 129 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 130 * the delay after link training finishes until we can turn the 131 * backlight on and see valid data. 132 */ 133 unsigned int enable; 134 135 /** 136 * @disable: Time for the panel to turn the display off. 137 * 138 * The time (in milliseconds) that it takes for the panel to 139 * turn the display off (no content is visible). 140 * 141 * This is T9-min (delay from backlight off to end of valid video 142 * data) on eDP timing diagrams. It is not common to set. 143 */ 144 unsigned int disable; 145 146 /** 147 * @unprepare: Time to power down completely. 148 * 149 * The time (in milliseconds) that it takes for the panel 150 * to power itself down completely. 151 * 152 * This time is used to prevent a future "prepare" from 153 * starting until at least this many milliseconds has passed. 154 * If at prepare time less time has passed since unprepare 155 * finished, the driver waits for the remaining time. 156 * 157 * This is T12-min on eDP timing diagrams. 158 */ 159 unsigned int unprepare; 160 }; 161 162 /** 163 * struct panel_desc - Describes a simple panel. 164 */ 165 struct panel_desc { 166 /** 167 * @modes: Pointer to array of fixed modes appropriate for this panel. 168 * 169 * If only one mode then this can just be the address of the mode. 170 * NOTE: cannot be used with "timings" and also if this is specified 171 * then you cannot override the mode in the device tree. 172 */ 173 const struct drm_display_mode *modes; 174 175 /** @num_modes: Number of elements in modes array. */ 176 unsigned int num_modes; 177 178 /** 179 * @timings: Pointer to array of display timings 180 * 181 * NOTE: cannot be used with "modes" and also these will be used to 182 * validate a device tree override if one is present. 183 */ 184 const struct display_timing *timings; 185 186 /** @num_timings: Number of elements in timings array. */ 187 unsigned int num_timings; 188 189 /** @bpc: Bits per color. */ 190 unsigned int bpc; 191 192 /** @size: Structure containing the physical size of this panel. */ 193 struct { 194 /** 195 * @size.width: Width (in mm) of the active display area. 196 */ 197 unsigned int width; 198 199 /** 200 * @size.height: Height (in mm) of the active display area. 201 */ 202 unsigned int height; 203 } size; 204 205 /** @delay: Structure containing various delay values for this panel. */ 206 struct panel_delay delay; 207 }; 208 209 /** 210 * struct edp_panel_entry - Maps panel ID to delay / panel name. 211 */ 212 struct edp_panel_entry { 213 /** @ident: edid identity used for panel matching. */ 214 const struct drm_edid_ident ident; 215 216 /** @delay: The power sequencing delays needed for this panel. */ 217 const struct panel_delay *delay; 218 219 /** @override_edid_mode: Override the mode obtained by edid. */ 220 const struct drm_display_mode *override_edid_mode; 221 }; 222 223 struct panel_edp { 224 struct drm_panel base; 225 bool enabled; 226 bool no_hpd; 227 228 bool prepared; 229 230 ktime_t prepared_time; 231 ktime_t powered_on_time; 232 ktime_t unprepared_time; 233 234 const struct panel_desc *desc; 235 236 struct regulator *supply; 237 struct i2c_adapter *ddc; 238 struct drm_dp_aux *aux; 239 240 struct gpio_desc *enable_gpio; 241 struct gpio_desc *hpd_gpio; 242 243 const struct edp_panel_entry *detected_panel; 244 245 const struct drm_edid *drm_edid; 246 247 struct drm_display_mode override_mode; 248 249 enum drm_panel_orientation orientation; 250 }; 251 252 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 253 { 254 return container_of(panel, struct panel_edp, base); 255 } 256 257 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 258 struct drm_connector *connector) 259 { 260 struct drm_display_mode *mode; 261 unsigned int i, num = 0; 262 263 for (i = 0; i < panel->desc->num_timings; i++) { 264 const struct display_timing *dt = &panel->desc->timings[i]; 265 struct videomode vm; 266 267 videomode_from_timing(dt, &vm); 268 mode = drm_mode_create(connector->dev); 269 if (!mode) { 270 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 271 dt->hactive.typ, dt->vactive.typ); 272 continue; 273 } 274 275 drm_display_mode_from_videomode(&vm, mode); 276 277 mode->type |= DRM_MODE_TYPE_DRIVER; 278 279 if (panel->desc->num_timings == 1) 280 mode->type |= DRM_MODE_TYPE_PREFERRED; 281 282 drm_mode_probed_add(connector, mode); 283 num++; 284 } 285 286 return num; 287 } 288 289 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 290 struct drm_connector *connector) 291 { 292 struct drm_display_mode *mode; 293 unsigned int i, num = 0; 294 295 for (i = 0; i < panel->desc->num_modes; i++) { 296 const struct drm_display_mode *m = &panel->desc->modes[i]; 297 298 mode = drm_mode_duplicate(connector->dev, m); 299 if (!mode) { 300 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 301 m->hdisplay, m->vdisplay, 302 drm_mode_vrefresh(m)); 303 continue; 304 } 305 306 mode->type |= DRM_MODE_TYPE_DRIVER; 307 308 if (panel->desc->num_modes == 1) 309 mode->type |= DRM_MODE_TYPE_PREFERRED; 310 311 drm_mode_set_name(mode); 312 313 drm_mode_probed_add(connector, mode); 314 num++; 315 } 316 317 return num; 318 } 319 320 static int panel_edp_override_edid_mode(struct panel_edp *panel, 321 struct drm_connector *connector, 322 const struct drm_display_mode *override_mode) 323 { 324 struct drm_display_mode *mode; 325 326 mode = drm_mode_duplicate(connector->dev, override_mode); 327 if (!mode) { 328 dev_err(panel->base.dev, "failed to add additional mode\n"); 329 return 0; 330 } 331 332 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 333 drm_mode_set_name(mode); 334 drm_mode_probed_add(connector, mode); 335 return 1; 336 } 337 338 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 339 struct drm_connector *connector) 340 { 341 struct drm_display_mode *mode; 342 bool has_override = panel->override_mode.type; 343 unsigned int num = 0; 344 345 if (!panel->desc) 346 return 0; 347 348 if (has_override) { 349 mode = drm_mode_duplicate(connector->dev, 350 &panel->override_mode); 351 if (mode) { 352 drm_mode_probed_add(connector, mode); 353 num = 1; 354 } else { 355 dev_err(panel->base.dev, "failed to add override mode\n"); 356 } 357 } 358 359 /* Only add timings if override was not there or failed to validate */ 360 if (num == 0 && panel->desc->num_timings) 361 num = panel_edp_get_timings_modes(panel, connector); 362 363 /* 364 * Only add fixed modes if timings/override added no mode. 365 * 366 * We should only ever have either the display timings specified 367 * or a fixed mode. Anything else is rather bogus. 368 */ 369 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 370 if (num == 0) 371 num = panel_edp_get_display_modes(panel, connector); 372 373 connector->display_info.bpc = panel->desc->bpc; 374 connector->display_info.width_mm = panel->desc->size.width; 375 connector->display_info.height_mm = panel->desc->size.height; 376 377 return num; 378 } 379 380 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 381 { 382 ktime_t now_ktime, min_ktime; 383 384 if (!min_ms) 385 return; 386 387 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 388 now_ktime = ktime_get_boottime(); 389 390 if (ktime_before(now_ktime, min_ktime)) 391 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 392 } 393 394 static int panel_edp_disable(struct drm_panel *panel) 395 { 396 struct panel_edp *p = to_panel_edp(panel); 397 398 if (!p->enabled) 399 return 0; 400 401 if (p->desc->delay.disable) 402 msleep(p->desc->delay.disable); 403 404 p->enabled = false; 405 406 return 0; 407 } 408 409 static int panel_edp_suspend(struct device *dev) 410 { 411 struct panel_edp *p = dev_get_drvdata(dev); 412 413 drm_dp_dpcd_set_powered(p->aux, false); 414 gpiod_set_value_cansleep(p->enable_gpio, 0); 415 regulator_disable(p->supply); 416 p->unprepared_time = ktime_get_boottime(); 417 418 return 0; 419 } 420 421 static int panel_edp_unprepare(struct drm_panel *panel) 422 { 423 struct panel_edp *p = to_panel_edp(panel); 424 int ret; 425 426 /* Unpreparing when already unprepared is a no-op */ 427 if (!p->prepared) 428 return 0; 429 430 ret = pm_runtime_put_sync_suspend(panel->dev); 431 if (ret < 0) 432 return ret; 433 p->prepared = false; 434 435 return 0; 436 } 437 438 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 439 { 440 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 441 if (IS_ERR(p->hpd_gpio)) 442 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 443 "failed to get 'hpd' GPIO\n"); 444 445 return 0; 446 } 447 448 static bool panel_edp_can_read_hpd(struct panel_edp *p) 449 { 450 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 451 } 452 453 static int panel_edp_prepare_once(struct panel_edp *p) 454 { 455 struct device *dev = p->base.dev; 456 unsigned int delay; 457 int err; 458 int hpd_asserted; 459 unsigned long hpd_wait_us; 460 461 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 462 463 err = regulator_enable(p->supply); 464 if (err < 0) { 465 dev_err(dev, "failed to enable supply: %d\n", err); 466 return err; 467 } 468 469 gpiod_set_value_cansleep(p->enable_gpio, 1); 470 drm_dp_dpcd_set_powered(p->aux, true); 471 472 p->powered_on_time = ktime_get_boottime(); 473 474 delay = p->desc->delay.hpd_reliable; 475 if (p->no_hpd) 476 delay = max(delay, p->desc->delay.hpd_absent); 477 if (delay) 478 msleep(delay); 479 480 if (panel_edp_can_read_hpd(p)) { 481 if (p->desc->delay.hpd_absent) 482 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 483 else 484 hpd_wait_us = 2000000; 485 486 if (p->hpd_gpio) { 487 err = readx_poll_timeout(gpiod_get_value_cansleep, 488 p->hpd_gpio, hpd_asserted, 489 hpd_asserted, 1000, hpd_wait_us); 490 if (hpd_asserted < 0) 491 err = hpd_asserted; 492 } else { 493 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 494 } 495 496 if (err) { 497 if (err != -ETIMEDOUT) 498 dev_err(dev, 499 "error waiting for hpd GPIO: %d\n", err); 500 goto error; 501 } 502 } 503 504 p->prepared_time = ktime_get_boottime(); 505 506 return 0; 507 508 error: 509 drm_dp_dpcd_set_powered(p->aux, false); 510 gpiod_set_value_cansleep(p->enable_gpio, 0); 511 regulator_disable(p->supply); 512 p->unprepared_time = ktime_get_boottime(); 513 514 return err; 515 } 516 517 /* 518 * Some panels simply don't always come up and need to be power cycled to 519 * work properly. We'll allow for a handful of retries. 520 */ 521 #define MAX_PANEL_PREPARE_TRIES 5 522 523 static int panel_edp_resume(struct device *dev) 524 { 525 struct panel_edp *p = dev_get_drvdata(dev); 526 int ret; 527 int try; 528 529 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 530 ret = panel_edp_prepare_once(p); 531 if (ret != -ETIMEDOUT) 532 break; 533 } 534 535 if (ret == -ETIMEDOUT) 536 dev_err(dev, "Prepare timeout after %d tries\n", try); 537 else if (try) 538 dev_warn(dev, "Prepare needed %d retries\n", try); 539 540 return ret; 541 } 542 543 static int panel_edp_prepare(struct drm_panel *panel) 544 { 545 struct panel_edp *p = to_panel_edp(panel); 546 int ret; 547 548 /* Preparing when already prepared is a no-op */ 549 if (p->prepared) 550 return 0; 551 552 ret = pm_runtime_get_sync(panel->dev); 553 if (ret < 0) { 554 pm_runtime_put_autosuspend(panel->dev); 555 return ret; 556 } 557 558 p->prepared = true; 559 560 return 0; 561 } 562 563 static int panel_edp_enable(struct drm_panel *panel) 564 { 565 struct panel_edp *p = to_panel_edp(panel); 566 unsigned int delay; 567 568 if (p->enabled) 569 return 0; 570 571 delay = p->desc->delay.enable; 572 573 /* 574 * If there is a "prepare_to_enable" delay then that's supposed to be 575 * the delay from HPD going high until we can turn the backlight on. 576 * However, we can only count this if HPD is readable by the panel 577 * driver. 578 * 579 * If we aren't handling the HPD pin ourselves then the best we 580 * can do is assume that HPD went high immediately before we were 581 * called (and link training took zero time). Note that "no-hpd" 582 * actually counts as handling HPD ourselves since we're doing the 583 * worst case delay (in prepare) ourselves. 584 * 585 * NOTE: if we ever end up in this "if" statement then we're 586 * guaranteed that the panel_edp_wait() call below will do no delay. 587 * It already handles that case, though, so we don't need any special 588 * code for it. 589 */ 590 if (p->desc->delay.prepare_to_enable && 591 !panel_edp_can_read_hpd(p) && !p->no_hpd) 592 delay = max(delay, p->desc->delay.prepare_to_enable); 593 594 if (delay) 595 msleep(delay); 596 597 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 598 599 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); 600 601 p->enabled = true; 602 603 return 0; 604 } 605 606 static int panel_edp_get_modes(struct drm_panel *panel, 607 struct drm_connector *connector) 608 { 609 struct panel_edp *p = to_panel_edp(panel); 610 int num = 0; 611 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; 612 bool has_override_edid_mode = p->detected_panel && 613 p->detected_panel != ERR_PTR(-EINVAL) && 614 p->detected_panel->override_edid_mode; 615 616 /* probe EDID if a DDC bus is available */ 617 if (p->ddc) { 618 pm_runtime_get_sync(panel->dev); 619 620 if (!p->drm_edid) 621 p->drm_edid = drm_edid_read_ddc(connector, p->ddc); 622 623 drm_edid_connector_update(connector, p->drm_edid); 624 625 /* 626 * If both edid and hard-coded modes exists, skip edid modes to 627 * avoid multiple preferred modes. 628 */ 629 if (p->drm_edid && !has_hard_coded_modes) { 630 if (has_override_edid_mode) { 631 /* 632 * override_edid_mode is specified. Use 633 * override_edid_mode instead of from edid. 634 */ 635 num += panel_edp_override_edid_mode(p, connector, 636 p->detected_panel->override_edid_mode); 637 } else { 638 num += drm_edid_connector_add_modes(connector); 639 } 640 } 641 642 pm_runtime_mark_last_busy(panel->dev); 643 pm_runtime_put_autosuspend(panel->dev); 644 } 645 646 if (has_hard_coded_modes) 647 num += panel_edp_get_non_edid_modes(p, connector); 648 else if (!num) 649 dev_warn(p->base.dev, "No display modes\n"); 650 651 /* 652 * TODO: Remove once all drm drivers call 653 * drm_connector_set_orientation_from_panel() 654 */ 655 drm_connector_set_panel_orientation(connector, p->orientation); 656 657 return num; 658 } 659 660 static int panel_edp_get_timings(struct drm_panel *panel, 661 unsigned int num_timings, 662 struct display_timing *timings) 663 { 664 struct panel_edp *p = to_panel_edp(panel); 665 unsigned int i; 666 667 if (p->desc->num_timings < num_timings) 668 num_timings = p->desc->num_timings; 669 670 if (timings) 671 for (i = 0; i < num_timings; i++) 672 timings[i] = p->desc->timings[i]; 673 674 return p->desc->num_timings; 675 } 676 677 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 678 { 679 struct panel_edp *p = to_panel_edp(panel); 680 681 return p->orientation; 682 } 683 684 static int detected_panel_show(struct seq_file *s, void *data) 685 { 686 struct drm_panel *panel = s->private; 687 struct panel_edp *p = to_panel_edp(panel); 688 689 if (IS_ERR(p->detected_panel)) 690 seq_puts(s, "UNKNOWN\n"); 691 else if (!p->detected_panel) 692 seq_puts(s, "HARDCODED\n"); 693 else 694 seq_printf(s, "%s\n", p->detected_panel->ident.name); 695 696 return 0; 697 } 698 699 DEFINE_SHOW_ATTRIBUTE(detected_panel); 700 701 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 702 { 703 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 704 } 705 706 static const struct drm_panel_funcs panel_edp_funcs = { 707 .disable = panel_edp_disable, 708 .unprepare = panel_edp_unprepare, 709 .prepare = panel_edp_prepare, 710 .enable = panel_edp_enable, 711 .get_modes = panel_edp_get_modes, 712 .get_orientation = panel_edp_get_orientation, 713 .get_timings = panel_edp_get_timings, 714 .debugfs_init = panel_edp_debugfs_init, 715 }; 716 717 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 718 (to_check->field.typ >= bounds->field.min && \ 719 to_check->field.typ <= bounds->field.max) 720 static void panel_edp_parse_panel_timing_node(struct device *dev, 721 struct panel_edp *panel, 722 const struct display_timing *ot) 723 { 724 const struct panel_desc *desc = panel->desc; 725 struct videomode vm; 726 unsigned int i; 727 728 if (WARN_ON(desc->num_modes)) { 729 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 730 return; 731 } 732 if (WARN_ON(!desc->num_timings)) { 733 dev_err(dev, "Reject override mode: no timings specified\n"); 734 return; 735 } 736 737 for (i = 0; i < panel->desc->num_timings; i++) { 738 const struct display_timing *dt = &panel->desc->timings[i]; 739 740 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 741 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 742 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 743 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 744 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 745 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 746 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 747 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 748 continue; 749 750 if (ot->flags != dt->flags) 751 continue; 752 753 videomode_from_timing(ot, &vm); 754 drm_display_mode_from_videomode(&vm, &panel->override_mode); 755 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 756 DRM_MODE_TYPE_PREFERRED; 757 break; 758 } 759 760 if (WARN_ON(!panel->override_mode.type)) 761 dev_err(dev, "Reject override mode: No display_timing found\n"); 762 } 763 764 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid); 765 766 static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc) 767 { 768 /* 769 * It's highly likely that the panel will work if we use very 770 * conservative timings, so let's do that. 771 * 772 * Nearly all panels have a "unprepare" delay of 500 ms though 773 * there are a few with 1000. Let's stick 2000 in just to be 774 * super conservative. 775 * 776 * An "enable" delay of 80 ms seems the most common, but we'll 777 * throw in 200 ms to be safe. 778 */ 779 desc->delay.unprepare = 2000; 780 desc->delay.enable = 200; 781 782 panel->detected_panel = ERR_PTR(-EINVAL); 783 } 784 785 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 786 { 787 struct panel_desc *desc; 788 const struct drm_edid *base_block; 789 u32 panel_id; 790 char vend[4]; 791 u16 product_id; 792 u32 reliable_ms = 0; 793 u32 absent_ms = 0; 794 int ret; 795 796 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 797 if (!desc) 798 return -ENOMEM; 799 panel->desc = desc; 800 801 /* 802 * Read the dts properties for the initial probe. These are used by 803 * the runtime resume code which will get called by the 804 * pm_runtime_get_sync() call below. 805 */ 806 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 807 desc->delay.hpd_reliable = reliable_ms; 808 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 809 desc->delay.hpd_absent = absent_ms; 810 811 /* Power the panel on so we can read the EDID */ 812 ret = pm_runtime_get_sync(dev); 813 if (ret < 0) { 814 dev_err(dev, 815 "Couldn't power on panel to ID it; using conservative timings: %d\n", 816 ret); 817 panel_edp_set_conservative_timings(panel, desc); 818 goto exit; 819 } 820 821 base_block = drm_edid_read_base_block(panel->ddc); 822 if (base_block) { 823 panel_id = drm_edid_get_panel_id(base_block); 824 } else { 825 dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n"); 826 panel_edp_set_conservative_timings(panel, desc); 827 goto exit; 828 } 829 drm_edid_decode_panel_id(panel_id, vend, &product_id); 830 831 panel->detected_panel = find_edp_panel(panel_id, base_block); 832 833 drm_edid_free(base_block); 834 835 /* 836 * We're using non-optimized timings and want it really obvious that 837 * someone needs to add an entry to the table, so we'll do a WARN_ON 838 * splat. 839 */ 840 if (WARN_ON(!panel->detected_panel)) { 841 dev_warn(dev, 842 "Unknown panel %s %#06x, using conservative timings\n", 843 vend, product_id); 844 panel_edp_set_conservative_timings(panel, desc); 845 } else { 846 dev_info(dev, "Detected %s %s (%#06x)\n", 847 vend, panel->detected_panel->ident.name, product_id); 848 849 /* Update the delay; everything else comes from EDID */ 850 desc->delay = *panel->detected_panel->delay; 851 } 852 853 exit: 854 pm_runtime_mark_last_busy(dev); 855 pm_runtime_put_autosuspend(dev); 856 857 return 0; 858 } 859 860 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 861 struct drm_dp_aux *aux) 862 { 863 struct panel_edp *panel; 864 struct display_timing dt; 865 struct device_node *ddc; 866 int err; 867 868 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); 869 if (!panel) 870 return -ENOMEM; 871 872 panel->enabled = false; 873 panel->prepared_time = 0; 874 panel->desc = desc; 875 panel->aux = aux; 876 877 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 878 if (!panel->no_hpd) { 879 err = panel_edp_get_hpd_gpio(dev, panel); 880 if (err) 881 return err; 882 } 883 884 panel->supply = devm_regulator_get(dev, "power"); 885 if (IS_ERR(panel->supply)) 886 return PTR_ERR(panel->supply); 887 888 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 889 GPIOD_OUT_LOW); 890 if (IS_ERR(panel->enable_gpio)) 891 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 892 "failed to request GPIO\n"); 893 894 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation); 895 if (err) { 896 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 897 return err; 898 } 899 900 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 901 if (ddc) { 902 panel->ddc = of_find_i2c_adapter_by_node(ddc); 903 of_node_put(ddc); 904 905 if (!panel->ddc) 906 return -EPROBE_DEFER; 907 } else if (aux) { 908 panel->ddc = &aux->ddc; 909 } 910 911 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 912 panel_edp_parse_panel_timing_node(dev, panel, &dt); 913 914 dev_set_drvdata(dev, panel); 915 916 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 917 918 err = drm_panel_of_backlight(&panel->base); 919 if (err) 920 goto err_finished_ddc_init; 921 922 /* 923 * We use runtime PM for prepare / unprepare since those power the panel 924 * on and off and those can be very slow operations. This is important 925 * to optimize powering the panel on briefly to read the EDID before 926 * fully enabling the panel. 927 */ 928 pm_runtime_enable(dev); 929 pm_runtime_set_autosuspend_delay(dev, 1000); 930 pm_runtime_use_autosuspend(dev); 931 932 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 933 err = generic_edp_panel_probe(dev, panel); 934 if (err) { 935 dev_err_probe(dev, err, 936 "Couldn't detect panel nor find a fallback\n"); 937 goto err_finished_pm_runtime; 938 } 939 /* generic_edp_panel_probe() replaces desc in the panel */ 940 desc = panel->desc; 941 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 942 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 943 } 944 945 if (!panel->base.backlight && panel->aux) { 946 pm_runtime_get_sync(dev); 947 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 948 pm_runtime_mark_last_busy(dev); 949 pm_runtime_put_autosuspend(dev); 950 951 /* 952 * Warn if we get an error, but don't consider it fatal. Having 953 * a panel where we can't control the backlight is better than 954 * no panel. 955 */ 956 if (err) 957 dev_warn(dev, "failed to register dp aux backlight: %d\n", err); 958 } 959 960 drm_panel_add(&panel->base); 961 962 return 0; 963 964 err_finished_pm_runtime: 965 pm_runtime_dont_use_autosuspend(dev); 966 pm_runtime_disable(dev); 967 err_finished_ddc_init: 968 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 969 put_device(&panel->ddc->dev); 970 971 return err; 972 } 973 974 static void panel_edp_remove(struct device *dev) 975 { 976 struct panel_edp *panel = dev_get_drvdata(dev); 977 978 drm_panel_remove(&panel->base); 979 drm_panel_disable(&panel->base); 980 drm_panel_unprepare(&panel->base); 981 982 pm_runtime_dont_use_autosuspend(dev); 983 pm_runtime_disable(dev); 984 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 985 put_device(&panel->ddc->dev); 986 987 drm_edid_free(panel->drm_edid); 988 panel->drm_edid = NULL; 989 } 990 991 static void panel_edp_shutdown(struct device *dev) 992 { 993 struct panel_edp *panel = dev_get_drvdata(dev); 994 995 drm_panel_disable(&panel->base); 996 drm_panel_unprepare(&panel->base); 997 } 998 999 static const struct display_timing auo_b101ean01_timing = { 1000 .pixelclock = { 65300000, 72500000, 75000000 }, 1001 .hactive = { 1280, 1280, 1280 }, 1002 .hfront_porch = { 18, 119, 119 }, 1003 .hback_porch = { 21, 21, 21 }, 1004 .hsync_len = { 32, 32, 32 }, 1005 .vactive = { 800, 800, 800 }, 1006 .vfront_porch = { 4, 4, 4 }, 1007 .vback_porch = { 8, 8, 8 }, 1008 .vsync_len = { 18, 20, 20 }, 1009 }; 1010 1011 static const struct panel_desc auo_b101ean01 = { 1012 .timings = &auo_b101ean01_timing, 1013 .num_timings = 1, 1014 .bpc = 6, 1015 .size = { 1016 .width = 217, 1017 .height = 136, 1018 }, 1019 }; 1020 1021 static const struct drm_display_mode auo_b116xa3_mode = { 1022 .clock = 70589, 1023 .hdisplay = 1366, 1024 .hsync_start = 1366 + 40, 1025 .hsync_end = 1366 + 40 + 40, 1026 .htotal = 1366 + 40 + 40 + 32, 1027 .vdisplay = 768, 1028 .vsync_start = 768 + 10, 1029 .vsync_end = 768 + 10 + 12, 1030 .vtotal = 768 + 10 + 12 + 6, 1031 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1032 }; 1033 1034 static const struct drm_display_mode auo_b116xak01_mode = { 1035 .clock = 69300, 1036 .hdisplay = 1366, 1037 .hsync_start = 1366 + 48, 1038 .hsync_end = 1366 + 48 + 32, 1039 .htotal = 1366 + 48 + 32 + 10, 1040 .vdisplay = 768, 1041 .vsync_start = 768 + 4, 1042 .vsync_end = 768 + 4 + 6, 1043 .vtotal = 768 + 4 + 6 + 15, 1044 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1045 }; 1046 1047 static const struct panel_desc auo_b116xak01 = { 1048 .modes = &auo_b116xak01_mode, 1049 .num_modes = 1, 1050 .bpc = 6, 1051 .size = { 1052 .width = 256, 1053 .height = 144, 1054 }, 1055 .delay = { 1056 .hpd_absent = 200, 1057 .unprepare = 500, 1058 .enable = 50, 1059 }, 1060 }; 1061 1062 static const struct drm_display_mode auo_b133han05_mode = { 1063 .clock = 142600, 1064 .hdisplay = 1920, 1065 .hsync_start = 1920 + 58, 1066 .hsync_end = 1920 + 58 + 42, 1067 .htotal = 1920 + 58 + 42 + 60, 1068 .vdisplay = 1080, 1069 .vsync_start = 1080 + 3, 1070 .vsync_end = 1080 + 3 + 5, 1071 .vtotal = 1080 + 3 + 5 + 54, 1072 }; 1073 1074 static const struct panel_desc auo_b133han05 = { 1075 .modes = &auo_b133han05_mode, 1076 .num_modes = 1, 1077 .bpc = 8, 1078 .size = { 1079 .width = 293, 1080 .height = 165, 1081 }, 1082 .delay = { 1083 .hpd_reliable = 100, 1084 .enable = 20, 1085 .unprepare = 50, 1086 }, 1087 }; 1088 1089 static const struct drm_display_mode auo_b133htn01_mode = { 1090 .clock = 150660, 1091 .hdisplay = 1920, 1092 .hsync_start = 1920 + 172, 1093 .hsync_end = 1920 + 172 + 80, 1094 .htotal = 1920 + 172 + 80 + 60, 1095 .vdisplay = 1080, 1096 .vsync_start = 1080 + 25, 1097 .vsync_end = 1080 + 25 + 10, 1098 .vtotal = 1080 + 25 + 10 + 10, 1099 }; 1100 1101 static const struct panel_desc auo_b133htn01 = { 1102 .modes = &auo_b133htn01_mode, 1103 .num_modes = 1, 1104 .bpc = 6, 1105 .size = { 1106 .width = 293, 1107 .height = 165, 1108 }, 1109 .delay = { 1110 .hpd_reliable = 105, 1111 .enable = 20, 1112 .unprepare = 50, 1113 }, 1114 }; 1115 1116 static const struct drm_display_mode auo_b133xtn01_mode = { 1117 .clock = 69500, 1118 .hdisplay = 1366, 1119 .hsync_start = 1366 + 48, 1120 .hsync_end = 1366 + 48 + 32, 1121 .htotal = 1366 + 48 + 32 + 20, 1122 .vdisplay = 768, 1123 .vsync_start = 768 + 3, 1124 .vsync_end = 768 + 3 + 6, 1125 .vtotal = 768 + 3 + 6 + 13, 1126 }; 1127 1128 static const struct panel_desc auo_b133xtn01 = { 1129 .modes = &auo_b133xtn01_mode, 1130 .num_modes = 1, 1131 .bpc = 6, 1132 .size = { 1133 .width = 293, 1134 .height = 165, 1135 }, 1136 }; 1137 1138 static const struct drm_display_mode auo_b140han06_mode = { 1139 .clock = 141000, 1140 .hdisplay = 1920, 1141 .hsync_start = 1920 + 16, 1142 .hsync_end = 1920 + 16 + 16, 1143 .htotal = 1920 + 16 + 16 + 152, 1144 .vdisplay = 1080, 1145 .vsync_start = 1080 + 3, 1146 .vsync_end = 1080 + 3 + 14, 1147 .vtotal = 1080 + 3 + 14 + 19, 1148 }; 1149 1150 static const struct panel_desc auo_b140han06 = { 1151 .modes = &auo_b140han06_mode, 1152 .num_modes = 1, 1153 .bpc = 8, 1154 .size = { 1155 .width = 309, 1156 .height = 174, 1157 }, 1158 .delay = { 1159 .hpd_reliable = 100, 1160 .enable = 20, 1161 .unprepare = 50, 1162 }, 1163 }; 1164 1165 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1166 { 1167 .clock = 71900, 1168 .hdisplay = 1280, 1169 .hsync_start = 1280 + 48, 1170 .hsync_end = 1280 + 48 + 32, 1171 .htotal = 1280 + 48 + 32 + 80, 1172 .vdisplay = 800, 1173 .vsync_start = 800 + 3, 1174 .vsync_end = 800 + 3 + 5, 1175 .vtotal = 800 + 3 + 5 + 24, 1176 }, 1177 { 1178 .clock = 57500, 1179 .hdisplay = 1280, 1180 .hsync_start = 1280 + 48, 1181 .hsync_end = 1280 + 48 + 32, 1182 .htotal = 1280 + 48 + 32 + 80, 1183 .vdisplay = 800, 1184 .vsync_start = 800 + 3, 1185 .vsync_end = 800 + 3 + 5, 1186 .vtotal = 800 + 3 + 5 + 24, 1187 }, 1188 }; 1189 1190 static const struct panel_desc boe_nv101wxmn51 = { 1191 .modes = boe_nv101wxmn51_modes, 1192 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1193 .bpc = 8, 1194 .size = { 1195 .width = 217, 1196 .height = 136, 1197 }, 1198 .delay = { 1199 /* TODO: should be hpd-absent and no-hpd should be set? */ 1200 .hpd_reliable = 210, 1201 .enable = 50, 1202 .unprepare = 160, 1203 }, 1204 }; 1205 1206 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1207 { 1208 .clock = 207800, 1209 .hdisplay = 2160, 1210 .hsync_start = 2160 + 48, 1211 .hsync_end = 2160 + 48 + 32, 1212 .htotal = 2160 + 48 + 32 + 100, 1213 .vdisplay = 1440, 1214 .vsync_start = 1440 + 3, 1215 .vsync_end = 1440 + 3 + 6, 1216 .vtotal = 1440 + 3 + 6 + 31, 1217 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1218 }, 1219 { 1220 .clock = 138500, 1221 .hdisplay = 2160, 1222 .hsync_start = 2160 + 48, 1223 .hsync_end = 2160 + 48 + 32, 1224 .htotal = 2160 + 48 + 32 + 100, 1225 .vdisplay = 1440, 1226 .vsync_start = 1440 + 3, 1227 .vsync_end = 1440 + 3 + 6, 1228 .vtotal = 1440 + 3 + 6 + 31, 1229 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1230 }, 1231 }; 1232 1233 static const struct panel_desc boe_nv110wtm_n61 = { 1234 .modes = boe_nv110wtm_n61_modes, 1235 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1236 .bpc = 8, 1237 .size = { 1238 .width = 233, 1239 .height = 155, 1240 }, 1241 .delay = { 1242 .hpd_absent = 200, 1243 .prepare_to_enable = 80, 1244 .enable = 50, 1245 .unprepare = 500, 1246 }, 1247 }; 1248 1249 /* Also used for boe_nv133fhm_n62 */ 1250 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1251 .clock = 147840, 1252 .hdisplay = 1920, 1253 .hsync_start = 1920 + 48, 1254 .hsync_end = 1920 + 48 + 32, 1255 .htotal = 1920 + 48 + 32 + 200, 1256 .vdisplay = 1080, 1257 .vsync_start = 1080 + 3, 1258 .vsync_end = 1080 + 3 + 6, 1259 .vtotal = 1080 + 3 + 6 + 31, 1260 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1261 }; 1262 1263 /* Also used for boe_nv133fhm_n62 */ 1264 static const struct panel_desc boe_nv133fhm_n61 = { 1265 .modes = &boe_nv133fhm_n61_modes, 1266 .num_modes = 1, 1267 .bpc = 6, 1268 .size = { 1269 .width = 294, 1270 .height = 165, 1271 }, 1272 .delay = { 1273 /* 1274 * When power is first given to the panel there's a short 1275 * spike on the HPD line. It was explained that this spike 1276 * was until the TCON data download was complete. On 1277 * one system this was measured at 8 ms. We'll put 15 ms 1278 * in the prepare delay just to be safe. That means: 1279 * - If HPD isn't hooked up you still have 200 ms delay. 1280 * - If HPD is hooked up we won't try to look at it for the 1281 * first 15 ms. 1282 */ 1283 .hpd_reliable = 15, 1284 .hpd_absent = 200, 1285 1286 .unprepare = 500, 1287 }, 1288 }; 1289 1290 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1291 { 1292 .clock = 148500, 1293 .hdisplay = 1920, 1294 .hsync_start = 1920 + 48, 1295 .hsync_end = 1920 + 48 + 32, 1296 .htotal = 2200, 1297 .vdisplay = 1080, 1298 .vsync_start = 1080 + 3, 1299 .vsync_end = 1080 + 3 + 5, 1300 .vtotal = 1125, 1301 }, 1302 }; 1303 1304 static const struct panel_desc boe_nv140fhmn49 = { 1305 .modes = boe_nv140fhmn49_modes, 1306 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1307 .bpc = 6, 1308 .size = { 1309 .width = 309, 1310 .height = 174, 1311 }, 1312 .delay = { 1313 /* TODO: should be hpd-absent and no-hpd should be set? */ 1314 .hpd_reliable = 210, 1315 .enable = 50, 1316 .unprepare = 160, 1317 }, 1318 }; 1319 1320 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1321 .clock = 76420, 1322 .hdisplay = 1366, 1323 .hsync_start = 1366 + 136, 1324 .hsync_end = 1366 + 136 + 30, 1325 .htotal = 1366 + 136 + 30 + 60, 1326 .vdisplay = 768, 1327 .vsync_start = 768 + 8, 1328 .vsync_end = 768 + 8 + 12, 1329 .vtotal = 768 + 8 + 12 + 12, 1330 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1331 }; 1332 1333 static const struct panel_desc innolux_n116bca_ea1 = { 1334 .modes = &innolux_n116bca_ea1_mode, 1335 .num_modes = 1, 1336 .bpc = 6, 1337 .size = { 1338 .width = 256, 1339 .height = 144, 1340 }, 1341 .delay = { 1342 .hpd_absent = 200, 1343 .enable = 80, 1344 .disable = 50, 1345 .unprepare = 500, 1346 }, 1347 }; 1348 1349 /* 1350 * Datasheet specifies that at 60 Hz refresh rate: 1351 * - total horizontal time: { 1506, 1592, 1716 } 1352 * - total vertical time: { 788, 800, 868 } 1353 * 1354 * ...but doesn't go into exactly how that should be split into a front 1355 * porch, back porch, or sync length. For now we'll leave a single setting 1356 * here which allows a bit of tweaking of the pixel clock at the expense of 1357 * refresh rate. 1358 */ 1359 static const struct display_timing innolux_n116bge_timing = { 1360 .pixelclock = { 72600000, 76420000, 80240000 }, 1361 .hactive = { 1366, 1366, 1366 }, 1362 .hfront_porch = { 136, 136, 136 }, 1363 .hback_porch = { 60, 60, 60 }, 1364 .hsync_len = { 30, 30, 30 }, 1365 .vactive = { 768, 768, 768 }, 1366 .vfront_porch = { 8, 8, 8 }, 1367 .vback_porch = { 12, 12, 12 }, 1368 .vsync_len = { 12, 12, 12 }, 1369 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1370 }; 1371 1372 static const struct panel_desc innolux_n116bge = { 1373 .timings = &innolux_n116bge_timing, 1374 .num_timings = 1, 1375 .bpc = 6, 1376 .size = { 1377 .width = 256, 1378 .height = 144, 1379 }, 1380 }; 1381 1382 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1383 .clock = 162000, 1384 .hdisplay = 1920, 1385 .hsync_start = 1920 + 40, 1386 .hsync_end = 1920 + 40 + 40, 1387 .htotal = 1920 + 40 + 40 + 80, 1388 .vdisplay = 1080, 1389 .vsync_start = 1080 + 4, 1390 .vsync_end = 1080 + 4 + 4, 1391 .vtotal = 1080 + 4 + 4 + 24, 1392 }; 1393 1394 static const struct panel_desc innolux_n125hce_gn1 = { 1395 .modes = &innolux_n125hce_gn1_mode, 1396 .num_modes = 1, 1397 .bpc = 8, 1398 .size = { 1399 .width = 276, 1400 .height = 155, 1401 }, 1402 }; 1403 1404 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1405 .clock = 206016, 1406 .hdisplay = 2160, 1407 .hsync_start = 2160 + 48, 1408 .hsync_end = 2160 + 48 + 32, 1409 .htotal = 2160 + 48 + 32 + 80, 1410 .vdisplay = 1440, 1411 .vsync_start = 1440 + 3, 1412 .vsync_end = 1440 + 3 + 10, 1413 .vtotal = 1440 + 3 + 10 + 27, 1414 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1415 }; 1416 1417 static const struct panel_desc innolux_p120zdg_bf1 = { 1418 .modes = &innolux_p120zdg_bf1_mode, 1419 .num_modes = 1, 1420 .bpc = 8, 1421 .size = { 1422 .width = 254, 1423 .height = 169, 1424 }, 1425 .delay = { 1426 .hpd_absent = 200, 1427 .unprepare = 500, 1428 }, 1429 }; 1430 1431 static const struct drm_display_mode ivo_m133nwf4_r0_mode = { 1432 .clock = 138778, 1433 .hdisplay = 1920, 1434 .hsync_start = 1920 + 24, 1435 .hsync_end = 1920 + 24 + 48, 1436 .htotal = 1920 + 24 + 48 + 88, 1437 .vdisplay = 1080, 1438 .vsync_start = 1080 + 3, 1439 .vsync_end = 1080 + 3 + 12, 1440 .vtotal = 1080 + 3 + 12 + 17, 1441 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1442 }; 1443 1444 static const struct panel_desc ivo_m133nwf4_r0 = { 1445 .modes = &ivo_m133nwf4_r0_mode, 1446 .num_modes = 1, 1447 .bpc = 8, 1448 .size = { 1449 .width = 294, 1450 .height = 165, 1451 }, 1452 .delay = { 1453 .hpd_absent = 200, 1454 .unprepare = 500, 1455 }, 1456 }; 1457 1458 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1459 .clock = 81000, 1460 .hdisplay = 1366, 1461 .hsync_start = 1366 + 40, 1462 .hsync_end = 1366 + 40 + 32, 1463 .htotal = 1366 + 40 + 32 + 62, 1464 .vdisplay = 768, 1465 .vsync_start = 768 + 5, 1466 .vsync_end = 768 + 5 + 5, 1467 .vtotal = 768 + 5 + 5 + 122, 1468 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1469 }; 1470 1471 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1472 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1473 .num_modes = 1, 1474 .bpc = 6, 1475 .size = { 1476 .width = 256, 1477 .height = 144, 1478 }, 1479 .delay = { 1480 .hpd_absent = 200, 1481 }, 1482 }; 1483 1484 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1485 .clock = 200000, 1486 .hdisplay = 1536, 1487 .hsync_start = 1536 + 12, 1488 .hsync_end = 1536 + 12 + 16, 1489 .htotal = 1536 + 12 + 16 + 48, 1490 .vdisplay = 2048, 1491 .vsync_start = 2048 + 8, 1492 .vsync_end = 2048 + 8 + 4, 1493 .vtotal = 2048 + 8 + 4 + 8, 1494 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1495 }; 1496 1497 static const struct panel_desc lg_lp079qx1_sp0v = { 1498 .modes = &lg_lp079qx1_sp0v_mode, 1499 .num_modes = 1, 1500 .size = { 1501 .width = 129, 1502 .height = 171, 1503 }, 1504 }; 1505 1506 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1507 .clock = 205210, 1508 .hdisplay = 2048, 1509 .hsync_start = 2048 + 150, 1510 .hsync_end = 2048 + 150 + 5, 1511 .htotal = 2048 + 150 + 5 + 5, 1512 .vdisplay = 1536, 1513 .vsync_start = 1536 + 3, 1514 .vsync_end = 1536 + 3 + 1, 1515 .vtotal = 1536 + 3 + 1 + 9, 1516 }; 1517 1518 static const struct panel_desc lg_lp097qx1_spa1 = { 1519 .modes = &lg_lp097qx1_spa1_mode, 1520 .num_modes = 1, 1521 .size = { 1522 .width = 208, 1523 .height = 147, 1524 }, 1525 }; 1526 1527 static const struct drm_display_mode lg_lp120up1_mode = { 1528 .clock = 162300, 1529 .hdisplay = 1920, 1530 .hsync_start = 1920 + 40, 1531 .hsync_end = 1920 + 40 + 40, 1532 .htotal = 1920 + 40 + 40 + 80, 1533 .vdisplay = 1280, 1534 .vsync_start = 1280 + 4, 1535 .vsync_end = 1280 + 4 + 4, 1536 .vtotal = 1280 + 4 + 4 + 12, 1537 }; 1538 1539 static const struct panel_desc lg_lp120up1 = { 1540 .modes = &lg_lp120up1_mode, 1541 .num_modes = 1, 1542 .bpc = 8, 1543 .size = { 1544 .width = 267, 1545 .height = 183, 1546 }, 1547 }; 1548 1549 static const struct drm_display_mode lg_lp129qe_mode = { 1550 .clock = 285250, 1551 .hdisplay = 2560, 1552 .hsync_start = 2560 + 48, 1553 .hsync_end = 2560 + 48 + 32, 1554 .htotal = 2560 + 48 + 32 + 80, 1555 .vdisplay = 1700, 1556 .vsync_start = 1700 + 3, 1557 .vsync_end = 1700 + 3 + 10, 1558 .vtotal = 1700 + 3 + 10 + 36, 1559 }; 1560 1561 static const struct panel_desc lg_lp129qe = { 1562 .modes = &lg_lp129qe_mode, 1563 .num_modes = 1, 1564 .bpc = 8, 1565 .size = { 1566 .width = 272, 1567 .height = 181, 1568 }, 1569 }; 1570 1571 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1572 { 1573 .clock = 138500, 1574 .hdisplay = 1920, 1575 .hsync_start = 1920 + 48, 1576 .hsync_end = 1920 + 48 + 32, 1577 .htotal = 1920 + 48 + 32 + 80, 1578 .vdisplay = 1080, 1579 .vsync_start = 1080 + 3, 1580 .vsync_end = 1080 + 3 + 5, 1581 .vtotal = 1080 + 3 + 5 + 23, 1582 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1583 }, { 1584 .clock = 110920, 1585 .hdisplay = 1920, 1586 .hsync_start = 1920 + 48, 1587 .hsync_end = 1920 + 48 + 32, 1588 .htotal = 1920 + 48 + 32 + 80, 1589 .vdisplay = 1080, 1590 .vsync_start = 1080 + 3, 1591 .vsync_end = 1080 + 3 + 5, 1592 .vtotal = 1080 + 3 + 5 + 23, 1593 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1594 } 1595 }; 1596 1597 static const struct panel_desc neweast_wjfh116008a = { 1598 .modes = neweast_wjfh116008a_modes, 1599 .num_modes = 2, 1600 .bpc = 6, 1601 .size = { 1602 .width = 260, 1603 .height = 150, 1604 }, 1605 .delay = { 1606 .hpd_reliable = 110, 1607 .enable = 20, 1608 .unprepare = 500, 1609 }, 1610 }; 1611 1612 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1613 .clock = 271560, 1614 .hdisplay = 2560, 1615 .hsync_start = 2560 + 48, 1616 .hsync_end = 2560 + 48 + 32, 1617 .htotal = 2560 + 48 + 32 + 80, 1618 .vdisplay = 1600, 1619 .vsync_start = 1600 + 2, 1620 .vsync_end = 1600 + 2 + 5, 1621 .vtotal = 1600 + 2 + 5 + 57, 1622 }; 1623 1624 static const struct panel_desc samsung_lsn122dl01_c01 = { 1625 .modes = &samsung_lsn122dl01_c01_mode, 1626 .num_modes = 1, 1627 .size = { 1628 .width = 263, 1629 .height = 164, 1630 }, 1631 }; 1632 1633 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1634 .clock = 76300, 1635 .hdisplay = 1366, 1636 .hsync_start = 1366 + 64, 1637 .hsync_end = 1366 + 64 + 48, 1638 .htotal = 1366 + 64 + 48 + 128, 1639 .vdisplay = 768, 1640 .vsync_start = 768 + 2, 1641 .vsync_end = 768 + 2 + 5, 1642 .vtotal = 768 + 2 + 5 + 17, 1643 }; 1644 1645 static const struct panel_desc samsung_ltn140at29_301 = { 1646 .modes = &samsung_ltn140at29_301_mode, 1647 .num_modes = 1, 1648 .bpc = 6, 1649 .size = { 1650 .width = 320, 1651 .height = 187, 1652 }, 1653 }; 1654 1655 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1656 .clock = 168480, 1657 .hdisplay = 1920, 1658 .hsync_start = 1920 + 48, 1659 .hsync_end = 1920 + 48 + 32, 1660 .htotal = 1920 + 48 + 32 + 80, 1661 .vdisplay = 1280, 1662 .vsync_start = 1280 + 3, 1663 .vsync_end = 1280 + 3 + 10, 1664 .vtotal = 1280 + 3 + 10 + 57, 1665 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1666 }; 1667 1668 static const struct panel_desc sharp_ld_d5116z01b = { 1669 .modes = &sharp_ld_d5116z01b_mode, 1670 .num_modes = 1, 1671 .bpc = 8, 1672 .size = { 1673 .width = 260, 1674 .height = 120, 1675 }, 1676 }; 1677 1678 static const struct display_timing sharp_lq123p1jx31_timing = { 1679 .pixelclock = { 252750000, 252750000, 266604720 }, 1680 .hactive = { 2400, 2400, 2400 }, 1681 .hfront_porch = { 48, 48, 48 }, 1682 .hback_porch = { 80, 80, 84 }, 1683 .hsync_len = { 32, 32, 32 }, 1684 .vactive = { 1600, 1600, 1600 }, 1685 .vfront_porch = { 3, 3, 3 }, 1686 .vback_porch = { 33, 33, 120 }, 1687 .vsync_len = { 10, 10, 10 }, 1688 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1689 }; 1690 1691 static const struct panel_desc sharp_lq123p1jx31 = { 1692 .timings = &sharp_lq123p1jx31_timing, 1693 .num_timings = 1, 1694 .bpc = 8, 1695 .size = { 1696 .width = 259, 1697 .height = 173, 1698 }, 1699 .delay = { 1700 .hpd_reliable = 110, 1701 .enable = 50, 1702 .unprepare = 550, 1703 }, 1704 }; 1705 1706 static const struct drm_display_mode sharp_lq140m1jw46_mode[] = { 1707 { 1708 .clock = 346500, 1709 .hdisplay = 1920, 1710 .hsync_start = 1920 + 48, 1711 .hsync_end = 1920 + 48 + 32, 1712 .htotal = 1920 + 48 + 32 + 80, 1713 .vdisplay = 1080, 1714 .vsync_start = 1080 + 3, 1715 .vsync_end = 1080 + 3 + 5, 1716 .vtotal = 1080 + 3 + 5 + 69, 1717 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1718 }, { 1719 .clock = 144370, 1720 .hdisplay = 1920, 1721 .hsync_start = 1920 + 48, 1722 .hsync_end = 1920 + 48 + 32, 1723 .htotal = 1920 + 48 + 32 + 80, 1724 .vdisplay = 1080, 1725 .vsync_start = 1080 + 3, 1726 .vsync_end = 1080 + 3 + 5, 1727 .vtotal = 1080 + 3 + 5 + 69, 1728 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1729 }, 1730 }; 1731 1732 static const struct panel_desc sharp_lq140m1jw46 = { 1733 .modes = sharp_lq140m1jw46_mode, 1734 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode), 1735 .bpc = 8, 1736 .size = { 1737 .width = 309, 1738 .height = 174, 1739 }, 1740 .delay = { 1741 .hpd_absent = 80, 1742 .enable = 50, 1743 .unprepare = 500, 1744 }, 1745 }; 1746 1747 static const struct drm_display_mode starry_kr122ea0sra_mode = { 1748 .clock = 147000, 1749 .hdisplay = 1920, 1750 .hsync_start = 1920 + 16, 1751 .hsync_end = 1920 + 16 + 16, 1752 .htotal = 1920 + 16 + 16 + 32, 1753 .vdisplay = 1200, 1754 .vsync_start = 1200 + 15, 1755 .vsync_end = 1200 + 15 + 2, 1756 .vtotal = 1200 + 15 + 2 + 18, 1757 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1758 }; 1759 1760 static const struct panel_desc starry_kr122ea0sra = { 1761 .modes = &starry_kr122ea0sra_mode, 1762 .num_modes = 1, 1763 .size = { 1764 .width = 263, 1765 .height = 164, 1766 }, 1767 .delay = { 1768 /* TODO: should be hpd-absent and no-hpd should be set? */ 1769 .hpd_reliable = 10 + 200, 1770 .enable = 50, 1771 .unprepare = 10 + 500, 1772 }, 1773 }; 1774 1775 static const struct of_device_id platform_of_match[] = { 1776 { 1777 /* Must be first */ 1778 .compatible = "edp-panel", 1779 }, { 1780 .compatible = "auo,b101ean01", 1781 .data = &auo_b101ean01, 1782 }, { 1783 .compatible = "auo,b116xa01", 1784 .data = &auo_b116xak01, 1785 }, { 1786 .compatible = "auo,b133han05", 1787 .data = &auo_b133han05, 1788 }, { 1789 .compatible = "auo,b133htn01", 1790 .data = &auo_b133htn01, 1791 }, { 1792 .compatible = "auo,b133xtn01", 1793 .data = &auo_b133xtn01, 1794 }, { 1795 .compatible = "auo,b140han06", 1796 .data = &auo_b140han06, 1797 }, { 1798 .compatible = "boe,nv101wxmn51", 1799 .data = &boe_nv101wxmn51, 1800 }, { 1801 .compatible = "boe,nv110wtm-n61", 1802 .data = &boe_nv110wtm_n61, 1803 }, { 1804 .compatible = "boe,nv133fhm-n61", 1805 .data = &boe_nv133fhm_n61, 1806 }, { 1807 .compatible = "boe,nv133fhm-n62", 1808 .data = &boe_nv133fhm_n61, 1809 }, { 1810 .compatible = "boe,nv140fhmn49", 1811 .data = &boe_nv140fhmn49, 1812 }, { 1813 .compatible = "innolux,n116bca-ea1", 1814 .data = &innolux_n116bca_ea1, 1815 }, { 1816 .compatible = "innolux,n116bge", 1817 .data = &innolux_n116bge, 1818 }, { 1819 .compatible = "innolux,n125hce-gn1", 1820 .data = &innolux_n125hce_gn1, 1821 }, { 1822 .compatible = "innolux,p120zdg-bf1", 1823 .data = &innolux_p120zdg_bf1, 1824 }, { 1825 .compatible = "ivo,m133nwf4-r0", 1826 .data = &ivo_m133nwf4_r0, 1827 }, { 1828 .compatible = "kingdisplay,kd116n21-30nv-a010", 1829 .data = &kingdisplay_kd116n21_30nv_a010, 1830 }, { 1831 .compatible = "lg,lp079qx1-sp0v", 1832 .data = &lg_lp079qx1_sp0v, 1833 }, { 1834 .compatible = "lg,lp097qx1-spa1", 1835 .data = &lg_lp097qx1_spa1, 1836 }, { 1837 .compatible = "lg,lp120up1", 1838 .data = &lg_lp120up1, 1839 }, { 1840 .compatible = "lg,lp129qe", 1841 .data = &lg_lp129qe, 1842 }, { 1843 .compatible = "neweast,wjfh116008a", 1844 .data = &neweast_wjfh116008a, 1845 }, { 1846 .compatible = "samsung,lsn122dl01-c01", 1847 .data = &samsung_lsn122dl01_c01, 1848 }, { 1849 .compatible = "samsung,ltn140at29-301", 1850 .data = &samsung_ltn140at29_301, 1851 }, { 1852 .compatible = "sharp,ld-d5116z01b", 1853 .data = &sharp_ld_d5116z01b, 1854 }, { 1855 .compatible = "sharp,lq123p1jx31", 1856 .data = &sharp_lq123p1jx31, 1857 }, { 1858 .compatible = "sharp,lq140m1jw46", 1859 .data = &sharp_lq140m1jw46, 1860 }, { 1861 .compatible = "starry,kr122ea0sra", 1862 .data = &starry_kr122ea0sra, 1863 }, { 1864 /* sentinel */ 1865 } 1866 }; 1867 MODULE_DEVICE_TABLE(of, platform_of_match); 1868 1869 static const struct panel_delay delay_200_500_p2e80 = { 1870 .hpd_absent = 200, 1871 .unprepare = 500, 1872 .prepare_to_enable = 80, 1873 }; 1874 1875 static const struct panel_delay delay_200_500_e50_p2e80 = { 1876 .hpd_absent = 200, 1877 .unprepare = 500, 1878 .enable = 50, 1879 .prepare_to_enable = 80, 1880 }; 1881 1882 static const struct panel_delay delay_200_500_p2e100 = { 1883 .hpd_absent = 200, 1884 .unprepare = 500, 1885 .prepare_to_enable = 100, 1886 }; 1887 1888 static const struct panel_delay delay_200_500_e50 = { 1889 .hpd_absent = 200, 1890 .unprepare = 500, 1891 .enable = 50, 1892 }; 1893 1894 static const struct panel_delay delay_200_500_e50_p2e200 = { 1895 .hpd_absent = 200, 1896 .unprepare = 500, 1897 .enable = 50, 1898 .prepare_to_enable = 200, 1899 }; 1900 1901 static const struct panel_delay delay_200_500_e80 = { 1902 .hpd_absent = 200, 1903 .unprepare = 500, 1904 .enable = 80, 1905 }; 1906 1907 static const struct panel_delay delay_200_500_e80_d50 = { 1908 .hpd_absent = 200, 1909 .unprepare = 500, 1910 .enable = 80, 1911 .disable = 50, 1912 }; 1913 1914 static const struct panel_delay delay_100_500_e200 = { 1915 .hpd_absent = 100, 1916 .unprepare = 500, 1917 .enable = 200, 1918 }; 1919 1920 static const struct panel_delay delay_200_500_e200 = { 1921 .hpd_absent = 200, 1922 .unprepare = 500, 1923 .enable = 200, 1924 }; 1925 1926 static const struct panel_delay delay_200_500_e200_d200 = { 1927 .hpd_absent = 200, 1928 .unprepare = 500, 1929 .enable = 200, 1930 .disable = 200, 1931 }; 1932 1933 static const struct panel_delay delay_200_500_e200_d10 = { 1934 .hpd_absent = 200, 1935 .unprepare = 500, 1936 .enable = 200, 1937 .disable = 10, 1938 }; 1939 1940 static const struct panel_delay delay_200_150_e200 = { 1941 .hpd_absent = 200, 1942 .unprepare = 150, 1943 .enable = 200, 1944 }; 1945 1946 static const struct panel_delay delay_200_500_e50_po2e200 = { 1947 .hpd_absent = 200, 1948 .unprepare = 500, 1949 .enable = 50, 1950 .powered_on_to_enable = 200, 1951 }; 1952 1953 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1954 { \ 1955 .ident = { \ 1956 .name = _name, \ 1957 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1958 product_id), \ 1959 }, \ 1960 .delay = _delay \ 1961 } 1962 1963 #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1964 { \ 1965 .ident = { \ 1966 .name = _name, \ 1967 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1968 product_id), \ 1969 }, \ 1970 .delay = _delay, \ 1971 .override_edid_mode = _mode \ 1972 } 1973 1974 /* 1975 * This table is used to figure out power sequencing delays for panels that 1976 * are detected by EDID. Entries here may point to entries in the 1977 * platform_of_match table (if a panel is listed in both places). 1978 * 1979 * Sort first by vendor, then by product ID. 1980 */ 1981 static const struct edp_panel_entry edp_panels[] = { 1982 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), 1983 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1984 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), 1985 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1986 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1987 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"), 1988 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"), 1989 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1990 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"), 1991 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"), 1992 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), 1993 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"), 1994 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0", 1995 &auo_b116xa3_mode), 1996 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), 1997 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1998 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1999 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), 2000 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), 2001 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), 2002 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 2003 EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"), 2004 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), 2005 2006 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), 2007 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"), 2008 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), 2009 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), 2010 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), 2011 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), 2012 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"), 2013 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"), 2014 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"), 2015 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"), 2016 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), 2017 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), 2018 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), 2019 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"), 2020 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), 2021 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 2022 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), 2023 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 2024 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), 2025 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"), 2026 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), 2027 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), 2028 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"), 2029 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 2030 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), 2031 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"), 2032 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), 2033 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), 2034 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 2035 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 2036 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"), 2037 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 2038 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"), 2039 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 2040 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 2041 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"), 2042 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"), 2043 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"), 2044 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 2045 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), 2046 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80, "NV116WHM-N49"), 2047 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 2048 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 2049 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"), 2050 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"), 2051 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"), 2052 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"), 2053 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"), 2054 2055 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), 2056 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"), 2057 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"), 2058 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 2059 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), 2060 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"), 2061 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), 2062 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 2063 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 2064 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 2065 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 2066 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), 2067 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"), 2068 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"), 2069 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"), 2070 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 2071 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"), 2072 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"), 2073 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"), 2074 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), 2075 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 2076 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4"), 2077 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"), 2078 2079 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_p2e200, "MNC207QS1-1"), 2080 2081 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"), 2082 2083 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), 2084 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "Unknown"), 2085 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"), 2086 2087 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"), 2088 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 2089 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 2090 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 2091 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"), 2092 2093 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), 2094 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 2095 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"), 2096 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 2097 2098 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"), 2099 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"), 2100 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), 2101 2102 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"), 2103 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"), 2104 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"), 2105 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"), 2106 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"), 2107 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"), 2108 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"), 2109 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"), 2110 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"), 2111 2112 EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"), 2113 2114 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 2115 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"), 2116 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 2117 2118 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 2119 2120 { /* sentinal */ } 2121 }; 2122 2123 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid) 2124 { 2125 const struct edp_panel_entry *panel; 2126 2127 if (!panel_id) 2128 return NULL; 2129 2130 /* 2131 * Match with identity first. This allows handling the case where 2132 * vendors incorrectly reused the same panel ID for multiple panels that 2133 * need different settings. If there's no match, try again with panel 2134 * ID, which should be unique. 2135 */ 2136 for (panel = edp_panels; panel->ident.panel_id; panel++) 2137 if (drm_edid_match(edid, &panel->ident)) 2138 return panel; 2139 2140 for (panel = edp_panels; panel->ident.panel_id; panel++) 2141 if (panel->ident.panel_id == panel_id) 2142 return panel; 2143 2144 return NULL; 2145 } 2146 2147 static int panel_edp_platform_probe(struct platform_device *pdev) 2148 { 2149 const struct of_device_id *id; 2150 2151 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 2152 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 2153 if (!id) 2154 return -ENODEV; 2155 2156 return panel_edp_probe(&pdev->dev, id->data, NULL); 2157 } 2158 2159 static void panel_edp_platform_remove(struct platform_device *pdev) 2160 { 2161 panel_edp_remove(&pdev->dev); 2162 } 2163 2164 static void panel_edp_platform_shutdown(struct platform_device *pdev) 2165 { 2166 panel_edp_shutdown(&pdev->dev); 2167 } 2168 2169 static const struct dev_pm_ops panel_edp_pm_ops = { 2170 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 2171 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 2172 pm_runtime_force_resume) 2173 }; 2174 2175 static struct platform_driver panel_edp_platform_driver = { 2176 .driver = { 2177 .name = "panel-edp", 2178 .of_match_table = platform_of_match, 2179 .pm = &panel_edp_pm_ops, 2180 }, 2181 .probe = panel_edp_platform_probe, 2182 .remove_new = panel_edp_platform_remove, 2183 .shutdown = panel_edp_platform_shutdown, 2184 }; 2185 2186 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 2187 { 2188 const struct of_device_id *id; 2189 2190 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 2191 if (!id) 2192 return -ENODEV; 2193 2194 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 2195 } 2196 2197 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 2198 { 2199 panel_edp_remove(&aux_ep->dev); 2200 } 2201 2202 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 2203 { 2204 panel_edp_shutdown(&aux_ep->dev); 2205 } 2206 2207 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2208 .driver = { 2209 .name = "panel-simple-dp-aux", 2210 .of_match_table = platform_of_match, /* Same as platform one! */ 2211 .pm = &panel_edp_pm_ops, 2212 }, 2213 .probe = panel_edp_dp_aux_ep_probe, 2214 .remove = panel_edp_dp_aux_ep_remove, 2215 .shutdown = panel_edp_dp_aux_ep_shutdown, 2216 }; 2217 2218 static int __init panel_edp_init(void) 2219 { 2220 int err; 2221 2222 err = platform_driver_register(&panel_edp_platform_driver); 2223 if (err < 0) 2224 return err; 2225 2226 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2227 if (err < 0) 2228 goto err_did_platform_register; 2229 2230 return 0; 2231 2232 err_did_platform_register: 2233 platform_driver_unregister(&panel_edp_platform_driver); 2234 2235 return err; 2236 } 2237 module_init(panel_edp_init); 2238 2239 static void __exit panel_edp_exit(void) 2240 { 2241 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2242 platform_driver_unregister(&panel_edp_platform_driver); 2243 } 2244 module_exit(panel_edp_exit); 2245 2246 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2247 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2248 MODULE_LICENSE("GPL and additional rights"); 2249