1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/debugfs.h> 25 #include <linux/delay.h> 26 #include <linux/gpio/consumer.h> 27 #include <linux/iopoll.h> 28 #include <linux/module.h> 29 #include <linux/of_platform.h> 30 #include <linux/platform_device.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/regulator/consumer.h> 33 34 #include <video/display_timing.h> 35 #include <video/of_display_timing.h> 36 #include <video/videomode.h> 37 38 #include <drm/display/drm_dp_aux_bus.h> 39 #include <drm/display/drm_dp_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_device.h> 42 #include <drm/drm_edid.h> 43 #include <drm/drm_panel.h> 44 45 /** 46 * struct panel_delay - Describes delays for a simple panel. 47 */ 48 struct panel_delay { 49 /** 50 * @hpd_reliable: Time for HPD to be reliable 51 * 52 * The time (in milliseconds) that it takes after powering the panel 53 * before the HPD signal is reliable. Ideally this is 0 but some panels, 54 * board designs, or bad pulldown configs can cause a glitch here. 55 * 56 * NOTE: on some old panel data this number appears to be much too big. 57 * Presumably some old panels simply didn't have HPD hooked up and put 58 * the hpd_absent here because this field predates the 59 * hpd_absent. While that works, it's non-ideal. 60 */ 61 unsigned int hpd_reliable; 62 63 /** 64 * @hpd_absent: Time to wait if HPD isn't hooked up. 65 * 66 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 67 * 68 * This is T3-max on eDP timing diagrams or the delay from power on 69 * until HPD is guaranteed to be asserted. 70 */ 71 unsigned int hpd_absent; 72 73 /** 74 * @powered_on_to_enable: Time between panel powered on and enable. 75 * 76 * The minimum time, in milliseconds, that needs to have passed 77 * between when panel powered on and enable may begin. 78 * 79 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the 80 * power supply enabled until we can turn the backlight on and see 81 * valid data. 82 * 83 * This doesn't normally need to be set if timings are already met by 84 * prepare_to_enable or enable. 85 */ 86 unsigned int powered_on_to_enable; 87 88 /** 89 * @prepare_to_enable: Time between prepare and enable. 90 * 91 * The minimum time, in milliseconds, that needs to have passed 92 * between when prepare finished and enable may begin. If at 93 * enable time less time has passed since prepare finished, 94 * the driver waits for the remaining time. 95 * 96 * If a fixed enable delay is also specified, we'll start 97 * counting before delaying for the fixed delay. 98 * 99 * If a fixed prepare delay is also specified, we won't start 100 * counting until after the fixed delay. We can't overlap this 101 * fixed delay with the min time because the fixed delay 102 * doesn't happen at the end of the function if a HPD GPIO was 103 * specified. 104 * 105 * In other words: 106 * prepare() 107 * ... 108 * // do fixed prepare delay 109 * // wait for HPD GPIO if applicable 110 * // start counting for prepare_to_enable 111 * 112 * enable() 113 * // do fixed enable delay 114 * // enforce prepare_to_enable min time 115 * 116 * This is not specified in a standard way on eDP timing diagrams. 117 * It is effectively the time from HPD going high till you can 118 * turn on the backlight. 119 */ 120 unsigned int prepare_to_enable; 121 122 /** 123 * @enable: Time for the panel to display a valid frame. 124 * 125 * The time (in milliseconds) that it takes for the panel to 126 * display the first valid frame after starting to receive 127 * video data. 128 * 129 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 130 * the delay after link training finishes until we can turn the 131 * backlight on and see valid data. 132 */ 133 unsigned int enable; 134 135 /** 136 * @disable: Time for the panel to turn the display off. 137 * 138 * The time (in milliseconds) that it takes for the panel to 139 * turn the display off (no content is visible). 140 * 141 * This is T9-min (delay from backlight off to end of valid video 142 * data) on eDP timing diagrams. It is not common to set. 143 */ 144 unsigned int disable; 145 146 /** 147 * @unprepare: Time to power down completely. 148 * 149 * The time (in milliseconds) that it takes for the panel 150 * to power itself down completely. 151 * 152 * This time is used to prevent a future "prepare" from 153 * starting until at least this many milliseconds has passed. 154 * If at prepare time less time has passed since unprepare 155 * finished, the driver waits for the remaining time. 156 * 157 * This is T12-min on eDP timing diagrams. 158 */ 159 unsigned int unprepare; 160 }; 161 162 /** 163 * struct panel_desc - Describes a simple panel. 164 */ 165 struct panel_desc { 166 /** 167 * @modes: Pointer to array of fixed modes appropriate for this panel. 168 * 169 * If only one mode then this can just be the address of the mode. 170 * NOTE: cannot be used with "timings" and also if this is specified 171 * then you cannot override the mode in the device tree. 172 */ 173 const struct drm_display_mode *modes; 174 175 /** @num_modes: Number of elements in modes array. */ 176 unsigned int num_modes; 177 178 /** 179 * @timings: Pointer to array of display timings 180 * 181 * NOTE: cannot be used with "modes" and also these will be used to 182 * validate a device tree override if one is present. 183 */ 184 const struct display_timing *timings; 185 186 /** @num_timings: Number of elements in timings array. */ 187 unsigned int num_timings; 188 189 /** @bpc: Bits per color. */ 190 unsigned int bpc; 191 192 /** @size: Structure containing the physical size of this panel. */ 193 struct { 194 /** 195 * @size.width: Width (in mm) of the active display area. 196 */ 197 unsigned int width; 198 199 /** 200 * @size.height: Height (in mm) of the active display area. 201 */ 202 unsigned int height; 203 } size; 204 205 /** @delay: Structure containing various delay values for this panel. */ 206 struct panel_delay delay; 207 }; 208 209 /** 210 * struct edp_panel_entry - Maps panel ID to delay / panel name. 211 */ 212 struct edp_panel_entry { 213 /** @ident: edid identity used for panel matching. */ 214 const struct drm_edid_ident ident; 215 216 /** @delay: The power sequencing delays needed for this panel. */ 217 const struct panel_delay *delay; 218 219 /** @override_edid_mode: Override the mode obtained by edid. */ 220 const struct drm_display_mode *override_edid_mode; 221 }; 222 223 struct panel_edp { 224 struct drm_panel base; 225 bool no_hpd; 226 227 ktime_t prepared_time; 228 ktime_t powered_on_time; 229 ktime_t unprepared_time; 230 231 const struct panel_desc *desc; 232 233 struct regulator *supply; 234 struct i2c_adapter *ddc; 235 struct drm_dp_aux *aux; 236 237 struct gpio_desc *enable_gpio; 238 struct gpio_desc *hpd_gpio; 239 240 const struct edp_panel_entry *detected_panel; 241 242 const struct drm_edid *drm_edid; 243 244 struct drm_display_mode override_mode; 245 246 enum drm_panel_orientation orientation; 247 }; 248 249 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 250 { 251 return container_of(panel, struct panel_edp, base); 252 } 253 254 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 255 struct drm_connector *connector) 256 { 257 struct drm_display_mode *mode; 258 unsigned int i, num = 0; 259 260 for (i = 0; i < panel->desc->num_timings; i++) { 261 const struct display_timing *dt = &panel->desc->timings[i]; 262 struct videomode vm; 263 264 videomode_from_timing(dt, &vm); 265 mode = drm_mode_create(connector->dev); 266 if (!mode) { 267 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 268 dt->hactive.typ, dt->vactive.typ); 269 continue; 270 } 271 272 drm_display_mode_from_videomode(&vm, mode); 273 274 mode->type |= DRM_MODE_TYPE_DRIVER; 275 276 if (panel->desc->num_timings == 1) 277 mode->type |= DRM_MODE_TYPE_PREFERRED; 278 279 drm_mode_probed_add(connector, mode); 280 num++; 281 } 282 283 return num; 284 } 285 286 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 287 struct drm_connector *connector) 288 { 289 struct drm_display_mode *mode; 290 unsigned int i, num = 0; 291 292 for (i = 0; i < panel->desc->num_modes; i++) { 293 const struct drm_display_mode *m = &panel->desc->modes[i]; 294 295 mode = drm_mode_duplicate(connector->dev, m); 296 if (!mode) { 297 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 298 m->hdisplay, m->vdisplay, 299 drm_mode_vrefresh(m)); 300 continue; 301 } 302 303 mode->type |= DRM_MODE_TYPE_DRIVER; 304 305 if (panel->desc->num_modes == 1) 306 mode->type |= DRM_MODE_TYPE_PREFERRED; 307 308 drm_mode_set_name(mode); 309 310 drm_mode_probed_add(connector, mode); 311 num++; 312 } 313 314 return num; 315 } 316 317 static int panel_edp_override_edid_mode(struct panel_edp *panel, 318 struct drm_connector *connector, 319 const struct drm_display_mode *override_mode) 320 { 321 struct drm_display_mode *mode; 322 323 mode = drm_mode_duplicate(connector->dev, override_mode); 324 if (!mode) { 325 dev_err(panel->base.dev, "failed to add additional mode\n"); 326 return 0; 327 } 328 329 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 330 drm_mode_set_name(mode); 331 drm_mode_probed_add(connector, mode); 332 return 1; 333 } 334 335 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 336 struct drm_connector *connector) 337 { 338 struct drm_display_mode *mode; 339 bool has_override = panel->override_mode.type; 340 unsigned int num = 0; 341 342 if (!panel->desc) 343 return 0; 344 345 if (has_override) { 346 mode = drm_mode_duplicate(connector->dev, 347 &panel->override_mode); 348 if (mode) { 349 drm_mode_probed_add(connector, mode); 350 num = 1; 351 } else { 352 dev_err(panel->base.dev, "failed to add override mode\n"); 353 } 354 } 355 356 /* Only add timings if override was not there or failed to validate */ 357 if (num == 0 && panel->desc->num_timings) 358 num = panel_edp_get_timings_modes(panel, connector); 359 360 /* 361 * Only add fixed modes if timings/override added no mode. 362 * 363 * We should only ever have either the display timings specified 364 * or a fixed mode. Anything else is rather bogus. 365 */ 366 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 367 if (num == 0) 368 num = panel_edp_get_display_modes(panel, connector); 369 370 connector->display_info.bpc = panel->desc->bpc; 371 connector->display_info.width_mm = panel->desc->size.width; 372 connector->display_info.height_mm = panel->desc->size.height; 373 374 return num; 375 } 376 377 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 378 { 379 ktime_t now_ktime, min_ktime; 380 381 if (!min_ms) 382 return; 383 384 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 385 now_ktime = ktime_get_boottime(); 386 387 if (ktime_before(now_ktime, min_ktime)) 388 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 389 } 390 391 static int panel_edp_disable(struct drm_panel *panel) 392 { 393 struct panel_edp *p = to_panel_edp(panel); 394 395 if (p->desc->delay.disable) 396 msleep(p->desc->delay.disable); 397 398 return 0; 399 } 400 401 static int panel_edp_suspend(struct device *dev) 402 { 403 struct panel_edp *p = dev_get_drvdata(dev); 404 405 drm_dp_dpcd_set_powered(p->aux, false); 406 gpiod_set_value_cansleep(p->enable_gpio, 0); 407 regulator_disable(p->supply); 408 p->unprepared_time = ktime_get_boottime(); 409 410 return 0; 411 } 412 413 static int panel_edp_unprepare(struct drm_panel *panel) 414 { 415 int ret; 416 417 ret = pm_runtime_put_sync_suspend(panel->dev); 418 if (ret < 0) 419 return ret; 420 421 return 0; 422 } 423 424 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 425 { 426 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 427 if (IS_ERR(p->hpd_gpio)) 428 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 429 "failed to get 'hpd' GPIO\n"); 430 431 return 0; 432 } 433 434 static bool panel_edp_can_read_hpd(struct panel_edp *p) 435 { 436 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 437 } 438 439 static int panel_edp_prepare_once(struct panel_edp *p) 440 { 441 struct device *dev = p->base.dev; 442 unsigned int delay; 443 int err; 444 int hpd_asserted; 445 unsigned long hpd_wait_us; 446 447 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 448 449 err = regulator_enable(p->supply); 450 if (err < 0) { 451 dev_err(dev, "failed to enable supply: %d\n", err); 452 return err; 453 } 454 455 gpiod_set_value_cansleep(p->enable_gpio, 1); 456 drm_dp_dpcd_set_powered(p->aux, true); 457 458 p->powered_on_time = ktime_get_boottime(); 459 460 delay = p->desc->delay.hpd_reliable; 461 if (p->no_hpd) 462 delay = max(delay, p->desc->delay.hpd_absent); 463 if (delay) 464 msleep(delay); 465 466 if (panel_edp_can_read_hpd(p)) { 467 if (p->desc->delay.hpd_absent) 468 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 469 else 470 hpd_wait_us = 2000000; 471 472 if (p->hpd_gpio) { 473 err = readx_poll_timeout(gpiod_get_value_cansleep, 474 p->hpd_gpio, hpd_asserted, 475 hpd_asserted, 1000, hpd_wait_us); 476 if (hpd_asserted < 0) 477 err = hpd_asserted; 478 } else { 479 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 480 } 481 482 if (err) { 483 if (err != -ETIMEDOUT) 484 dev_err(dev, 485 "error waiting for hpd GPIO: %d\n", err); 486 goto error; 487 } 488 } 489 490 p->prepared_time = ktime_get_boottime(); 491 492 return 0; 493 494 error: 495 drm_dp_dpcd_set_powered(p->aux, false); 496 gpiod_set_value_cansleep(p->enable_gpio, 0); 497 regulator_disable(p->supply); 498 p->unprepared_time = ktime_get_boottime(); 499 500 return err; 501 } 502 503 /* 504 * Some panels simply don't always come up and need to be power cycled to 505 * work properly. We'll allow for a handful of retries. 506 */ 507 #define MAX_PANEL_PREPARE_TRIES 5 508 509 static int panel_edp_resume(struct device *dev) 510 { 511 struct panel_edp *p = dev_get_drvdata(dev); 512 int ret; 513 int try; 514 515 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 516 ret = panel_edp_prepare_once(p); 517 if (ret != -ETIMEDOUT) 518 break; 519 } 520 521 if (ret == -ETIMEDOUT) 522 dev_err(dev, "Prepare timeout after %d tries\n", try); 523 else if (try) 524 dev_warn(dev, "Prepare needed %d retries\n", try); 525 526 return ret; 527 } 528 529 static int panel_edp_prepare(struct drm_panel *panel) 530 { 531 int ret; 532 533 ret = pm_runtime_get_sync(panel->dev); 534 if (ret < 0) { 535 pm_runtime_put_autosuspend(panel->dev); 536 return ret; 537 } 538 539 return 0; 540 } 541 542 static int panel_edp_enable(struct drm_panel *panel) 543 { 544 struct panel_edp *p = to_panel_edp(panel); 545 unsigned int delay; 546 547 delay = p->desc->delay.enable; 548 549 /* 550 * If there is a "prepare_to_enable" delay then that's supposed to be 551 * the delay from HPD going high until we can turn the backlight on. 552 * However, we can only count this if HPD is readable by the panel 553 * driver. 554 * 555 * If we aren't handling the HPD pin ourselves then the best we 556 * can do is assume that HPD went high immediately before we were 557 * called (and link training took zero time). Note that "no-hpd" 558 * actually counts as handling HPD ourselves since we're doing the 559 * worst case delay (in prepare) ourselves. 560 * 561 * NOTE: if we ever end up in this "if" statement then we're 562 * guaranteed that the panel_edp_wait() call below will do no delay. 563 * It already handles that case, though, so we don't need any special 564 * code for it. 565 */ 566 if (p->desc->delay.prepare_to_enable && 567 !panel_edp_can_read_hpd(p) && !p->no_hpd) 568 delay = max(delay, p->desc->delay.prepare_to_enable); 569 570 if (delay) 571 msleep(delay); 572 573 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 574 575 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); 576 577 return 0; 578 } 579 580 static int panel_edp_get_modes(struct drm_panel *panel, 581 struct drm_connector *connector) 582 { 583 struct panel_edp *p = to_panel_edp(panel); 584 int num = 0; 585 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; 586 bool has_override_edid_mode = p->detected_panel && 587 p->detected_panel != ERR_PTR(-EINVAL) && 588 p->detected_panel->override_edid_mode; 589 590 /* probe EDID if a DDC bus is available */ 591 if (p->ddc) { 592 pm_runtime_get_sync(panel->dev); 593 594 if (!p->drm_edid) 595 p->drm_edid = drm_edid_read_ddc(connector, p->ddc); 596 597 drm_edid_connector_update(connector, p->drm_edid); 598 599 /* 600 * If both edid and hard-coded modes exists, skip edid modes to 601 * avoid multiple preferred modes. 602 */ 603 if (p->drm_edid && !has_hard_coded_modes) { 604 if (has_override_edid_mode) { 605 /* 606 * override_edid_mode is specified. Use 607 * override_edid_mode instead of from edid. 608 */ 609 num += panel_edp_override_edid_mode(p, connector, 610 p->detected_panel->override_edid_mode); 611 } else { 612 num += drm_edid_connector_add_modes(connector); 613 } 614 } 615 616 pm_runtime_mark_last_busy(panel->dev); 617 pm_runtime_put_autosuspend(panel->dev); 618 } 619 620 if (has_hard_coded_modes) 621 num += panel_edp_get_non_edid_modes(p, connector); 622 else if (!num) 623 dev_warn(p->base.dev, "No display modes\n"); 624 625 /* 626 * TODO: Remove once all drm drivers call 627 * drm_connector_set_orientation_from_panel() 628 */ 629 drm_connector_set_panel_orientation(connector, p->orientation); 630 631 return num; 632 } 633 634 static int panel_edp_get_timings(struct drm_panel *panel, 635 unsigned int num_timings, 636 struct display_timing *timings) 637 { 638 struct panel_edp *p = to_panel_edp(panel); 639 unsigned int i; 640 641 if (p->desc->num_timings < num_timings) 642 num_timings = p->desc->num_timings; 643 644 if (timings) 645 for (i = 0; i < num_timings; i++) 646 timings[i] = p->desc->timings[i]; 647 648 return p->desc->num_timings; 649 } 650 651 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 652 { 653 struct panel_edp *p = to_panel_edp(panel); 654 655 return p->orientation; 656 } 657 658 static int detected_panel_show(struct seq_file *s, void *data) 659 { 660 struct drm_panel *panel = s->private; 661 struct panel_edp *p = to_panel_edp(panel); 662 663 if (IS_ERR(p->detected_panel)) 664 seq_puts(s, "UNKNOWN\n"); 665 else if (!p->detected_panel) 666 seq_puts(s, "HARDCODED\n"); 667 else 668 seq_printf(s, "%s\n", p->detected_panel->ident.name); 669 670 return 0; 671 } 672 673 DEFINE_SHOW_ATTRIBUTE(detected_panel); 674 675 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 676 { 677 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 678 } 679 680 static const struct drm_panel_funcs panel_edp_funcs = { 681 .disable = panel_edp_disable, 682 .unprepare = panel_edp_unprepare, 683 .prepare = panel_edp_prepare, 684 .enable = panel_edp_enable, 685 .get_modes = panel_edp_get_modes, 686 .get_orientation = panel_edp_get_orientation, 687 .get_timings = panel_edp_get_timings, 688 .debugfs_init = panel_edp_debugfs_init, 689 }; 690 691 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 692 (to_check->field.typ >= bounds->field.min && \ 693 to_check->field.typ <= bounds->field.max) 694 static void panel_edp_parse_panel_timing_node(struct device *dev, 695 struct panel_edp *panel, 696 const struct display_timing *ot) 697 { 698 const struct panel_desc *desc = panel->desc; 699 struct videomode vm; 700 unsigned int i; 701 702 if (WARN_ON(desc->num_modes)) { 703 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 704 return; 705 } 706 if (WARN_ON(!desc->num_timings)) { 707 dev_err(dev, "Reject override mode: no timings specified\n"); 708 return; 709 } 710 711 for (i = 0; i < panel->desc->num_timings; i++) { 712 const struct display_timing *dt = &panel->desc->timings[i]; 713 714 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 715 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 716 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 717 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 718 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 719 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 720 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 721 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 722 continue; 723 724 if (ot->flags != dt->flags) 725 continue; 726 727 videomode_from_timing(ot, &vm); 728 drm_display_mode_from_videomode(&vm, &panel->override_mode); 729 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 730 DRM_MODE_TYPE_PREFERRED; 731 break; 732 } 733 734 if (WARN_ON(!panel->override_mode.type)) 735 dev_err(dev, "Reject override mode: No display_timing found\n"); 736 } 737 738 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid); 739 740 static void panel_edp_set_conservative_timings(struct panel_edp *panel, struct panel_desc *desc) 741 { 742 /* 743 * It's highly likely that the panel will work if we use very 744 * conservative timings, so let's do that. 745 * 746 * Nearly all panels have a "unprepare" delay of 500 ms though 747 * there are a few with 1000. Let's stick 2000 in just to be 748 * super conservative. 749 * 750 * An "enable" delay of 80 ms seems the most common, but we'll 751 * throw in 200 ms to be safe. 752 */ 753 desc->delay.unprepare = 2000; 754 desc->delay.enable = 200; 755 756 panel->detected_panel = ERR_PTR(-EINVAL); 757 } 758 759 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 760 { 761 struct panel_desc *desc; 762 const struct drm_edid *base_block; 763 u32 panel_id; 764 char vend[4]; 765 u16 product_id; 766 u32 reliable_ms = 0; 767 u32 absent_ms = 0; 768 int ret; 769 770 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 771 if (!desc) 772 return -ENOMEM; 773 panel->desc = desc; 774 775 /* 776 * Read the dts properties for the initial probe. These are used by 777 * the runtime resume code which will get called by the 778 * pm_runtime_get_sync() call below. 779 */ 780 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 781 desc->delay.hpd_reliable = reliable_ms; 782 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 783 desc->delay.hpd_absent = absent_ms; 784 785 /* Power the panel on so we can read the EDID */ 786 ret = pm_runtime_get_sync(dev); 787 if (ret < 0) { 788 dev_err(dev, 789 "Couldn't power on panel to ID it; using conservative timings: %d\n", 790 ret); 791 panel_edp_set_conservative_timings(panel, desc); 792 goto exit; 793 } 794 795 base_block = drm_edid_read_base_block(panel->ddc); 796 if (base_block) { 797 panel_id = drm_edid_get_panel_id(base_block); 798 } else { 799 dev_err(dev, "Couldn't read EDID for ID; using conservative timings\n"); 800 panel_edp_set_conservative_timings(panel, desc); 801 goto exit; 802 } 803 drm_edid_decode_panel_id(panel_id, vend, &product_id); 804 805 panel->detected_panel = find_edp_panel(panel_id, base_block); 806 807 drm_edid_free(base_block); 808 809 /* 810 * We're using non-optimized timings and want it really obvious that 811 * someone needs to add an entry to the table, so we'll do a WARN_ON 812 * splat. 813 */ 814 if (WARN_ON(!panel->detected_panel)) { 815 dev_warn(dev, 816 "Unknown panel %s %#06x, using conservative timings\n", 817 vend, product_id); 818 panel_edp_set_conservative_timings(panel, desc); 819 } else { 820 dev_info(dev, "Detected %s %s (%#06x)\n", 821 vend, panel->detected_panel->ident.name, product_id); 822 823 /* Update the delay; everything else comes from EDID */ 824 desc->delay = *panel->detected_panel->delay; 825 } 826 827 exit: 828 pm_runtime_mark_last_busy(dev); 829 pm_runtime_put_autosuspend(dev); 830 831 return 0; 832 } 833 834 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 835 struct drm_dp_aux *aux) 836 { 837 struct panel_edp *panel; 838 struct display_timing dt; 839 struct device_node *ddc; 840 int err; 841 842 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); 843 if (!panel) 844 return -ENOMEM; 845 846 panel->prepared_time = 0; 847 panel->desc = desc; 848 panel->aux = aux; 849 850 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 851 if (!panel->no_hpd) { 852 err = panel_edp_get_hpd_gpio(dev, panel); 853 if (err) 854 return err; 855 } 856 857 panel->supply = devm_regulator_get(dev, "power"); 858 if (IS_ERR(panel->supply)) 859 return PTR_ERR(panel->supply); 860 861 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 862 GPIOD_OUT_LOW); 863 if (IS_ERR(panel->enable_gpio)) 864 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 865 "failed to request GPIO\n"); 866 867 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation); 868 if (err) { 869 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 870 return err; 871 } 872 873 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 874 if (ddc) { 875 panel->ddc = of_find_i2c_adapter_by_node(ddc); 876 of_node_put(ddc); 877 878 if (!panel->ddc) 879 return -EPROBE_DEFER; 880 } else if (aux) { 881 panel->ddc = &aux->ddc; 882 } 883 884 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 885 panel_edp_parse_panel_timing_node(dev, panel, &dt); 886 887 dev_set_drvdata(dev, panel); 888 889 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 890 891 err = drm_panel_of_backlight(&panel->base); 892 if (err) 893 goto err_finished_ddc_init; 894 895 /* 896 * We use runtime PM for prepare / unprepare since those power the panel 897 * on and off and those can be very slow operations. This is important 898 * to optimize powering the panel on briefly to read the EDID before 899 * fully enabling the panel. 900 */ 901 pm_runtime_enable(dev); 902 pm_runtime_set_autosuspend_delay(dev, 1000); 903 pm_runtime_use_autosuspend(dev); 904 905 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 906 err = generic_edp_panel_probe(dev, panel); 907 if (err) { 908 dev_err_probe(dev, err, 909 "Couldn't detect panel nor find a fallback\n"); 910 goto err_finished_pm_runtime; 911 } 912 /* generic_edp_panel_probe() replaces desc in the panel */ 913 desc = panel->desc; 914 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 915 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 916 } 917 918 if (!panel->base.backlight && panel->aux) { 919 pm_runtime_get_sync(dev); 920 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 921 pm_runtime_mark_last_busy(dev); 922 pm_runtime_put_autosuspend(dev); 923 924 /* 925 * Warn if we get an error, but don't consider it fatal. Having 926 * a panel where we can't control the backlight is better than 927 * no panel. 928 */ 929 if (err) 930 dev_warn(dev, "failed to register dp aux backlight: %d\n", err); 931 } 932 933 drm_panel_add(&panel->base); 934 935 return 0; 936 937 err_finished_pm_runtime: 938 pm_runtime_dont_use_autosuspend(dev); 939 pm_runtime_disable(dev); 940 err_finished_ddc_init: 941 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 942 put_device(&panel->ddc->dev); 943 944 return err; 945 } 946 947 static void panel_edp_shutdown(struct device *dev) 948 { 949 struct panel_edp *panel = dev_get_drvdata(dev); 950 951 /* 952 * NOTE: the following two calls don't really belong here. It is the 953 * responsibility of a correctly written DRM modeset driver to call 954 * drm_atomic_helper_shutdown() at shutdown time and that should 955 * cause the panel to be disabled / unprepared if needed. For now, 956 * however, we'll keep these calls due to the sheer number of 957 * different DRM modeset drivers used with panel-edp. The fact that 958 * we're calling these and _also_ the drm_atomic_helper_shutdown() 959 * will try to disable/unprepare means that we can get a warning about 960 * trying to disable/unprepare an already disabled/unprepared panel, 961 * but that's something we'll have to live with until we've confirmed 962 * that all DRM modeset drivers are properly calling 963 * drm_atomic_helper_shutdown(). 964 */ 965 drm_panel_disable(&panel->base); 966 drm_panel_unprepare(&panel->base); 967 } 968 969 static void panel_edp_remove(struct device *dev) 970 { 971 struct panel_edp *panel = dev_get_drvdata(dev); 972 973 drm_panel_remove(&panel->base); 974 panel_edp_shutdown(dev); 975 976 pm_runtime_dont_use_autosuspend(dev); 977 pm_runtime_disable(dev); 978 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 979 put_device(&panel->ddc->dev); 980 981 drm_edid_free(panel->drm_edid); 982 panel->drm_edid = NULL; 983 } 984 985 static const struct display_timing auo_b101ean01_timing = { 986 .pixelclock = { 65300000, 72500000, 75000000 }, 987 .hactive = { 1280, 1280, 1280 }, 988 .hfront_porch = { 18, 119, 119 }, 989 .hback_porch = { 21, 21, 21 }, 990 .hsync_len = { 32, 32, 32 }, 991 .vactive = { 800, 800, 800 }, 992 .vfront_porch = { 4, 4, 4 }, 993 .vback_porch = { 8, 8, 8 }, 994 .vsync_len = { 18, 20, 20 }, 995 }; 996 997 static const struct panel_desc auo_b101ean01 = { 998 .timings = &auo_b101ean01_timing, 999 .num_timings = 1, 1000 .bpc = 6, 1001 .size = { 1002 .width = 217, 1003 .height = 136, 1004 }, 1005 }; 1006 1007 static const struct drm_display_mode auo_b116xa3_mode = { 1008 .clock = 70589, 1009 .hdisplay = 1366, 1010 .hsync_start = 1366 + 40, 1011 .hsync_end = 1366 + 40 + 40, 1012 .htotal = 1366 + 40 + 40 + 32, 1013 .vdisplay = 768, 1014 .vsync_start = 768 + 10, 1015 .vsync_end = 768 + 10 + 12, 1016 .vtotal = 768 + 10 + 12 + 6, 1017 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1018 }; 1019 1020 static const struct drm_display_mode auo_b116xak01_mode = { 1021 .clock = 69300, 1022 .hdisplay = 1366, 1023 .hsync_start = 1366 + 48, 1024 .hsync_end = 1366 + 48 + 32, 1025 .htotal = 1366 + 48 + 32 + 10, 1026 .vdisplay = 768, 1027 .vsync_start = 768 + 4, 1028 .vsync_end = 768 + 4 + 6, 1029 .vtotal = 768 + 4 + 6 + 15, 1030 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1031 }; 1032 1033 static const struct panel_desc auo_b116xak01 = { 1034 .modes = &auo_b116xak01_mode, 1035 .num_modes = 1, 1036 .bpc = 6, 1037 .size = { 1038 .width = 256, 1039 .height = 144, 1040 }, 1041 .delay = { 1042 .hpd_absent = 200, 1043 .unprepare = 500, 1044 .enable = 50, 1045 }, 1046 }; 1047 1048 static const struct drm_display_mode auo_b133han05_mode = { 1049 .clock = 142600, 1050 .hdisplay = 1920, 1051 .hsync_start = 1920 + 58, 1052 .hsync_end = 1920 + 58 + 42, 1053 .htotal = 1920 + 58 + 42 + 60, 1054 .vdisplay = 1080, 1055 .vsync_start = 1080 + 3, 1056 .vsync_end = 1080 + 3 + 5, 1057 .vtotal = 1080 + 3 + 5 + 54, 1058 }; 1059 1060 static const struct panel_desc auo_b133han05 = { 1061 .modes = &auo_b133han05_mode, 1062 .num_modes = 1, 1063 .bpc = 8, 1064 .size = { 1065 .width = 293, 1066 .height = 165, 1067 }, 1068 .delay = { 1069 .hpd_reliable = 100, 1070 .enable = 20, 1071 .unprepare = 50, 1072 }, 1073 }; 1074 1075 static const struct drm_display_mode auo_b133htn01_mode = { 1076 .clock = 150660, 1077 .hdisplay = 1920, 1078 .hsync_start = 1920 + 172, 1079 .hsync_end = 1920 + 172 + 80, 1080 .htotal = 1920 + 172 + 80 + 60, 1081 .vdisplay = 1080, 1082 .vsync_start = 1080 + 25, 1083 .vsync_end = 1080 + 25 + 10, 1084 .vtotal = 1080 + 25 + 10 + 10, 1085 }; 1086 1087 static const struct panel_desc auo_b133htn01 = { 1088 .modes = &auo_b133htn01_mode, 1089 .num_modes = 1, 1090 .bpc = 6, 1091 .size = { 1092 .width = 293, 1093 .height = 165, 1094 }, 1095 .delay = { 1096 .hpd_reliable = 105, 1097 .enable = 20, 1098 .unprepare = 50, 1099 }, 1100 }; 1101 1102 static const struct drm_display_mode auo_b133xtn01_mode = { 1103 .clock = 69500, 1104 .hdisplay = 1366, 1105 .hsync_start = 1366 + 48, 1106 .hsync_end = 1366 + 48 + 32, 1107 .htotal = 1366 + 48 + 32 + 20, 1108 .vdisplay = 768, 1109 .vsync_start = 768 + 3, 1110 .vsync_end = 768 + 3 + 6, 1111 .vtotal = 768 + 3 + 6 + 13, 1112 }; 1113 1114 static const struct panel_desc auo_b133xtn01 = { 1115 .modes = &auo_b133xtn01_mode, 1116 .num_modes = 1, 1117 .bpc = 6, 1118 .size = { 1119 .width = 293, 1120 .height = 165, 1121 }, 1122 }; 1123 1124 static const struct drm_display_mode auo_b140han06_mode = { 1125 .clock = 141000, 1126 .hdisplay = 1920, 1127 .hsync_start = 1920 + 16, 1128 .hsync_end = 1920 + 16 + 16, 1129 .htotal = 1920 + 16 + 16 + 152, 1130 .vdisplay = 1080, 1131 .vsync_start = 1080 + 3, 1132 .vsync_end = 1080 + 3 + 14, 1133 .vtotal = 1080 + 3 + 14 + 19, 1134 }; 1135 1136 static const struct panel_desc auo_b140han06 = { 1137 .modes = &auo_b140han06_mode, 1138 .num_modes = 1, 1139 .bpc = 8, 1140 .size = { 1141 .width = 309, 1142 .height = 174, 1143 }, 1144 .delay = { 1145 .hpd_reliable = 100, 1146 .enable = 20, 1147 .unprepare = 50, 1148 }, 1149 }; 1150 1151 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1152 { 1153 .clock = 71900, 1154 .hdisplay = 1280, 1155 .hsync_start = 1280 + 48, 1156 .hsync_end = 1280 + 48 + 32, 1157 .htotal = 1280 + 48 + 32 + 80, 1158 .vdisplay = 800, 1159 .vsync_start = 800 + 3, 1160 .vsync_end = 800 + 3 + 5, 1161 .vtotal = 800 + 3 + 5 + 24, 1162 }, 1163 { 1164 .clock = 57500, 1165 .hdisplay = 1280, 1166 .hsync_start = 1280 + 48, 1167 .hsync_end = 1280 + 48 + 32, 1168 .htotal = 1280 + 48 + 32 + 80, 1169 .vdisplay = 800, 1170 .vsync_start = 800 + 3, 1171 .vsync_end = 800 + 3 + 5, 1172 .vtotal = 800 + 3 + 5 + 24, 1173 }, 1174 }; 1175 1176 static const struct panel_desc boe_nv101wxmn51 = { 1177 .modes = boe_nv101wxmn51_modes, 1178 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1179 .bpc = 8, 1180 .size = { 1181 .width = 217, 1182 .height = 136, 1183 }, 1184 .delay = { 1185 /* TODO: should be hpd-absent and no-hpd should be set? */ 1186 .hpd_reliable = 210, 1187 .enable = 50, 1188 .unprepare = 160, 1189 }, 1190 }; 1191 1192 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1193 { 1194 .clock = 207800, 1195 .hdisplay = 2160, 1196 .hsync_start = 2160 + 48, 1197 .hsync_end = 2160 + 48 + 32, 1198 .htotal = 2160 + 48 + 32 + 100, 1199 .vdisplay = 1440, 1200 .vsync_start = 1440 + 3, 1201 .vsync_end = 1440 + 3 + 6, 1202 .vtotal = 1440 + 3 + 6 + 31, 1203 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1204 }, 1205 { 1206 .clock = 138500, 1207 .hdisplay = 2160, 1208 .hsync_start = 2160 + 48, 1209 .hsync_end = 2160 + 48 + 32, 1210 .htotal = 2160 + 48 + 32 + 100, 1211 .vdisplay = 1440, 1212 .vsync_start = 1440 + 3, 1213 .vsync_end = 1440 + 3 + 6, 1214 .vtotal = 1440 + 3 + 6 + 31, 1215 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1216 }, 1217 }; 1218 1219 static const struct panel_desc boe_nv110wtm_n61 = { 1220 .modes = boe_nv110wtm_n61_modes, 1221 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1222 .bpc = 8, 1223 .size = { 1224 .width = 233, 1225 .height = 155, 1226 }, 1227 .delay = { 1228 .hpd_absent = 200, 1229 .prepare_to_enable = 80, 1230 .enable = 50, 1231 .unprepare = 500, 1232 }, 1233 }; 1234 1235 /* Also used for boe_nv133fhm_n62 */ 1236 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1237 .clock = 147840, 1238 .hdisplay = 1920, 1239 .hsync_start = 1920 + 48, 1240 .hsync_end = 1920 + 48 + 32, 1241 .htotal = 1920 + 48 + 32 + 200, 1242 .vdisplay = 1080, 1243 .vsync_start = 1080 + 3, 1244 .vsync_end = 1080 + 3 + 6, 1245 .vtotal = 1080 + 3 + 6 + 31, 1246 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1247 }; 1248 1249 /* Also used for boe_nv133fhm_n62 */ 1250 static const struct panel_desc boe_nv133fhm_n61 = { 1251 .modes = &boe_nv133fhm_n61_modes, 1252 .num_modes = 1, 1253 .bpc = 6, 1254 .size = { 1255 .width = 294, 1256 .height = 165, 1257 }, 1258 .delay = { 1259 /* 1260 * When power is first given to the panel there's a short 1261 * spike on the HPD line. It was explained that this spike 1262 * was until the TCON data download was complete. On 1263 * one system this was measured at 8 ms. We'll put 15 ms 1264 * in the prepare delay just to be safe. That means: 1265 * - If HPD isn't hooked up you still have 200 ms delay. 1266 * - If HPD is hooked up we won't try to look at it for the 1267 * first 15 ms. 1268 */ 1269 .hpd_reliable = 15, 1270 .hpd_absent = 200, 1271 1272 .unprepare = 500, 1273 }, 1274 }; 1275 1276 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1277 { 1278 .clock = 148500, 1279 .hdisplay = 1920, 1280 .hsync_start = 1920 + 48, 1281 .hsync_end = 1920 + 48 + 32, 1282 .htotal = 2200, 1283 .vdisplay = 1080, 1284 .vsync_start = 1080 + 3, 1285 .vsync_end = 1080 + 3 + 5, 1286 .vtotal = 1125, 1287 }, 1288 }; 1289 1290 static const struct panel_desc boe_nv140fhmn49 = { 1291 .modes = boe_nv140fhmn49_modes, 1292 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1293 .bpc = 6, 1294 .size = { 1295 .width = 309, 1296 .height = 174, 1297 }, 1298 .delay = { 1299 /* TODO: should be hpd-absent and no-hpd should be set? */ 1300 .hpd_reliable = 210, 1301 .enable = 50, 1302 .unprepare = 160, 1303 }, 1304 }; 1305 1306 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1307 .clock = 76420, 1308 .hdisplay = 1366, 1309 .hsync_start = 1366 + 136, 1310 .hsync_end = 1366 + 136 + 30, 1311 .htotal = 1366 + 136 + 30 + 60, 1312 .vdisplay = 768, 1313 .vsync_start = 768 + 8, 1314 .vsync_end = 768 + 8 + 12, 1315 .vtotal = 768 + 8 + 12 + 12, 1316 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1317 }; 1318 1319 static const struct panel_desc innolux_n116bca_ea1 = { 1320 .modes = &innolux_n116bca_ea1_mode, 1321 .num_modes = 1, 1322 .bpc = 6, 1323 .size = { 1324 .width = 256, 1325 .height = 144, 1326 }, 1327 .delay = { 1328 .hpd_absent = 200, 1329 .enable = 80, 1330 .disable = 50, 1331 .unprepare = 500, 1332 }, 1333 }; 1334 1335 /* 1336 * Datasheet specifies that at 60 Hz refresh rate: 1337 * - total horizontal time: { 1506, 1592, 1716 } 1338 * - total vertical time: { 788, 800, 868 } 1339 * 1340 * ...but doesn't go into exactly how that should be split into a front 1341 * porch, back porch, or sync length. For now we'll leave a single setting 1342 * here which allows a bit of tweaking of the pixel clock at the expense of 1343 * refresh rate. 1344 */ 1345 static const struct display_timing innolux_n116bge_timing = { 1346 .pixelclock = { 72600000, 76420000, 80240000 }, 1347 .hactive = { 1366, 1366, 1366 }, 1348 .hfront_porch = { 136, 136, 136 }, 1349 .hback_porch = { 60, 60, 60 }, 1350 .hsync_len = { 30, 30, 30 }, 1351 .vactive = { 768, 768, 768 }, 1352 .vfront_porch = { 8, 8, 8 }, 1353 .vback_porch = { 12, 12, 12 }, 1354 .vsync_len = { 12, 12, 12 }, 1355 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1356 }; 1357 1358 static const struct panel_desc innolux_n116bge = { 1359 .timings = &innolux_n116bge_timing, 1360 .num_timings = 1, 1361 .bpc = 6, 1362 .size = { 1363 .width = 256, 1364 .height = 144, 1365 }, 1366 }; 1367 1368 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1369 .clock = 162000, 1370 .hdisplay = 1920, 1371 .hsync_start = 1920 + 40, 1372 .hsync_end = 1920 + 40 + 40, 1373 .htotal = 1920 + 40 + 40 + 80, 1374 .vdisplay = 1080, 1375 .vsync_start = 1080 + 4, 1376 .vsync_end = 1080 + 4 + 4, 1377 .vtotal = 1080 + 4 + 4 + 24, 1378 }; 1379 1380 static const struct panel_desc innolux_n125hce_gn1 = { 1381 .modes = &innolux_n125hce_gn1_mode, 1382 .num_modes = 1, 1383 .bpc = 8, 1384 .size = { 1385 .width = 276, 1386 .height = 155, 1387 }, 1388 }; 1389 1390 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1391 .clock = 206016, 1392 .hdisplay = 2160, 1393 .hsync_start = 2160 + 48, 1394 .hsync_end = 2160 + 48 + 32, 1395 .htotal = 2160 + 48 + 32 + 80, 1396 .vdisplay = 1440, 1397 .vsync_start = 1440 + 3, 1398 .vsync_end = 1440 + 3 + 10, 1399 .vtotal = 1440 + 3 + 10 + 27, 1400 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1401 }; 1402 1403 static const struct panel_desc innolux_p120zdg_bf1 = { 1404 .modes = &innolux_p120zdg_bf1_mode, 1405 .num_modes = 1, 1406 .bpc = 8, 1407 .size = { 1408 .width = 254, 1409 .height = 169, 1410 }, 1411 .delay = { 1412 .hpd_absent = 200, 1413 .unprepare = 500, 1414 }, 1415 }; 1416 1417 static const struct drm_display_mode ivo_m133nwf4_r0_mode = { 1418 .clock = 138778, 1419 .hdisplay = 1920, 1420 .hsync_start = 1920 + 24, 1421 .hsync_end = 1920 + 24 + 48, 1422 .htotal = 1920 + 24 + 48 + 88, 1423 .vdisplay = 1080, 1424 .vsync_start = 1080 + 3, 1425 .vsync_end = 1080 + 3 + 12, 1426 .vtotal = 1080 + 3 + 12 + 17, 1427 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1428 }; 1429 1430 static const struct panel_desc ivo_m133nwf4_r0 = { 1431 .modes = &ivo_m133nwf4_r0_mode, 1432 .num_modes = 1, 1433 .bpc = 8, 1434 .size = { 1435 .width = 294, 1436 .height = 165, 1437 }, 1438 .delay = { 1439 .hpd_absent = 200, 1440 .unprepare = 500, 1441 }, 1442 }; 1443 1444 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1445 .clock = 81000, 1446 .hdisplay = 1366, 1447 .hsync_start = 1366 + 40, 1448 .hsync_end = 1366 + 40 + 32, 1449 .htotal = 1366 + 40 + 32 + 62, 1450 .vdisplay = 768, 1451 .vsync_start = 768 + 5, 1452 .vsync_end = 768 + 5 + 5, 1453 .vtotal = 768 + 5 + 5 + 122, 1454 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1455 }; 1456 1457 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1458 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1459 .num_modes = 1, 1460 .bpc = 6, 1461 .size = { 1462 .width = 256, 1463 .height = 144, 1464 }, 1465 .delay = { 1466 .hpd_absent = 200, 1467 }, 1468 }; 1469 1470 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1471 .clock = 200000, 1472 .hdisplay = 1536, 1473 .hsync_start = 1536 + 12, 1474 .hsync_end = 1536 + 12 + 16, 1475 .htotal = 1536 + 12 + 16 + 48, 1476 .vdisplay = 2048, 1477 .vsync_start = 2048 + 8, 1478 .vsync_end = 2048 + 8 + 4, 1479 .vtotal = 2048 + 8 + 4 + 8, 1480 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1481 }; 1482 1483 static const struct panel_desc lg_lp079qx1_sp0v = { 1484 .modes = &lg_lp079qx1_sp0v_mode, 1485 .num_modes = 1, 1486 .size = { 1487 .width = 129, 1488 .height = 171, 1489 }, 1490 }; 1491 1492 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1493 .clock = 205210, 1494 .hdisplay = 2048, 1495 .hsync_start = 2048 + 150, 1496 .hsync_end = 2048 + 150 + 5, 1497 .htotal = 2048 + 150 + 5 + 5, 1498 .vdisplay = 1536, 1499 .vsync_start = 1536 + 3, 1500 .vsync_end = 1536 + 3 + 1, 1501 .vtotal = 1536 + 3 + 1 + 9, 1502 }; 1503 1504 static const struct panel_desc lg_lp097qx1_spa1 = { 1505 .modes = &lg_lp097qx1_spa1_mode, 1506 .num_modes = 1, 1507 .size = { 1508 .width = 208, 1509 .height = 147, 1510 }, 1511 }; 1512 1513 static const struct drm_display_mode lg_lp120up1_mode = { 1514 .clock = 162300, 1515 .hdisplay = 1920, 1516 .hsync_start = 1920 + 40, 1517 .hsync_end = 1920 + 40 + 40, 1518 .htotal = 1920 + 40 + 40 + 80, 1519 .vdisplay = 1280, 1520 .vsync_start = 1280 + 4, 1521 .vsync_end = 1280 + 4 + 4, 1522 .vtotal = 1280 + 4 + 4 + 12, 1523 }; 1524 1525 static const struct panel_desc lg_lp120up1 = { 1526 .modes = &lg_lp120up1_mode, 1527 .num_modes = 1, 1528 .bpc = 8, 1529 .size = { 1530 .width = 267, 1531 .height = 183, 1532 }, 1533 }; 1534 1535 static const struct drm_display_mode lg_lp129qe_mode = { 1536 .clock = 285250, 1537 .hdisplay = 2560, 1538 .hsync_start = 2560 + 48, 1539 .hsync_end = 2560 + 48 + 32, 1540 .htotal = 2560 + 48 + 32 + 80, 1541 .vdisplay = 1700, 1542 .vsync_start = 1700 + 3, 1543 .vsync_end = 1700 + 3 + 10, 1544 .vtotal = 1700 + 3 + 10 + 36, 1545 }; 1546 1547 static const struct panel_desc lg_lp129qe = { 1548 .modes = &lg_lp129qe_mode, 1549 .num_modes = 1, 1550 .bpc = 8, 1551 .size = { 1552 .width = 272, 1553 .height = 181, 1554 }, 1555 }; 1556 1557 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1558 { 1559 .clock = 138500, 1560 .hdisplay = 1920, 1561 .hsync_start = 1920 + 48, 1562 .hsync_end = 1920 + 48 + 32, 1563 .htotal = 1920 + 48 + 32 + 80, 1564 .vdisplay = 1080, 1565 .vsync_start = 1080 + 3, 1566 .vsync_end = 1080 + 3 + 5, 1567 .vtotal = 1080 + 3 + 5 + 23, 1568 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1569 }, { 1570 .clock = 110920, 1571 .hdisplay = 1920, 1572 .hsync_start = 1920 + 48, 1573 .hsync_end = 1920 + 48 + 32, 1574 .htotal = 1920 + 48 + 32 + 80, 1575 .vdisplay = 1080, 1576 .vsync_start = 1080 + 3, 1577 .vsync_end = 1080 + 3 + 5, 1578 .vtotal = 1080 + 3 + 5 + 23, 1579 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1580 } 1581 }; 1582 1583 static const struct panel_desc neweast_wjfh116008a = { 1584 .modes = neweast_wjfh116008a_modes, 1585 .num_modes = 2, 1586 .bpc = 6, 1587 .size = { 1588 .width = 260, 1589 .height = 150, 1590 }, 1591 .delay = { 1592 .hpd_reliable = 110, 1593 .enable = 20, 1594 .unprepare = 500, 1595 }, 1596 }; 1597 1598 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1599 .clock = 271560, 1600 .hdisplay = 2560, 1601 .hsync_start = 2560 + 48, 1602 .hsync_end = 2560 + 48 + 32, 1603 .htotal = 2560 + 48 + 32 + 80, 1604 .vdisplay = 1600, 1605 .vsync_start = 1600 + 2, 1606 .vsync_end = 1600 + 2 + 5, 1607 .vtotal = 1600 + 2 + 5 + 57, 1608 }; 1609 1610 static const struct panel_desc samsung_lsn122dl01_c01 = { 1611 .modes = &samsung_lsn122dl01_c01_mode, 1612 .num_modes = 1, 1613 .size = { 1614 .width = 263, 1615 .height = 164, 1616 }, 1617 }; 1618 1619 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1620 .clock = 76300, 1621 .hdisplay = 1366, 1622 .hsync_start = 1366 + 64, 1623 .hsync_end = 1366 + 64 + 48, 1624 .htotal = 1366 + 64 + 48 + 128, 1625 .vdisplay = 768, 1626 .vsync_start = 768 + 2, 1627 .vsync_end = 768 + 2 + 5, 1628 .vtotal = 768 + 2 + 5 + 17, 1629 }; 1630 1631 static const struct panel_desc samsung_ltn140at29_301 = { 1632 .modes = &samsung_ltn140at29_301_mode, 1633 .num_modes = 1, 1634 .bpc = 6, 1635 .size = { 1636 .width = 320, 1637 .height = 187, 1638 }, 1639 }; 1640 1641 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1642 .clock = 168480, 1643 .hdisplay = 1920, 1644 .hsync_start = 1920 + 48, 1645 .hsync_end = 1920 + 48 + 32, 1646 .htotal = 1920 + 48 + 32 + 80, 1647 .vdisplay = 1280, 1648 .vsync_start = 1280 + 3, 1649 .vsync_end = 1280 + 3 + 10, 1650 .vtotal = 1280 + 3 + 10 + 57, 1651 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1652 }; 1653 1654 static const struct panel_desc sharp_ld_d5116z01b = { 1655 .modes = &sharp_ld_d5116z01b_mode, 1656 .num_modes = 1, 1657 .bpc = 8, 1658 .size = { 1659 .width = 260, 1660 .height = 120, 1661 }, 1662 }; 1663 1664 static const struct display_timing sharp_lq123p1jx31_timing = { 1665 .pixelclock = { 252750000, 252750000, 266604720 }, 1666 .hactive = { 2400, 2400, 2400 }, 1667 .hfront_porch = { 48, 48, 48 }, 1668 .hback_porch = { 80, 80, 84 }, 1669 .hsync_len = { 32, 32, 32 }, 1670 .vactive = { 1600, 1600, 1600 }, 1671 .vfront_porch = { 3, 3, 3 }, 1672 .vback_porch = { 33, 33, 120 }, 1673 .vsync_len = { 10, 10, 10 }, 1674 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1675 }; 1676 1677 static const struct panel_desc sharp_lq123p1jx31 = { 1678 .timings = &sharp_lq123p1jx31_timing, 1679 .num_timings = 1, 1680 .bpc = 8, 1681 .size = { 1682 .width = 259, 1683 .height = 173, 1684 }, 1685 .delay = { 1686 .hpd_reliable = 110, 1687 .enable = 50, 1688 .unprepare = 550, 1689 }, 1690 }; 1691 1692 static const struct drm_display_mode sharp_lq140m1jw46_mode[] = { 1693 { 1694 .clock = 346500, 1695 .hdisplay = 1920, 1696 .hsync_start = 1920 + 48, 1697 .hsync_end = 1920 + 48 + 32, 1698 .htotal = 1920 + 48 + 32 + 80, 1699 .vdisplay = 1080, 1700 .vsync_start = 1080 + 3, 1701 .vsync_end = 1080 + 3 + 5, 1702 .vtotal = 1080 + 3 + 5 + 69, 1703 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1704 }, { 1705 .clock = 144370, 1706 .hdisplay = 1920, 1707 .hsync_start = 1920 + 48, 1708 .hsync_end = 1920 + 48 + 32, 1709 .htotal = 1920 + 48 + 32 + 80, 1710 .vdisplay = 1080, 1711 .vsync_start = 1080 + 3, 1712 .vsync_end = 1080 + 3 + 5, 1713 .vtotal = 1080 + 3 + 5 + 69, 1714 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1715 }, 1716 }; 1717 1718 static const struct panel_desc sharp_lq140m1jw46 = { 1719 .modes = sharp_lq140m1jw46_mode, 1720 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode), 1721 .bpc = 8, 1722 .size = { 1723 .width = 309, 1724 .height = 174, 1725 }, 1726 .delay = { 1727 .hpd_absent = 80, 1728 .enable = 50, 1729 .unprepare = 500, 1730 }, 1731 }; 1732 1733 static const struct drm_display_mode starry_kr122ea0sra_mode = { 1734 .clock = 147000, 1735 .hdisplay = 1920, 1736 .hsync_start = 1920 + 16, 1737 .hsync_end = 1920 + 16 + 16, 1738 .htotal = 1920 + 16 + 16 + 32, 1739 .vdisplay = 1200, 1740 .vsync_start = 1200 + 15, 1741 .vsync_end = 1200 + 15 + 2, 1742 .vtotal = 1200 + 15 + 2 + 18, 1743 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1744 }; 1745 1746 static const struct panel_desc starry_kr122ea0sra = { 1747 .modes = &starry_kr122ea0sra_mode, 1748 .num_modes = 1, 1749 .size = { 1750 .width = 263, 1751 .height = 164, 1752 }, 1753 .delay = { 1754 /* TODO: should be hpd-absent and no-hpd should be set? */ 1755 .hpd_reliable = 10 + 200, 1756 .enable = 50, 1757 .unprepare = 10 + 500, 1758 }, 1759 }; 1760 1761 static const struct of_device_id platform_of_match[] = { 1762 { 1763 /* Must be first */ 1764 .compatible = "edp-panel", 1765 }, { 1766 .compatible = "auo,b101ean01", 1767 .data = &auo_b101ean01, 1768 }, { 1769 .compatible = "auo,b116xa01", 1770 .data = &auo_b116xak01, 1771 }, { 1772 .compatible = "auo,b133han05", 1773 .data = &auo_b133han05, 1774 }, { 1775 .compatible = "auo,b133htn01", 1776 .data = &auo_b133htn01, 1777 }, { 1778 .compatible = "auo,b133xtn01", 1779 .data = &auo_b133xtn01, 1780 }, { 1781 .compatible = "auo,b140han06", 1782 .data = &auo_b140han06, 1783 }, { 1784 .compatible = "boe,nv101wxmn51", 1785 .data = &boe_nv101wxmn51, 1786 }, { 1787 .compatible = "boe,nv110wtm-n61", 1788 .data = &boe_nv110wtm_n61, 1789 }, { 1790 .compatible = "boe,nv133fhm-n61", 1791 .data = &boe_nv133fhm_n61, 1792 }, { 1793 .compatible = "boe,nv133fhm-n62", 1794 .data = &boe_nv133fhm_n61, 1795 }, { 1796 .compatible = "boe,nv140fhmn49", 1797 .data = &boe_nv140fhmn49, 1798 }, { 1799 .compatible = "innolux,n116bca-ea1", 1800 .data = &innolux_n116bca_ea1, 1801 }, { 1802 .compatible = "innolux,n116bge", 1803 .data = &innolux_n116bge, 1804 }, { 1805 .compatible = "innolux,n125hce-gn1", 1806 .data = &innolux_n125hce_gn1, 1807 }, { 1808 .compatible = "innolux,p120zdg-bf1", 1809 .data = &innolux_p120zdg_bf1, 1810 }, { 1811 .compatible = "ivo,m133nwf4-r0", 1812 .data = &ivo_m133nwf4_r0, 1813 }, { 1814 .compatible = "kingdisplay,kd116n21-30nv-a010", 1815 .data = &kingdisplay_kd116n21_30nv_a010, 1816 }, { 1817 .compatible = "lg,lp079qx1-sp0v", 1818 .data = &lg_lp079qx1_sp0v, 1819 }, { 1820 .compatible = "lg,lp097qx1-spa1", 1821 .data = &lg_lp097qx1_spa1, 1822 }, { 1823 .compatible = "lg,lp120up1", 1824 .data = &lg_lp120up1, 1825 }, { 1826 .compatible = "lg,lp129qe", 1827 .data = &lg_lp129qe, 1828 }, { 1829 .compatible = "neweast,wjfh116008a", 1830 .data = &neweast_wjfh116008a, 1831 }, { 1832 .compatible = "samsung,lsn122dl01-c01", 1833 .data = &samsung_lsn122dl01_c01, 1834 }, { 1835 .compatible = "samsung,ltn140at29-301", 1836 .data = &samsung_ltn140at29_301, 1837 }, { 1838 .compatible = "sharp,ld-d5116z01b", 1839 .data = &sharp_ld_d5116z01b, 1840 }, { 1841 .compatible = "sharp,lq123p1jx31", 1842 .data = &sharp_lq123p1jx31, 1843 }, { 1844 .compatible = "sharp,lq140m1jw46", 1845 .data = &sharp_lq140m1jw46, 1846 }, { 1847 .compatible = "starry,kr122ea0sra", 1848 .data = &starry_kr122ea0sra, 1849 }, { 1850 /* sentinel */ 1851 } 1852 }; 1853 MODULE_DEVICE_TABLE(of, platform_of_match); 1854 1855 static const struct panel_delay delay_200_500_p2e80 = { 1856 .hpd_absent = 200, 1857 .unprepare = 500, 1858 .prepare_to_enable = 80, 1859 }; 1860 1861 static const struct panel_delay delay_200_500_e50_p2e80 = { 1862 .hpd_absent = 200, 1863 .unprepare = 500, 1864 .enable = 50, 1865 .prepare_to_enable = 80, 1866 }; 1867 1868 static const struct panel_delay delay_200_500_p2e100 = { 1869 .hpd_absent = 200, 1870 .unprepare = 500, 1871 .prepare_to_enable = 100, 1872 }; 1873 1874 static const struct panel_delay delay_200_500_e50 = { 1875 .hpd_absent = 200, 1876 .unprepare = 500, 1877 .enable = 50, 1878 }; 1879 1880 static const struct panel_delay delay_200_500_e50_p2e200 = { 1881 .hpd_absent = 200, 1882 .unprepare = 500, 1883 .enable = 50, 1884 .prepare_to_enable = 200, 1885 }; 1886 1887 static const struct panel_delay delay_200_500_e80 = { 1888 .hpd_absent = 200, 1889 .unprepare = 500, 1890 .enable = 80, 1891 }; 1892 1893 static const struct panel_delay delay_200_500_e80_d50 = { 1894 .hpd_absent = 200, 1895 .unprepare = 500, 1896 .enable = 80, 1897 .disable = 50, 1898 }; 1899 1900 static const struct panel_delay delay_100_500_e200 = { 1901 .hpd_absent = 100, 1902 .unprepare = 500, 1903 .enable = 200, 1904 }; 1905 1906 static const struct panel_delay delay_200_500_e200 = { 1907 .hpd_absent = 200, 1908 .unprepare = 500, 1909 .enable = 200, 1910 }; 1911 1912 static const struct panel_delay delay_200_500_e200_d200 = { 1913 .hpd_absent = 200, 1914 .unprepare = 500, 1915 .enable = 200, 1916 .disable = 200, 1917 }; 1918 1919 static const struct panel_delay delay_200_500_e200_d10 = { 1920 .hpd_absent = 200, 1921 .unprepare = 500, 1922 .enable = 200, 1923 .disable = 10, 1924 }; 1925 1926 static const struct panel_delay delay_200_150_e200 = { 1927 .hpd_absent = 200, 1928 .unprepare = 150, 1929 .enable = 200, 1930 }; 1931 1932 static const struct panel_delay delay_200_500_e50_po2e200 = { 1933 .hpd_absent = 200, 1934 .unprepare = 500, 1935 .enable = 50, 1936 .powered_on_to_enable = 200, 1937 }; 1938 1939 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1940 { \ 1941 .ident = { \ 1942 .name = _name, \ 1943 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1944 product_id), \ 1945 }, \ 1946 .delay = _delay \ 1947 } 1948 1949 #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1950 { \ 1951 .ident = { \ 1952 .name = _name, \ 1953 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1954 product_id), \ 1955 }, \ 1956 .delay = _delay, \ 1957 .override_edid_mode = _mode \ 1958 } 1959 1960 /* 1961 * This table is used to figure out power sequencing delays for panels that 1962 * are detected by EDID. Entries here may point to entries in the 1963 * platform_of_match table (if a panel is listed in both places). 1964 * 1965 * Sort first by vendor, then by product ID. 1966 */ 1967 static const struct edp_panel_entry edp_panels[] = { 1968 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), 1969 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1970 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), 1971 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1972 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1999, &delay_200_500_e50, "Unknown"), 1973 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1974 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"), 1975 EDP_PANEL_ENTRY('A', 'U', 'O', 0x203d, &delay_200_500_e50, "B140HTN02.0"), 1976 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"), 1977 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1978 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"), 1979 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"), 1980 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), 1981 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAN04.0"), 1982 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0", 1983 &auo_b116xa3_mode), 1984 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), 1985 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1986 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"), 1987 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), 1988 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), 1989 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), 1990 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 1991 EDP_PANEL_ENTRY('A', 'U', 'O', 0xd497, &delay_200_500_e50, "B120XAN01.0"), 1992 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), 1993 1994 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), 1995 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"), 1996 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0609, &delay_200_500_e50_po2e200, "NT116WHM-N21 V4.1"), 1997 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0623, &delay_200_500_e200, "NT116WHM-N21 V4.0"), 1998 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), 1999 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), 2000 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), 2001 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), 2002 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"), 2003 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"), 2004 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"), 2005 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"), 2006 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), 2007 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), 2008 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), 2009 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"), 2010 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), 2011 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 2012 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), 2013 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07a8, &delay_200_500_e50_po2e200, "NT116WHM-N21"), 2014 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 2015 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), 2016 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"), 2017 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), 2018 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), 2019 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"), 2020 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 2021 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), 2022 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"), 2023 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), 2024 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), 2025 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 2026 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 2027 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"), 2028 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 2029 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"), 2030 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 2031 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 2032 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"), 2033 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"), 2034 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"), 2035 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 2036 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), 2037 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80, "NV116WHM-N49"), 2038 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 2039 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 2040 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"), 2041 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"), 2042 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"), 2043 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"), 2044 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0cb6, &delay_200_500_e200, "NT116WHM-N44"), 2045 2046 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), 2047 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"), 2048 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"), 2049 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 2050 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), 2051 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"), 2052 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), 2053 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 2054 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 2055 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 2056 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 2057 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), 2058 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"), 2059 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"), 2060 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115e, &delay_200_500_e80_d50, "N116BCA-EA1"), 2061 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1160, &delay_200_500_e80_d50, "N116BCJ-EAK"), 2062 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 2063 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"), 2064 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"), 2065 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"), 2066 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), 2067 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 2068 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4"), 2069 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"), 2070 2071 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50_p2e200, "MNC207QS1-1"), 2072 2073 EDP_PANEL_ENTRY('C', 'S', 'W', 0x1100, &delay_200_500_e80_d50, "MNB601LS1-1"), 2074 2075 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), 2076 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "Unknown"), 2077 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"), 2078 2079 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"), 2080 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 2081 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 2082 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 2083 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"), 2084 2085 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), 2086 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 2087 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"), 2088 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 2089 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1212, &delay_200_500_e50, "KD116N0930A16"), 2090 2091 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"), 2092 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"), 2093 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), 2094 2095 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"), 2096 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"), 2097 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"), 2098 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"), 2099 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"), 2100 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"), 2101 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"), 2102 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"), 2103 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"), 2104 2105 EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"), 2106 2107 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 2108 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"), 2109 EDP_PANEL_ENTRY('S', 'H', 'P', 0x153a, &delay_200_500_e50, "LQ140T1JH01"), 2110 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 2111 2112 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 2113 2114 { /* sentinal */ } 2115 }; 2116 2117 static const struct edp_panel_entry *find_edp_panel(u32 panel_id, const struct drm_edid *edid) 2118 { 2119 const struct edp_panel_entry *panel; 2120 2121 if (!panel_id) 2122 return NULL; 2123 2124 /* 2125 * Match with identity first. This allows handling the case where 2126 * vendors incorrectly reused the same panel ID for multiple panels that 2127 * need different settings. If there's no match, try again with panel 2128 * ID, which should be unique. 2129 */ 2130 for (panel = edp_panels; panel->ident.panel_id; panel++) 2131 if (drm_edid_match(edid, &panel->ident)) 2132 return panel; 2133 2134 for (panel = edp_panels; panel->ident.panel_id; panel++) 2135 if (panel->ident.panel_id == panel_id) 2136 return panel; 2137 2138 return NULL; 2139 } 2140 2141 static int panel_edp_platform_probe(struct platform_device *pdev) 2142 { 2143 const struct of_device_id *id; 2144 2145 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 2146 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 2147 if (!id) 2148 return -ENODEV; 2149 2150 return panel_edp_probe(&pdev->dev, id->data, NULL); 2151 } 2152 2153 static void panel_edp_platform_remove(struct platform_device *pdev) 2154 { 2155 panel_edp_remove(&pdev->dev); 2156 } 2157 2158 static void panel_edp_platform_shutdown(struct platform_device *pdev) 2159 { 2160 panel_edp_shutdown(&pdev->dev); 2161 } 2162 2163 static const struct dev_pm_ops panel_edp_pm_ops = { 2164 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 2165 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 2166 pm_runtime_force_resume) 2167 }; 2168 2169 static struct platform_driver panel_edp_platform_driver = { 2170 .driver = { 2171 .name = "panel-edp", 2172 .of_match_table = platform_of_match, 2173 .pm = &panel_edp_pm_ops, 2174 }, 2175 .probe = panel_edp_platform_probe, 2176 .remove_new = panel_edp_platform_remove, 2177 .shutdown = panel_edp_platform_shutdown, 2178 }; 2179 2180 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 2181 { 2182 const struct of_device_id *id; 2183 2184 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 2185 if (!id) 2186 return -ENODEV; 2187 2188 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 2189 } 2190 2191 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 2192 { 2193 panel_edp_remove(&aux_ep->dev); 2194 } 2195 2196 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 2197 { 2198 panel_edp_shutdown(&aux_ep->dev); 2199 } 2200 2201 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2202 .driver = { 2203 .name = "panel-simple-dp-aux", 2204 .of_match_table = platform_of_match, /* Same as platform one! */ 2205 .pm = &panel_edp_pm_ops, 2206 }, 2207 .probe = panel_edp_dp_aux_ep_probe, 2208 .remove = panel_edp_dp_aux_ep_remove, 2209 .shutdown = panel_edp_dp_aux_ep_shutdown, 2210 }; 2211 2212 static int __init panel_edp_init(void) 2213 { 2214 int err; 2215 2216 err = platform_driver_register(&panel_edp_platform_driver); 2217 if (err < 0) 2218 return err; 2219 2220 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2221 if (err < 0) 2222 goto err_did_platform_register; 2223 2224 return 0; 2225 2226 err_did_platform_register: 2227 platform_driver_unregister(&panel_edp_platform_driver); 2228 2229 return err; 2230 } 2231 module_init(panel_edp_init); 2232 2233 static void __exit panel_edp_exit(void) 2234 { 2235 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2236 platform_driver_unregister(&panel_edp_platform_driver); 2237 } 2238 module_exit(panel_edp_exit); 2239 2240 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2241 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2242 MODULE_LICENSE("GPL and additional rights"); 2243