1 /* 2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sub license, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the 12 * next paragraph) shall be included in all copies or substantial portions 13 * of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/debugfs.h> 25 #include <linux/delay.h> 26 #include <linux/gpio/consumer.h> 27 #include <linux/iopoll.h> 28 #include <linux/module.h> 29 #include <linux/of_platform.h> 30 #include <linux/platform_device.h> 31 #include <linux/pm_runtime.h> 32 #include <linux/regulator/consumer.h> 33 34 #include <video/display_timing.h> 35 #include <video/of_display_timing.h> 36 #include <video/videomode.h> 37 38 #include <drm/display/drm_dp_aux_bus.h> 39 #include <drm/display/drm_dp_helper.h> 40 #include <drm/drm_crtc.h> 41 #include <drm/drm_device.h> 42 #include <drm/drm_edid.h> 43 #include <drm/drm_panel.h> 44 45 /** 46 * struct panel_delay - Describes delays for a simple panel. 47 */ 48 struct panel_delay { 49 /** 50 * @hpd_reliable: Time for HPD to be reliable 51 * 52 * The time (in milliseconds) that it takes after powering the panel 53 * before the HPD signal is reliable. Ideally this is 0 but some panels, 54 * board designs, or bad pulldown configs can cause a glitch here. 55 * 56 * NOTE: on some old panel data this number appears to be much too big. 57 * Presumably some old panels simply didn't have HPD hooked up and put 58 * the hpd_absent here because this field predates the 59 * hpd_absent. While that works, it's non-ideal. 60 */ 61 unsigned int hpd_reliable; 62 63 /** 64 * @hpd_absent: Time to wait if HPD isn't hooked up. 65 * 66 * Add this to the prepare delay if we know Hot Plug Detect isn't used. 67 * 68 * This is T3-max on eDP timing diagrams or the delay from power on 69 * until HPD is guaranteed to be asserted. 70 */ 71 unsigned int hpd_absent; 72 73 /** 74 * @powered_on_to_enable: Time between panel powered on and enable. 75 * 76 * The minimum time, in milliseconds, that needs to have passed 77 * between when panel powered on and enable may begin. 78 * 79 * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the 80 * power supply enabled until we can turn the backlight on and see 81 * valid data. 82 * 83 * This doesn't normally need to be set if timings are already met by 84 * prepare_to_enable or enable. 85 */ 86 unsigned int powered_on_to_enable; 87 88 /** 89 * @prepare_to_enable: Time between prepare and enable. 90 * 91 * The minimum time, in milliseconds, that needs to have passed 92 * between when prepare finished and enable may begin. If at 93 * enable time less time has passed since prepare finished, 94 * the driver waits for the remaining time. 95 * 96 * If a fixed enable delay is also specified, we'll start 97 * counting before delaying for the fixed delay. 98 * 99 * If a fixed prepare delay is also specified, we won't start 100 * counting until after the fixed delay. We can't overlap this 101 * fixed delay with the min time because the fixed delay 102 * doesn't happen at the end of the function if a HPD GPIO was 103 * specified. 104 * 105 * In other words: 106 * prepare() 107 * ... 108 * // do fixed prepare delay 109 * // wait for HPD GPIO if applicable 110 * // start counting for prepare_to_enable 111 * 112 * enable() 113 * // do fixed enable delay 114 * // enforce prepare_to_enable min time 115 * 116 * This is not specified in a standard way on eDP timing diagrams. 117 * It is effectively the time from HPD going high till you can 118 * turn on the backlight. 119 */ 120 unsigned int prepare_to_enable; 121 122 /** 123 * @enable: Time for the panel to display a valid frame. 124 * 125 * The time (in milliseconds) that it takes for the panel to 126 * display the first valid frame after starting to receive 127 * video data. 128 * 129 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or 130 * the delay after link training finishes until we can turn the 131 * backlight on and see valid data. 132 */ 133 unsigned int enable; 134 135 /** 136 * @disable: Time for the panel to turn the display off. 137 * 138 * The time (in milliseconds) that it takes for the panel to 139 * turn the display off (no content is visible). 140 * 141 * This is T9-min (delay from backlight off to end of valid video 142 * data) on eDP timing diagrams. It is not common to set. 143 */ 144 unsigned int disable; 145 146 /** 147 * @unprepare: Time to power down completely. 148 * 149 * The time (in milliseconds) that it takes for the panel 150 * to power itself down completely. 151 * 152 * This time is used to prevent a future "prepare" from 153 * starting until at least this many milliseconds has passed. 154 * If at prepare time less time has passed since unprepare 155 * finished, the driver waits for the remaining time. 156 * 157 * This is T12-min on eDP timing diagrams. 158 */ 159 unsigned int unprepare; 160 }; 161 162 /** 163 * struct panel_desc - Describes a simple panel. 164 */ 165 struct panel_desc { 166 /** 167 * @modes: Pointer to array of fixed modes appropriate for this panel. 168 * 169 * If only one mode then this can just be the address of the mode. 170 * NOTE: cannot be used with "timings" and also if this is specified 171 * then you cannot override the mode in the device tree. 172 */ 173 const struct drm_display_mode *modes; 174 175 /** @num_modes: Number of elements in modes array. */ 176 unsigned int num_modes; 177 178 /** 179 * @timings: Pointer to array of display timings 180 * 181 * NOTE: cannot be used with "modes" and also these will be used to 182 * validate a device tree override if one is present. 183 */ 184 const struct display_timing *timings; 185 186 /** @num_timings: Number of elements in timings array. */ 187 unsigned int num_timings; 188 189 /** @bpc: Bits per color. */ 190 unsigned int bpc; 191 192 /** @size: Structure containing the physical size of this panel. */ 193 struct { 194 /** 195 * @size.width: Width (in mm) of the active display area. 196 */ 197 unsigned int width; 198 199 /** 200 * @size.height: Height (in mm) of the active display area. 201 */ 202 unsigned int height; 203 } size; 204 205 /** @delay: Structure containing various delay values for this panel. */ 206 struct panel_delay delay; 207 }; 208 209 /** 210 * struct edp_panel_entry - Maps panel ID to delay / panel name. 211 */ 212 struct edp_panel_entry { 213 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */ 214 u32 panel_id; 215 216 /** @delay: The power sequencing delays needed for this panel. */ 217 const struct panel_delay *delay; 218 219 /** @name: Name of this panel (for printing to logs). */ 220 const char *name; 221 222 /** @override_edid_mode: Override the mode obtained by edid. */ 223 const struct drm_display_mode *override_edid_mode; 224 }; 225 226 struct panel_edp { 227 struct drm_panel base; 228 bool enabled; 229 bool no_hpd; 230 231 bool prepared; 232 233 ktime_t prepared_time; 234 ktime_t powered_on_time; 235 ktime_t unprepared_time; 236 237 const struct panel_desc *desc; 238 239 struct regulator *supply; 240 struct i2c_adapter *ddc; 241 struct drm_dp_aux *aux; 242 243 struct gpio_desc *enable_gpio; 244 struct gpio_desc *hpd_gpio; 245 246 const struct edp_panel_entry *detected_panel; 247 248 struct edid *edid; 249 250 struct drm_display_mode override_mode; 251 252 enum drm_panel_orientation orientation; 253 }; 254 255 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel) 256 { 257 return container_of(panel, struct panel_edp, base); 258 } 259 260 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel, 261 struct drm_connector *connector) 262 { 263 struct drm_display_mode *mode; 264 unsigned int i, num = 0; 265 266 for (i = 0; i < panel->desc->num_timings; i++) { 267 const struct display_timing *dt = &panel->desc->timings[i]; 268 struct videomode vm; 269 270 videomode_from_timing(dt, &vm); 271 mode = drm_mode_create(connector->dev); 272 if (!mode) { 273 dev_err(panel->base.dev, "failed to add mode %ux%u\n", 274 dt->hactive.typ, dt->vactive.typ); 275 continue; 276 } 277 278 drm_display_mode_from_videomode(&vm, mode); 279 280 mode->type |= DRM_MODE_TYPE_DRIVER; 281 282 if (panel->desc->num_timings == 1) 283 mode->type |= DRM_MODE_TYPE_PREFERRED; 284 285 drm_mode_probed_add(connector, mode); 286 num++; 287 } 288 289 return num; 290 } 291 292 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel, 293 struct drm_connector *connector) 294 { 295 struct drm_display_mode *mode; 296 unsigned int i, num = 0; 297 298 for (i = 0; i < panel->desc->num_modes; i++) { 299 const struct drm_display_mode *m = &panel->desc->modes[i]; 300 301 mode = drm_mode_duplicate(connector->dev, m); 302 if (!mode) { 303 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", 304 m->hdisplay, m->vdisplay, 305 drm_mode_vrefresh(m)); 306 continue; 307 } 308 309 mode->type |= DRM_MODE_TYPE_DRIVER; 310 311 if (panel->desc->num_modes == 1) 312 mode->type |= DRM_MODE_TYPE_PREFERRED; 313 314 drm_mode_set_name(mode); 315 316 drm_mode_probed_add(connector, mode); 317 num++; 318 } 319 320 return num; 321 } 322 323 static int panel_edp_override_edid_mode(struct panel_edp *panel, 324 struct drm_connector *connector, 325 const struct drm_display_mode *override_mode) 326 { 327 struct drm_display_mode *mode; 328 329 mode = drm_mode_duplicate(connector->dev, override_mode); 330 if (!mode) { 331 dev_err(panel->base.dev, "failed to add additional mode\n"); 332 return 0; 333 } 334 335 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; 336 drm_mode_set_name(mode); 337 drm_mode_probed_add(connector, mode); 338 return 1; 339 } 340 341 static int panel_edp_get_non_edid_modes(struct panel_edp *panel, 342 struct drm_connector *connector) 343 { 344 struct drm_display_mode *mode; 345 bool has_override = panel->override_mode.type; 346 unsigned int num = 0; 347 348 if (!panel->desc) 349 return 0; 350 351 if (has_override) { 352 mode = drm_mode_duplicate(connector->dev, 353 &panel->override_mode); 354 if (mode) { 355 drm_mode_probed_add(connector, mode); 356 num = 1; 357 } else { 358 dev_err(panel->base.dev, "failed to add override mode\n"); 359 } 360 } 361 362 /* Only add timings if override was not there or failed to validate */ 363 if (num == 0 && panel->desc->num_timings) 364 num = panel_edp_get_timings_modes(panel, connector); 365 366 /* 367 * Only add fixed modes if timings/override added no mode. 368 * 369 * We should only ever have either the display timings specified 370 * or a fixed mode. Anything else is rather bogus. 371 */ 372 WARN_ON(panel->desc->num_timings && panel->desc->num_modes); 373 if (num == 0) 374 num = panel_edp_get_display_modes(panel, connector); 375 376 connector->display_info.bpc = panel->desc->bpc; 377 connector->display_info.width_mm = panel->desc->size.width; 378 connector->display_info.height_mm = panel->desc->size.height; 379 380 return num; 381 } 382 383 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms) 384 { 385 ktime_t now_ktime, min_ktime; 386 387 if (!min_ms) 388 return; 389 390 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms)); 391 now_ktime = ktime_get_boottime(); 392 393 if (ktime_before(now_ktime, min_ktime)) 394 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1); 395 } 396 397 static int panel_edp_disable(struct drm_panel *panel) 398 { 399 struct panel_edp *p = to_panel_edp(panel); 400 401 if (!p->enabled) 402 return 0; 403 404 if (p->desc->delay.disable) 405 msleep(p->desc->delay.disable); 406 407 p->enabled = false; 408 409 return 0; 410 } 411 412 static int panel_edp_suspend(struct device *dev) 413 { 414 struct panel_edp *p = dev_get_drvdata(dev); 415 416 gpiod_set_value_cansleep(p->enable_gpio, 0); 417 regulator_disable(p->supply); 418 p->unprepared_time = ktime_get_boottime(); 419 420 return 0; 421 } 422 423 static int panel_edp_unprepare(struct drm_panel *panel) 424 { 425 struct panel_edp *p = to_panel_edp(panel); 426 int ret; 427 428 /* Unpreparing when already unprepared is a no-op */ 429 if (!p->prepared) 430 return 0; 431 432 ret = pm_runtime_put_sync_suspend(panel->dev); 433 if (ret < 0) 434 return ret; 435 p->prepared = false; 436 437 return 0; 438 } 439 440 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p) 441 { 442 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN); 443 if (IS_ERR(p->hpd_gpio)) 444 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio), 445 "failed to get 'hpd' GPIO\n"); 446 447 return 0; 448 } 449 450 static bool panel_edp_can_read_hpd(struct panel_edp *p) 451 { 452 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted)); 453 } 454 455 static int panel_edp_prepare_once(struct panel_edp *p) 456 { 457 struct device *dev = p->base.dev; 458 unsigned int delay; 459 int err; 460 int hpd_asserted; 461 unsigned long hpd_wait_us; 462 463 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare); 464 465 err = regulator_enable(p->supply); 466 if (err < 0) { 467 dev_err(dev, "failed to enable supply: %d\n", err); 468 return err; 469 } 470 471 gpiod_set_value_cansleep(p->enable_gpio, 1); 472 473 p->powered_on_time = ktime_get_boottime(); 474 475 delay = p->desc->delay.hpd_reliable; 476 if (p->no_hpd) 477 delay = max(delay, p->desc->delay.hpd_absent); 478 if (delay) 479 msleep(delay); 480 481 if (panel_edp_can_read_hpd(p)) { 482 if (p->desc->delay.hpd_absent) 483 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL; 484 else 485 hpd_wait_us = 2000000; 486 487 if (p->hpd_gpio) { 488 err = readx_poll_timeout(gpiod_get_value_cansleep, 489 p->hpd_gpio, hpd_asserted, 490 hpd_asserted, 1000, hpd_wait_us); 491 if (hpd_asserted < 0) 492 err = hpd_asserted; 493 } else { 494 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us); 495 } 496 497 if (err) { 498 if (err != -ETIMEDOUT) 499 dev_err(dev, 500 "error waiting for hpd GPIO: %d\n", err); 501 goto error; 502 } 503 } 504 505 p->prepared_time = ktime_get_boottime(); 506 507 return 0; 508 509 error: 510 gpiod_set_value_cansleep(p->enable_gpio, 0); 511 regulator_disable(p->supply); 512 p->unprepared_time = ktime_get_boottime(); 513 514 return err; 515 } 516 517 /* 518 * Some panels simply don't always come up and need to be power cycled to 519 * work properly. We'll allow for a handful of retries. 520 */ 521 #define MAX_PANEL_PREPARE_TRIES 5 522 523 static int panel_edp_resume(struct device *dev) 524 { 525 struct panel_edp *p = dev_get_drvdata(dev); 526 int ret; 527 int try; 528 529 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) { 530 ret = panel_edp_prepare_once(p); 531 if (ret != -ETIMEDOUT) 532 break; 533 } 534 535 if (ret == -ETIMEDOUT) 536 dev_err(dev, "Prepare timeout after %d tries\n", try); 537 else if (try) 538 dev_warn(dev, "Prepare needed %d retries\n", try); 539 540 return ret; 541 } 542 543 static int panel_edp_prepare(struct drm_panel *panel) 544 { 545 struct panel_edp *p = to_panel_edp(panel); 546 int ret; 547 548 /* Preparing when already prepared is a no-op */ 549 if (p->prepared) 550 return 0; 551 552 ret = pm_runtime_get_sync(panel->dev); 553 if (ret < 0) { 554 pm_runtime_put_autosuspend(panel->dev); 555 return ret; 556 } 557 558 p->prepared = true; 559 560 return 0; 561 } 562 563 static int panel_edp_enable(struct drm_panel *panel) 564 { 565 struct panel_edp *p = to_panel_edp(panel); 566 unsigned int delay; 567 568 if (p->enabled) 569 return 0; 570 571 delay = p->desc->delay.enable; 572 573 /* 574 * If there is a "prepare_to_enable" delay then that's supposed to be 575 * the delay from HPD going high until we can turn the backlight on. 576 * However, we can only count this if HPD is readable by the panel 577 * driver. 578 * 579 * If we aren't handling the HPD pin ourselves then the best we 580 * can do is assume that HPD went high immediately before we were 581 * called (and link training took zero time). Note that "no-hpd" 582 * actually counts as handling HPD ourselves since we're doing the 583 * worst case delay (in prepare) ourselves. 584 * 585 * NOTE: if we ever end up in this "if" statement then we're 586 * guaranteed that the panel_edp_wait() call below will do no delay. 587 * It already handles that case, though, so we don't need any special 588 * code for it. 589 */ 590 if (p->desc->delay.prepare_to_enable && 591 !panel_edp_can_read_hpd(p) && !p->no_hpd) 592 delay = max(delay, p->desc->delay.prepare_to_enable); 593 594 if (delay) 595 msleep(delay); 596 597 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); 598 599 panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); 600 601 p->enabled = true; 602 603 return 0; 604 } 605 606 static int panel_edp_get_modes(struct drm_panel *panel, 607 struct drm_connector *connector) 608 { 609 struct panel_edp *p = to_panel_edp(panel); 610 int num = 0; 611 bool has_hard_coded_modes = p->desc->num_timings || p->desc->num_modes; 612 bool has_override_edid_mode = p->detected_panel && 613 p->detected_panel != ERR_PTR(-EINVAL) && 614 p->detected_panel->override_edid_mode; 615 616 /* probe EDID if a DDC bus is available */ 617 if (p->ddc) { 618 pm_runtime_get_sync(panel->dev); 619 620 if (!p->edid) 621 p->edid = drm_get_edid(connector, p->ddc); 622 /* 623 * If both edid and hard-coded modes exists, skip edid modes to 624 * avoid multiple preferred modes. 625 */ 626 if (p->edid && !has_hard_coded_modes) { 627 if (has_override_edid_mode) { 628 /* 629 * override_edid_mode is specified. Use 630 * override_edid_mode instead of from edid. 631 */ 632 num += panel_edp_override_edid_mode(p, connector, 633 p->detected_panel->override_edid_mode); 634 } else { 635 num += drm_add_edid_modes(connector, p->edid); 636 } 637 } 638 639 pm_runtime_mark_last_busy(panel->dev); 640 pm_runtime_put_autosuspend(panel->dev); 641 } 642 643 if (has_hard_coded_modes) 644 num += panel_edp_get_non_edid_modes(p, connector); 645 else if (!num) 646 dev_warn(p->base.dev, "No display modes\n"); 647 648 /* 649 * TODO: Remove once all drm drivers call 650 * drm_connector_set_orientation_from_panel() 651 */ 652 drm_connector_set_panel_orientation(connector, p->orientation); 653 654 return num; 655 } 656 657 static int panel_edp_get_timings(struct drm_panel *panel, 658 unsigned int num_timings, 659 struct display_timing *timings) 660 { 661 struct panel_edp *p = to_panel_edp(panel); 662 unsigned int i; 663 664 if (p->desc->num_timings < num_timings) 665 num_timings = p->desc->num_timings; 666 667 if (timings) 668 for (i = 0; i < num_timings; i++) 669 timings[i] = p->desc->timings[i]; 670 671 return p->desc->num_timings; 672 } 673 674 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel) 675 { 676 struct panel_edp *p = to_panel_edp(panel); 677 678 return p->orientation; 679 } 680 681 static int detected_panel_show(struct seq_file *s, void *data) 682 { 683 struct drm_panel *panel = s->private; 684 struct panel_edp *p = to_panel_edp(panel); 685 686 if (IS_ERR(p->detected_panel)) 687 seq_puts(s, "UNKNOWN\n"); 688 else if (!p->detected_panel) 689 seq_puts(s, "HARDCODED\n"); 690 else 691 seq_printf(s, "%s\n", p->detected_panel->name); 692 693 return 0; 694 } 695 696 DEFINE_SHOW_ATTRIBUTE(detected_panel); 697 698 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root) 699 { 700 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops); 701 } 702 703 static const struct drm_panel_funcs panel_edp_funcs = { 704 .disable = panel_edp_disable, 705 .unprepare = panel_edp_unprepare, 706 .prepare = panel_edp_prepare, 707 .enable = panel_edp_enable, 708 .get_modes = panel_edp_get_modes, 709 .get_orientation = panel_edp_get_orientation, 710 .get_timings = panel_edp_get_timings, 711 .debugfs_init = panel_edp_debugfs_init, 712 }; 713 714 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \ 715 (to_check->field.typ >= bounds->field.min && \ 716 to_check->field.typ <= bounds->field.max) 717 static void panel_edp_parse_panel_timing_node(struct device *dev, 718 struct panel_edp *panel, 719 const struct display_timing *ot) 720 { 721 const struct panel_desc *desc = panel->desc; 722 struct videomode vm; 723 unsigned int i; 724 725 if (WARN_ON(desc->num_modes)) { 726 dev_err(dev, "Reject override mode: panel has a fixed mode\n"); 727 return; 728 } 729 if (WARN_ON(!desc->num_timings)) { 730 dev_err(dev, "Reject override mode: no timings specified\n"); 731 return; 732 } 733 734 for (i = 0; i < panel->desc->num_timings; i++) { 735 const struct display_timing *dt = &panel->desc->timings[i]; 736 737 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) || 738 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) || 739 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) || 740 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) || 741 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) || 742 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) || 743 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) || 744 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len)) 745 continue; 746 747 if (ot->flags != dt->flags) 748 continue; 749 750 videomode_from_timing(ot, &vm); 751 drm_display_mode_from_videomode(&vm, &panel->override_mode); 752 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER | 753 DRM_MODE_TYPE_PREFERRED; 754 break; 755 } 756 757 if (WARN_ON(!panel->override_mode.type)) 758 dev_err(dev, "Reject override mode: No display_timing found\n"); 759 } 760 761 static const struct edp_panel_entry *find_edp_panel(u32 panel_id); 762 763 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel) 764 { 765 struct panel_desc *desc; 766 u32 panel_id; 767 char vend[4]; 768 u16 product_id; 769 u32 reliable_ms = 0; 770 u32 absent_ms = 0; 771 int ret; 772 773 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); 774 if (!desc) 775 return -ENOMEM; 776 panel->desc = desc; 777 778 /* 779 * Read the dts properties for the initial probe. These are used by 780 * the runtime resume code which will get called by the 781 * pm_runtime_get_sync() call below. 782 */ 783 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms); 784 desc->delay.hpd_reliable = reliable_ms; 785 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms); 786 desc->delay.hpd_absent = absent_ms; 787 788 /* Power the panel on so we can read the EDID */ 789 ret = pm_runtime_get_sync(dev); 790 if (ret < 0) { 791 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret); 792 goto exit; 793 } 794 795 panel_id = drm_edid_get_panel_id(panel->ddc); 796 if (!panel_id) { 797 dev_err(dev, "Couldn't identify panel via EDID\n"); 798 ret = -EIO; 799 goto exit; 800 } 801 drm_edid_decode_panel_id(panel_id, vend, &product_id); 802 803 panel->detected_panel = find_edp_panel(panel_id); 804 805 /* 806 * We're using non-optimized timings and want it really obvious that 807 * someone needs to add an entry to the table, so we'll do a WARN_ON 808 * splat. 809 */ 810 if (WARN_ON(!panel->detected_panel)) { 811 dev_warn(dev, 812 "Unknown panel %s %#06x, using conservative timings\n", 813 vend, product_id); 814 815 /* 816 * It's highly likely that the panel will work if we use very 817 * conservative timings, so let's do that. We already know that 818 * the HPD-related delays must have worked since we got this 819 * far, so we really just need the "unprepare" / "enable" 820 * delays. We don't need "prepare_to_enable" since that 821 * overlaps the "enable" delay anyway. 822 * 823 * Nearly all panels have a "unprepare" delay of 500 ms though 824 * there are a few with 1000. Let's stick 2000 in just to be 825 * super conservative. 826 * 827 * An "enable" delay of 80 ms seems the most common, but we'll 828 * throw in 200 ms to be safe. 829 */ 830 desc->delay.unprepare = 2000; 831 desc->delay.enable = 200; 832 833 panel->detected_panel = ERR_PTR(-EINVAL); 834 } else { 835 dev_info(dev, "Detected %s %s (%#06x)\n", 836 vend, panel->detected_panel->name, product_id); 837 838 /* Update the delay; everything else comes from EDID */ 839 desc->delay = *panel->detected_panel->delay; 840 } 841 842 ret = 0; 843 exit: 844 pm_runtime_mark_last_busy(dev); 845 pm_runtime_put_autosuspend(dev); 846 847 return ret; 848 } 849 850 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc, 851 struct drm_dp_aux *aux) 852 { 853 struct panel_edp *panel; 854 struct display_timing dt; 855 struct device_node *ddc; 856 int err; 857 858 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL); 859 if (!panel) 860 return -ENOMEM; 861 862 panel->enabled = false; 863 panel->prepared_time = 0; 864 panel->desc = desc; 865 panel->aux = aux; 866 867 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd"); 868 if (!panel->no_hpd) { 869 err = panel_edp_get_hpd_gpio(dev, panel); 870 if (err) 871 return err; 872 } 873 874 panel->supply = devm_regulator_get(dev, "power"); 875 if (IS_ERR(panel->supply)) 876 return PTR_ERR(panel->supply); 877 878 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 879 GPIOD_OUT_LOW); 880 if (IS_ERR(panel->enable_gpio)) 881 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio), 882 "failed to request GPIO\n"); 883 884 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation); 885 if (err) { 886 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err); 887 return err; 888 } 889 890 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0); 891 if (ddc) { 892 panel->ddc = of_find_i2c_adapter_by_node(ddc); 893 of_node_put(ddc); 894 895 if (!panel->ddc) 896 return -EPROBE_DEFER; 897 } else if (aux) { 898 panel->ddc = &aux->ddc; 899 } 900 901 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt)) 902 panel_edp_parse_panel_timing_node(dev, panel, &dt); 903 904 dev_set_drvdata(dev, panel); 905 906 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP); 907 908 err = drm_panel_of_backlight(&panel->base); 909 if (err) 910 goto err_finished_ddc_init; 911 912 /* 913 * We use runtime PM for prepare / unprepare since those power the panel 914 * on and off and those can be very slow operations. This is important 915 * to optimize powering the panel on briefly to read the EDID before 916 * fully enabling the panel. 917 */ 918 pm_runtime_enable(dev); 919 pm_runtime_set_autosuspend_delay(dev, 1000); 920 pm_runtime_use_autosuspend(dev); 921 922 if (of_device_is_compatible(dev->of_node, "edp-panel")) { 923 err = generic_edp_panel_probe(dev, panel); 924 if (err) { 925 dev_err_probe(dev, err, 926 "Couldn't detect panel nor find a fallback\n"); 927 goto err_finished_pm_runtime; 928 } 929 /* generic_edp_panel_probe() replaces desc in the panel */ 930 desc = panel->desc; 931 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) { 932 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc); 933 } 934 935 if (!panel->base.backlight && panel->aux) { 936 pm_runtime_get_sync(dev); 937 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux); 938 pm_runtime_mark_last_busy(dev); 939 pm_runtime_put_autosuspend(dev); 940 if (err) 941 goto err_finished_pm_runtime; 942 } 943 944 drm_panel_add(&panel->base); 945 946 return 0; 947 948 err_finished_pm_runtime: 949 pm_runtime_dont_use_autosuspend(dev); 950 pm_runtime_disable(dev); 951 err_finished_ddc_init: 952 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 953 put_device(&panel->ddc->dev); 954 955 return err; 956 } 957 958 static void panel_edp_remove(struct device *dev) 959 { 960 struct panel_edp *panel = dev_get_drvdata(dev); 961 962 drm_panel_remove(&panel->base); 963 drm_panel_disable(&panel->base); 964 drm_panel_unprepare(&panel->base); 965 966 pm_runtime_dont_use_autosuspend(dev); 967 pm_runtime_disable(dev); 968 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc)) 969 put_device(&panel->ddc->dev); 970 971 kfree(panel->edid); 972 panel->edid = NULL; 973 } 974 975 static void panel_edp_shutdown(struct device *dev) 976 { 977 struct panel_edp *panel = dev_get_drvdata(dev); 978 979 drm_panel_disable(&panel->base); 980 drm_panel_unprepare(&panel->base); 981 } 982 983 static const struct display_timing auo_b101ean01_timing = { 984 .pixelclock = { 65300000, 72500000, 75000000 }, 985 .hactive = { 1280, 1280, 1280 }, 986 .hfront_porch = { 18, 119, 119 }, 987 .hback_porch = { 21, 21, 21 }, 988 .hsync_len = { 32, 32, 32 }, 989 .vactive = { 800, 800, 800 }, 990 .vfront_porch = { 4, 4, 4 }, 991 .vback_porch = { 8, 8, 8 }, 992 .vsync_len = { 18, 20, 20 }, 993 }; 994 995 static const struct panel_desc auo_b101ean01 = { 996 .timings = &auo_b101ean01_timing, 997 .num_timings = 1, 998 .bpc = 6, 999 .size = { 1000 .width = 217, 1001 .height = 136, 1002 }, 1003 }; 1004 1005 static const struct drm_display_mode auo_b116xa3_mode = { 1006 .clock = 70589, 1007 .hdisplay = 1366, 1008 .hsync_start = 1366 + 40, 1009 .hsync_end = 1366 + 40 + 40, 1010 .htotal = 1366 + 40 + 40 + 32, 1011 .vdisplay = 768, 1012 .vsync_start = 768 + 10, 1013 .vsync_end = 768 + 10 + 12, 1014 .vtotal = 768 + 10 + 12 + 6, 1015 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1016 }; 1017 1018 static const struct drm_display_mode auo_b116xak01_mode = { 1019 .clock = 69300, 1020 .hdisplay = 1366, 1021 .hsync_start = 1366 + 48, 1022 .hsync_end = 1366 + 48 + 32, 1023 .htotal = 1366 + 48 + 32 + 10, 1024 .vdisplay = 768, 1025 .vsync_start = 768 + 4, 1026 .vsync_end = 768 + 4 + 6, 1027 .vtotal = 768 + 4 + 6 + 15, 1028 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1029 }; 1030 1031 static const struct panel_desc auo_b116xak01 = { 1032 .modes = &auo_b116xak01_mode, 1033 .num_modes = 1, 1034 .bpc = 6, 1035 .size = { 1036 .width = 256, 1037 .height = 144, 1038 }, 1039 .delay = { 1040 .hpd_absent = 200, 1041 .unprepare = 500, 1042 .enable = 50, 1043 }, 1044 }; 1045 1046 static const struct drm_display_mode auo_b133han05_mode = { 1047 .clock = 142600, 1048 .hdisplay = 1920, 1049 .hsync_start = 1920 + 58, 1050 .hsync_end = 1920 + 58 + 42, 1051 .htotal = 1920 + 58 + 42 + 60, 1052 .vdisplay = 1080, 1053 .vsync_start = 1080 + 3, 1054 .vsync_end = 1080 + 3 + 5, 1055 .vtotal = 1080 + 3 + 5 + 54, 1056 }; 1057 1058 static const struct panel_desc auo_b133han05 = { 1059 .modes = &auo_b133han05_mode, 1060 .num_modes = 1, 1061 .bpc = 8, 1062 .size = { 1063 .width = 293, 1064 .height = 165, 1065 }, 1066 .delay = { 1067 .hpd_reliable = 100, 1068 .enable = 20, 1069 .unprepare = 50, 1070 }, 1071 }; 1072 1073 static const struct drm_display_mode auo_b133htn01_mode = { 1074 .clock = 150660, 1075 .hdisplay = 1920, 1076 .hsync_start = 1920 + 172, 1077 .hsync_end = 1920 + 172 + 80, 1078 .htotal = 1920 + 172 + 80 + 60, 1079 .vdisplay = 1080, 1080 .vsync_start = 1080 + 25, 1081 .vsync_end = 1080 + 25 + 10, 1082 .vtotal = 1080 + 25 + 10 + 10, 1083 }; 1084 1085 static const struct panel_desc auo_b133htn01 = { 1086 .modes = &auo_b133htn01_mode, 1087 .num_modes = 1, 1088 .bpc = 6, 1089 .size = { 1090 .width = 293, 1091 .height = 165, 1092 }, 1093 .delay = { 1094 .hpd_reliable = 105, 1095 .enable = 20, 1096 .unprepare = 50, 1097 }, 1098 }; 1099 1100 static const struct drm_display_mode auo_b133xtn01_mode = { 1101 .clock = 69500, 1102 .hdisplay = 1366, 1103 .hsync_start = 1366 + 48, 1104 .hsync_end = 1366 + 48 + 32, 1105 .htotal = 1366 + 48 + 32 + 20, 1106 .vdisplay = 768, 1107 .vsync_start = 768 + 3, 1108 .vsync_end = 768 + 3 + 6, 1109 .vtotal = 768 + 3 + 6 + 13, 1110 }; 1111 1112 static const struct panel_desc auo_b133xtn01 = { 1113 .modes = &auo_b133xtn01_mode, 1114 .num_modes = 1, 1115 .bpc = 6, 1116 .size = { 1117 .width = 293, 1118 .height = 165, 1119 }, 1120 }; 1121 1122 static const struct drm_display_mode auo_b140han06_mode = { 1123 .clock = 141000, 1124 .hdisplay = 1920, 1125 .hsync_start = 1920 + 16, 1126 .hsync_end = 1920 + 16 + 16, 1127 .htotal = 1920 + 16 + 16 + 152, 1128 .vdisplay = 1080, 1129 .vsync_start = 1080 + 3, 1130 .vsync_end = 1080 + 3 + 14, 1131 .vtotal = 1080 + 3 + 14 + 19, 1132 }; 1133 1134 static const struct panel_desc auo_b140han06 = { 1135 .modes = &auo_b140han06_mode, 1136 .num_modes = 1, 1137 .bpc = 8, 1138 .size = { 1139 .width = 309, 1140 .height = 174, 1141 }, 1142 .delay = { 1143 .hpd_reliable = 100, 1144 .enable = 20, 1145 .unprepare = 50, 1146 }, 1147 }; 1148 1149 static const struct drm_display_mode boe_nv101wxmn51_modes[] = { 1150 { 1151 .clock = 71900, 1152 .hdisplay = 1280, 1153 .hsync_start = 1280 + 48, 1154 .hsync_end = 1280 + 48 + 32, 1155 .htotal = 1280 + 48 + 32 + 80, 1156 .vdisplay = 800, 1157 .vsync_start = 800 + 3, 1158 .vsync_end = 800 + 3 + 5, 1159 .vtotal = 800 + 3 + 5 + 24, 1160 }, 1161 { 1162 .clock = 57500, 1163 .hdisplay = 1280, 1164 .hsync_start = 1280 + 48, 1165 .hsync_end = 1280 + 48 + 32, 1166 .htotal = 1280 + 48 + 32 + 80, 1167 .vdisplay = 800, 1168 .vsync_start = 800 + 3, 1169 .vsync_end = 800 + 3 + 5, 1170 .vtotal = 800 + 3 + 5 + 24, 1171 }, 1172 }; 1173 1174 static const struct panel_desc boe_nv101wxmn51 = { 1175 .modes = boe_nv101wxmn51_modes, 1176 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes), 1177 .bpc = 8, 1178 .size = { 1179 .width = 217, 1180 .height = 136, 1181 }, 1182 .delay = { 1183 /* TODO: should be hpd-absent and no-hpd should be set? */ 1184 .hpd_reliable = 210, 1185 .enable = 50, 1186 .unprepare = 160, 1187 }, 1188 }; 1189 1190 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = { 1191 { 1192 .clock = 207800, 1193 .hdisplay = 2160, 1194 .hsync_start = 2160 + 48, 1195 .hsync_end = 2160 + 48 + 32, 1196 .htotal = 2160 + 48 + 32 + 100, 1197 .vdisplay = 1440, 1198 .vsync_start = 1440 + 3, 1199 .vsync_end = 1440 + 3 + 6, 1200 .vtotal = 1440 + 3 + 6 + 31, 1201 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1202 }, 1203 { 1204 .clock = 138500, 1205 .hdisplay = 2160, 1206 .hsync_start = 2160 + 48, 1207 .hsync_end = 2160 + 48 + 32, 1208 .htotal = 2160 + 48 + 32 + 100, 1209 .vdisplay = 1440, 1210 .vsync_start = 1440 + 3, 1211 .vsync_end = 1440 + 3 + 6, 1212 .vtotal = 1440 + 3 + 6 + 31, 1213 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1214 }, 1215 }; 1216 1217 static const struct panel_desc boe_nv110wtm_n61 = { 1218 .modes = boe_nv110wtm_n61_modes, 1219 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes), 1220 .bpc = 8, 1221 .size = { 1222 .width = 233, 1223 .height = 155, 1224 }, 1225 .delay = { 1226 .hpd_absent = 200, 1227 .prepare_to_enable = 80, 1228 .enable = 50, 1229 .unprepare = 500, 1230 }, 1231 }; 1232 1233 /* Also used for boe_nv133fhm_n62 */ 1234 static const struct drm_display_mode boe_nv133fhm_n61_modes = { 1235 .clock = 147840, 1236 .hdisplay = 1920, 1237 .hsync_start = 1920 + 48, 1238 .hsync_end = 1920 + 48 + 32, 1239 .htotal = 1920 + 48 + 32 + 200, 1240 .vdisplay = 1080, 1241 .vsync_start = 1080 + 3, 1242 .vsync_end = 1080 + 3 + 6, 1243 .vtotal = 1080 + 3 + 6 + 31, 1244 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, 1245 }; 1246 1247 /* Also used for boe_nv133fhm_n62 */ 1248 static const struct panel_desc boe_nv133fhm_n61 = { 1249 .modes = &boe_nv133fhm_n61_modes, 1250 .num_modes = 1, 1251 .bpc = 6, 1252 .size = { 1253 .width = 294, 1254 .height = 165, 1255 }, 1256 .delay = { 1257 /* 1258 * When power is first given to the panel there's a short 1259 * spike on the HPD line. It was explained that this spike 1260 * was until the TCON data download was complete. On 1261 * one system this was measured at 8 ms. We'll put 15 ms 1262 * in the prepare delay just to be safe. That means: 1263 * - If HPD isn't hooked up you still have 200 ms delay. 1264 * - If HPD is hooked up we won't try to look at it for the 1265 * first 15 ms. 1266 */ 1267 .hpd_reliable = 15, 1268 .hpd_absent = 200, 1269 1270 .unprepare = 500, 1271 }, 1272 }; 1273 1274 static const struct drm_display_mode boe_nv140fhmn49_modes[] = { 1275 { 1276 .clock = 148500, 1277 .hdisplay = 1920, 1278 .hsync_start = 1920 + 48, 1279 .hsync_end = 1920 + 48 + 32, 1280 .htotal = 2200, 1281 .vdisplay = 1080, 1282 .vsync_start = 1080 + 3, 1283 .vsync_end = 1080 + 3 + 5, 1284 .vtotal = 1125, 1285 }, 1286 }; 1287 1288 static const struct panel_desc boe_nv140fhmn49 = { 1289 .modes = boe_nv140fhmn49_modes, 1290 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes), 1291 .bpc = 6, 1292 .size = { 1293 .width = 309, 1294 .height = 174, 1295 }, 1296 .delay = { 1297 /* TODO: should be hpd-absent and no-hpd should be set? */ 1298 .hpd_reliable = 210, 1299 .enable = 50, 1300 .unprepare = 160, 1301 }, 1302 }; 1303 1304 static const struct drm_display_mode innolux_n116bca_ea1_mode = { 1305 .clock = 76420, 1306 .hdisplay = 1366, 1307 .hsync_start = 1366 + 136, 1308 .hsync_end = 1366 + 136 + 30, 1309 .htotal = 1366 + 136 + 30 + 60, 1310 .vdisplay = 768, 1311 .vsync_start = 768 + 8, 1312 .vsync_end = 768 + 8 + 12, 1313 .vtotal = 768 + 8 + 12 + 12, 1314 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, 1315 }; 1316 1317 static const struct panel_desc innolux_n116bca_ea1 = { 1318 .modes = &innolux_n116bca_ea1_mode, 1319 .num_modes = 1, 1320 .bpc = 6, 1321 .size = { 1322 .width = 256, 1323 .height = 144, 1324 }, 1325 .delay = { 1326 .hpd_absent = 200, 1327 .enable = 80, 1328 .disable = 50, 1329 .unprepare = 500, 1330 }, 1331 }; 1332 1333 /* 1334 * Datasheet specifies that at 60 Hz refresh rate: 1335 * - total horizontal time: { 1506, 1592, 1716 } 1336 * - total vertical time: { 788, 800, 868 } 1337 * 1338 * ...but doesn't go into exactly how that should be split into a front 1339 * porch, back porch, or sync length. For now we'll leave a single setting 1340 * here which allows a bit of tweaking of the pixel clock at the expense of 1341 * refresh rate. 1342 */ 1343 static const struct display_timing innolux_n116bge_timing = { 1344 .pixelclock = { 72600000, 76420000, 80240000 }, 1345 .hactive = { 1366, 1366, 1366 }, 1346 .hfront_porch = { 136, 136, 136 }, 1347 .hback_porch = { 60, 60, 60 }, 1348 .hsync_len = { 30, 30, 30 }, 1349 .vactive = { 768, 768, 768 }, 1350 .vfront_porch = { 8, 8, 8 }, 1351 .vback_porch = { 12, 12, 12 }, 1352 .vsync_len = { 12, 12, 12 }, 1353 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1354 }; 1355 1356 static const struct panel_desc innolux_n116bge = { 1357 .timings = &innolux_n116bge_timing, 1358 .num_timings = 1, 1359 .bpc = 6, 1360 .size = { 1361 .width = 256, 1362 .height = 144, 1363 }, 1364 }; 1365 1366 static const struct drm_display_mode innolux_n125hce_gn1_mode = { 1367 .clock = 162000, 1368 .hdisplay = 1920, 1369 .hsync_start = 1920 + 40, 1370 .hsync_end = 1920 + 40 + 40, 1371 .htotal = 1920 + 40 + 40 + 80, 1372 .vdisplay = 1080, 1373 .vsync_start = 1080 + 4, 1374 .vsync_end = 1080 + 4 + 4, 1375 .vtotal = 1080 + 4 + 4 + 24, 1376 }; 1377 1378 static const struct panel_desc innolux_n125hce_gn1 = { 1379 .modes = &innolux_n125hce_gn1_mode, 1380 .num_modes = 1, 1381 .bpc = 8, 1382 .size = { 1383 .width = 276, 1384 .height = 155, 1385 }, 1386 }; 1387 1388 static const struct drm_display_mode innolux_p120zdg_bf1_mode = { 1389 .clock = 206016, 1390 .hdisplay = 2160, 1391 .hsync_start = 2160 + 48, 1392 .hsync_end = 2160 + 48 + 32, 1393 .htotal = 2160 + 48 + 32 + 80, 1394 .vdisplay = 1440, 1395 .vsync_start = 1440 + 3, 1396 .vsync_end = 1440 + 3 + 10, 1397 .vtotal = 1440 + 3 + 10 + 27, 1398 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1399 }; 1400 1401 static const struct panel_desc innolux_p120zdg_bf1 = { 1402 .modes = &innolux_p120zdg_bf1_mode, 1403 .num_modes = 1, 1404 .bpc = 8, 1405 .size = { 1406 .width = 254, 1407 .height = 169, 1408 }, 1409 .delay = { 1410 .hpd_absent = 200, 1411 .unprepare = 500, 1412 }, 1413 }; 1414 1415 static const struct drm_display_mode ivo_m133nwf4_r0_mode = { 1416 .clock = 138778, 1417 .hdisplay = 1920, 1418 .hsync_start = 1920 + 24, 1419 .hsync_end = 1920 + 24 + 48, 1420 .htotal = 1920 + 24 + 48 + 88, 1421 .vdisplay = 1080, 1422 .vsync_start = 1080 + 3, 1423 .vsync_end = 1080 + 3 + 12, 1424 .vtotal = 1080 + 3 + 12 + 17, 1425 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1426 }; 1427 1428 static const struct panel_desc ivo_m133nwf4_r0 = { 1429 .modes = &ivo_m133nwf4_r0_mode, 1430 .num_modes = 1, 1431 .bpc = 8, 1432 .size = { 1433 .width = 294, 1434 .height = 165, 1435 }, 1436 .delay = { 1437 .hpd_absent = 200, 1438 .unprepare = 500, 1439 }, 1440 }; 1441 1442 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = { 1443 .clock = 81000, 1444 .hdisplay = 1366, 1445 .hsync_start = 1366 + 40, 1446 .hsync_end = 1366 + 40 + 32, 1447 .htotal = 1366 + 40 + 32 + 62, 1448 .vdisplay = 768, 1449 .vsync_start = 768 + 5, 1450 .vsync_end = 768 + 5 + 5, 1451 .vtotal = 768 + 5 + 5 + 122, 1452 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1453 }; 1454 1455 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = { 1456 .modes = &kingdisplay_kd116n21_30nv_a010_mode, 1457 .num_modes = 1, 1458 .bpc = 6, 1459 .size = { 1460 .width = 256, 1461 .height = 144, 1462 }, 1463 .delay = { 1464 .hpd_absent = 200, 1465 }, 1466 }; 1467 1468 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { 1469 .clock = 200000, 1470 .hdisplay = 1536, 1471 .hsync_start = 1536 + 12, 1472 .hsync_end = 1536 + 12 + 16, 1473 .htotal = 1536 + 12 + 16 + 48, 1474 .vdisplay = 2048, 1475 .vsync_start = 2048 + 8, 1476 .vsync_end = 2048 + 8 + 4, 1477 .vtotal = 2048 + 8 + 4 + 8, 1478 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1479 }; 1480 1481 static const struct panel_desc lg_lp079qx1_sp0v = { 1482 .modes = &lg_lp079qx1_sp0v_mode, 1483 .num_modes = 1, 1484 .size = { 1485 .width = 129, 1486 .height = 171, 1487 }, 1488 }; 1489 1490 static const struct drm_display_mode lg_lp097qx1_spa1_mode = { 1491 .clock = 205210, 1492 .hdisplay = 2048, 1493 .hsync_start = 2048 + 150, 1494 .hsync_end = 2048 + 150 + 5, 1495 .htotal = 2048 + 150 + 5 + 5, 1496 .vdisplay = 1536, 1497 .vsync_start = 1536 + 3, 1498 .vsync_end = 1536 + 3 + 1, 1499 .vtotal = 1536 + 3 + 1 + 9, 1500 }; 1501 1502 static const struct panel_desc lg_lp097qx1_spa1 = { 1503 .modes = &lg_lp097qx1_spa1_mode, 1504 .num_modes = 1, 1505 .size = { 1506 .width = 208, 1507 .height = 147, 1508 }, 1509 }; 1510 1511 static const struct drm_display_mode lg_lp120up1_mode = { 1512 .clock = 162300, 1513 .hdisplay = 1920, 1514 .hsync_start = 1920 + 40, 1515 .hsync_end = 1920 + 40 + 40, 1516 .htotal = 1920 + 40 + 40 + 80, 1517 .vdisplay = 1280, 1518 .vsync_start = 1280 + 4, 1519 .vsync_end = 1280 + 4 + 4, 1520 .vtotal = 1280 + 4 + 4 + 12, 1521 }; 1522 1523 static const struct panel_desc lg_lp120up1 = { 1524 .modes = &lg_lp120up1_mode, 1525 .num_modes = 1, 1526 .bpc = 8, 1527 .size = { 1528 .width = 267, 1529 .height = 183, 1530 }, 1531 }; 1532 1533 static const struct drm_display_mode lg_lp129qe_mode = { 1534 .clock = 285250, 1535 .hdisplay = 2560, 1536 .hsync_start = 2560 + 48, 1537 .hsync_end = 2560 + 48 + 32, 1538 .htotal = 2560 + 48 + 32 + 80, 1539 .vdisplay = 1700, 1540 .vsync_start = 1700 + 3, 1541 .vsync_end = 1700 + 3 + 10, 1542 .vtotal = 1700 + 3 + 10 + 36, 1543 }; 1544 1545 static const struct panel_desc lg_lp129qe = { 1546 .modes = &lg_lp129qe_mode, 1547 .num_modes = 1, 1548 .bpc = 8, 1549 .size = { 1550 .width = 272, 1551 .height = 181, 1552 }, 1553 }; 1554 1555 static const struct drm_display_mode neweast_wjfh116008a_modes[] = { 1556 { 1557 .clock = 138500, 1558 .hdisplay = 1920, 1559 .hsync_start = 1920 + 48, 1560 .hsync_end = 1920 + 48 + 32, 1561 .htotal = 1920 + 48 + 32 + 80, 1562 .vdisplay = 1080, 1563 .vsync_start = 1080 + 3, 1564 .vsync_end = 1080 + 3 + 5, 1565 .vtotal = 1080 + 3 + 5 + 23, 1566 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1567 }, { 1568 .clock = 110920, 1569 .hdisplay = 1920, 1570 .hsync_start = 1920 + 48, 1571 .hsync_end = 1920 + 48 + 32, 1572 .htotal = 1920 + 48 + 32 + 80, 1573 .vdisplay = 1080, 1574 .vsync_start = 1080 + 3, 1575 .vsync_end = 1080 + 3 + 5, 1576 .vtotal = 1080 + 3 + 5 + 23, 1577 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1578 } 1579 }; 1580 1581 static const struct panel_desc neweast_wjfh116008a = { 1582 .modes = neweast_wjfh116008a_modes, 1583 .num_modes = 2, 1584 .bpc = 6, 1585 .size = { 1586 .width = 260, 1587 .height = 150, 1588 }, 1589 .delay = { 1590 .hpd_reliable = 110, 1591 .enable = 20, 1592 .unprepare = 500, 1593 }, 1594 }; 1595 1596 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { 1597 .clock = 271560, 1598 .hdisplay = 2560, 1599 .hsync_start = 2560 + 48, 1600 .hsync_end = 2560 + 48 + 32, 1601 .htotal = 2560 + 48 + 32 + 80, 1602 .vdisplay = 1600, 1603 .vsync_start = 1600 + 2, 1604 .vsync_end = 1600 + 2 + 5, 1605 .vtotal = 1600 + 2 + 5 + 57, 1606 }; 1607 1608 static const struct panel_desc samsung_lsn122dl01_c01 = { 1609 .modes = &samsung_lsn122dl01_c01_mode, 1610 .num_modes = 1, 1611 .size = { 1612 .width = 263, 1613 .height = 164, 1614 }, 1615 }; 1616 1617 static const struct drm_display_mode samsung_ltn140at29_301_mode = { 1618 .clock = 76300, 1619 .hdisplay = 1366, 1620 .hsync_start = 1366 + 64, 1621 .hsync_end = 1366 + 64 + 48, 1622 .htotal = 1366 + 64 + 48 + 128, 1623 .vdisplay = 768, 1624 .vsync_start = 768 + 2, 1625 .vsync_end = 768 + 2 + 5, 1626 .vtotal = 768 + 2 + 5 + 17, 1627 }; 1628 1629 static const struct panel_desc samsung_ltn140at29_301 = { 1630 .modes = &samsung_ltn140at29_301_mode, 1631 .num_modes = 1, 1632 .bpc = 6, 1633 .size = { 1634 .width = 320, 1635 .height = 187, 1636 }, 1637 }; 1638 1639 static const struct drm_display_mode sharp_ld_d5116z01b_mode = { 1640 .clock = 168480, 1641 .hdisplay = 1920, 1642 .hsync_start = 1920 + 48, 1643 .hsync_end = 1920 + 48 + 32, 1644 .htotal = 1920 + 48 + 32 + 80, 1645 .vdisplay = 1280, 1646 .vsync_start = 1280 + 3, 1647 .vsync_end = 1280 + 3 + 10, 1648 .vtotal = 1280 + 3 + 10 + 57, 1649 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, 1650 }; 1651 1652 static const struct panel_desc sharp_ld_d5116z01b = { 1653 .modes = &sharp_ld_d5116z01b_mode, 1654 .num_modes = 1, 1655 .bpc = 8, 1656 .size = { 1657 .width = 260, 1658 .height = 120, 1659 }, 1660 }; 1661 1662 static const struct display_timing sharp_lq123p1jx31_timing = { 1663 .pixelclock = { 252750000, 252750000, 266604720 }, 1664 .hactive = { 2400, 2400, 2400 }, 1665 .hfront_porch = { 48, 48, 48 }, 1666 .hback_porch = { 80, 80, 84 }, 1667 .hsync_len = { 32, 32, 32 }, 1668 .vactive = { 1600, 1600, 1600 }, 1669 .vfront_porch = { 3, 3, 3 }, 1670 .vback_porch = { 33, 33, 120 }, 1671 .vsync_len = { 10, 10, 10 }, 1672 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW, 1673 }; 1674 1675 static const struct panel_desc sharp_lq123p1jx31 = { 1676 .timings = &sharp_lq123p1jx31_timing, 1677 .num_timings = 1, 1678 .bpc = 8, 1679 .size = { 1680 .width = 259, 1681 .height = 173, 1682 }, 1683 .delay = { 1684 .hpd_reliable = 110, 1685 .enable = 50, 1686 .unprepare = 550, 1687 }, 1688 }; 1689 1690 static const struct drm_display_mode sharp_lq140m1jw46_mode[] = { 1691 { 1692 .clock = 346500, 1693 .hdisplay = 1920, 1694 .hsync_start = 1920 + 48, 1695 .hsync_end = 1920 + 48 + 32, 1696 .htotal = 1920 + 48 + 32 + 80, 1697 .vdisplay = 1080, 1698 .vsync_start = 1080 + 3, 1699 .vsync_end = 1080 + 3 + 5, 1700 .vtotal = 1080 + 3 + 5 + 69, 1701 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1702 }, { 1703 .clock = 144370, 1704 .hdisplay = 1920, 1705 .hsync_start = 1920 + 48, 1706 .hsync_end = 1920 + 48 + 32, 1707 .htotal = 1920 + 48 + 32 + 80, 1708 .vdisplay = 1080, 1709 .vsync_start = 1080 + 3, 1710 .vsync_end = 1080 + 3 + 5, 1711 .vtotal = 1080 + 3 + 5 + 69, 1712 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1713 }, 1714 }; 1715 1716 static const struct panel_desc sharp_lq140m1jw46 = { 1717 .modes = sharp_lq140m1jw46_mode, 1718 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode), 1719 .bpc = 8, 1720 .size = { 1721 .width = 309, 1722 .height = 174, 1723 }, 1724 .delay = { 1725 .hpd_absent = 80, 1726 .enable = 50, 1727 .unprepare = 500, 1728 }, 1729 }; 1730 1731 static const struct drm_display_mode starry_kr122ea0sra_mode = { 1732 .clock = 147000, 1733 .hdisplay = 1920, 1734 .hsync_start = 1920 + 16, 1735 .hsync_end = 1920 + 16 + 16, 1736 .htotal = 1920 + 16 + 16 + 32, 1737 .vdisplay = 1200, 1738 .vsync_start = 1200 + 15, 1739 .vsync_end = 1200 + 15 + 2, 1740 .vtotal = 1200 + 15 + 2 + 18, 1741 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, 1742 }; 1743 1744 static const struct panel_desc starry_kr122ea0sra = { 1745 .modes = &starry_kr122ea0sra_mode, 1746 .num_modes = 1, 1747 .size = { 1748 .width = 263, 1749 .height = 164, 1750 }, 1751 .delay = { 1752 /* TODO: should be hpd-absent and no-hpd should be set? */ 1753 .hpd_reliable = 10 + 200, 1754 .enable = 50, 1755 .unprepare = 10 + 500, 1756 }, 1757 }; 1758 1759 static const struct of_device_id platform_of_match[] = { 1760 { 1761 /* Must be first */ 1762 .compatible = "edp-panel", 1763 }, { 1764 .compatible = "auo,b101ean01", 1765 .data = &auo_b101ean01, 1766 }, { 1767 .compatible = "auo,b116xa01", 1768 .data = &auo_b116xak01, 1769 }, { 1770 .compatible = "auo,b133han05", 1771 .data = &auo_b133han05, 1772 }, { 1773 .compatible = "auo,b133htn01", 1774 .data = &auo_b133htn01, 1775 }, { 1776 .compatible = "auo,b133xtn01", 1777 .data = &auo_b133xtn01, 1778 }, { 1779 .compatible = "auo,b140han06", 1780 .data = &auo_b140han06, 1781 }, { 1782 .compatible = "boe,nv101wxmn51", 1783 .data = &boe_nv101wxmn51, 1784 }, { 1785 .compatible = "boe,nv110wtm-n61", 1786 .data = &boe_nv110wtm_n61, 1787 }, { 1788 .compatible = "boe,nv133fhm-n61", 1789 .data = &boe_nv133fhm_n61, 1790 }, { 1791 .compatible = "boe,nv133fhm-n62", 1792 .data = &boe_nv133fhm_n61, 1793 }, { 1794 .compatible = "boe,nv140fhmn49", 1795 .data = &boe_nv140fhmn49, 1796 }, { 1797 .compatible = "innolux,n116bca-ea1", 1798 .data = &innolux_n116bca_ea1, 1799 }, { 1800 .compatible = "innolux,n116bge", 1801 .data = &innolux_n116bge, 1802 }, { 1803 .compatible = "innolux,n125hce-gn1", 1804 .data = &innolux_n125hce_gn1, 1805 }, { 1806 .compatible = "innolux,p120zdg-bf1", 1807 .data = &innolux_p120zdg_bf1, 1808 }, { 1809 .compatible = "ivo,m133nwf4-r0", 1810 .data = &ivo_m133nwf4_r0, 1811 }, { 1812 .compatible = "kingdisplay,kd116n21-30nv-a010", 1813 .data = &kingdisplay_kd116n21_30nv_a010, 1814 }, { 1815 .compatible = "lg,lp079qx1-sp0v", 1816 .data = &lg_lp079qx1_sp0v, 1817 }, { 1818 .compatible = "lg,lp097qx1-spa1", 1819 .data = &lg_lp097qx1_spa1, 1820 }, { 1821 .compatible = "lg,lp120up1", 1822 .data = &lg_lp120up1, 1823 }, { 1824 .compatible = "lg,lp129qe", 1825 .data = &lg_lp129qe, 1826 }, { 1827 .compatible = "neweast,wjfh116008a", 1828 .data = &neweast_wjfh116008a, 1829 }, { 1830 .compatible = "samsung,lsn122dl01-c01", 1831 .data = &samsung_lsn122dl01_c01, 1832 }, { 1833 .compatible = "samsung,ltn140at29-301", 1834 .data = &samsung_ltn140at29_301, 1835 }, { 1836 .compatible = "sharp,ld-d5116z01b", 1837 .data = &sharp_ld_d5116z01b, 1838 }, { 1839 .compatible = "sharp,lq123p1jx31", 1840 .data = &sharp_lq123p1jx31, 1841 }, { 1842 .compatible = "sharp,lq140m1jw46", 1843 .data = &sharp_lq140m1jw46, 1844 }, { 1845 .compatible = "starry,kr122ea0sra", 1846 .data = &starry_kr122ea0sra, 1847 }, { 1848 /* sentinel */ 1849 } 1850 }; 1851 MODULE_DEVICE_TABLE(of, platform_of_match); 1852 1853 static const struct panel_delay delay_200_500_p2e80 = { 1854 .hpd_absent = 200, 1855 .unprepare = 500, 1856 .prepare_to_enable = 80, 1857 }; 1858 1859 static const struct panel_delay delay_200_500_e50_p2e80 = { 1860 .hpd_absent = 200, 1861 .unprepare = 500, 1862 .enable = 50, 1863 .prepare_to_enable = 80, 1864 }; 1865 1866 static const struct panel_delay delay_200_500_p2e100 = { 1867 .hpd_absent = 200, 1868 .unprepare = 500, 1869 .prepare_to_enable = 100, 1870 }; 1871 1872 static const struct panel_delay delay_200_500_e50 = { 1873 .hpd_absent = 200, 1874 .unprepare = 500, 1875 .enable = 50, 1876 }; 1877 1878 static const struct panel_delay delay_200_500_e80 = { 1879 .hpd_absent = 200, 1880 .unprepare = 500, 1881 .enable = 80, 1882 }; 1883 1884 static const struct panel_delay delay_200_500_e80_d50 = { 1885 .hpd_absent = 200, 1886 .unprepare = 500, 1887 .enable = 80, 1888 .disable = 50, 1889 }; 1890 1891 static const struct panel_delay delay_100_500_e200 = { 1892 .hpd_absent = 100, 1893 .unprepare = 500, 1894 .enable = 200, 1895 }; 1896 1897 static const struct panel_delay delay_200_500_e200 = { 1898 .hpd_absent = 200, 1899 .unprepare = 500, 1900 .enable = 200, 1901 }; 1902 1903 static const struct panel_delay delay_200_500_e200_d200 = { 1904 .hpd_absent = 200, 1905 .unprepare = 500, 1906 .enable = 200, 1907 .disable = 200, 1908 }; 1909 1910 static const struct panel_delay delay_200_500_e200_d10 = { 1911 .hpd_absent = 200, 1912 .unprepare = 500, 1913 .enable = 200, 1914 .disable = 10, 1915 }; 1916 1917 static const struct panel_delay delay_200_150_e200 = { 1918 .hpd_absent = 200, 1919 .unprepare = 150, 1920 .enable = 200, 1921 }; 1922 1923 static const struct panel_delay delay_200_500_e50_po2e200 = { 1924 .hpd_absent = 200, 1925 .unprepare = 500, 1926 .enable = 50, 1927 .powered_on_to_enable = 200, 1928 }; 1929 1930 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \ 1931 { \ 1932 .name = _name, \ 1933 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1934 product_id), \ 1935 .delay = _delay \ 1936 } 1937 1938 #define EDP_PANEL_ENTRY2(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name, _mode) \ 1939 { \ 1940 .name = _name, \ 1941 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \ 1942 product_id), \ 1943 .delay = _delay, \ 1944 .override_edid_mode = _mode \ 1945 } 1946 1947 /* 1948 * This table is used to figure out power sequencing delays for panels that 1949 * are detected by EDID. Entries here may point to entries in the 1950 * platform_of_match table (if a panel is listed in both places). 1951 * 1952 * Sort first by vendor, then by product ID. 1953 */ 1954 static const struct edp_panel_entry edp_panels[] = { 1955 EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), 1956 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), 1957 EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), 1958 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), 1959 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), 1960 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"), 1961 EDP_PANEL_ENTRY('A', 'U', 'O', 0x208d, &delay_200_500_e50, "B140HTN02.1"), 1962 EDP_PANEL_ENTRY('A', 'U', 'O', 0x235c, &delay_200_500_e50, "B116XTN02.3"), 1963 EDP_PANEL_ENTRY('A', 'U', 'O', 0x239b, &delay_200_500_e50, "B116XAN06.1"), 1964 EDP_PANEL_ENTRY('A', 'U', 'O', 0x255c, &delay_200_500_e50, "B116XTN02.5"), 1965 EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), 1966 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.0", 1967 &auo_b116xa3_mode), 1968 EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), 1969 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), 1970 EDP_PANEL_ENTRY2('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1", 1971 &auo_b116xa3_mode), 1972 EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), 1973 EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), 1974 EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), 1975 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), 1976 EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), 1977 1978 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), 1979 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"), 1980 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), 1981 EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), 1982 EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), 1983 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), 1984 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21"), 1985 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133FHM-N42"), 1986 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"), 1987 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44"), 1988 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), 1989 EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), 1990 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), 1991 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116WHM-N45"), 1992 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), 1993 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"), 1994 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), 1995 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"), 1996 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), 1997 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44"), 1998 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), 1999 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), 2000 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WHM-N44 V8.0"), 2001 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"), 2002 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), 2003 EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49"), 2004 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), 2005 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), 2006 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,836X2"), 2007 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"), 2008 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"), 2009 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"), 2010 EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116WHM-T07 V8.0"), 2011 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 V8.0"), 2012 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"), 2013 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 V8.0"), 2014 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"), 2015 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45"), 2016 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"), 2017 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), 2018 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a3e, &delay_200_500_e80, "NV116WHM-N49"), 2019 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"), 2020 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"), 2021 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"), 2022 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"), 2023 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"), 2024 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"), 2025 2026 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), 2027 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-EA2"), 2028 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116BCA-EA1-RC4"), 2029 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"), 2030 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), 2031 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-EB1"), 2032 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), 2033 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"), 2034 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"), 2035 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"), 2036 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"), 2037 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), 2038 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-EA2"), 2039 EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-EB1"), 2040 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"), 2041 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-EAC"), 2042 EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-EA4"), 2043 EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-EA1"), 2044 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), 2045 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"), 2046 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-EA4"), 2047 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-EA1"), 2048 2049 EDP_PANEL_ENTRY('C', 'S', 'O', 0x1200, &delay_200_500_e50, "MNC207QS1-1"), 2050 2051 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), 2052 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "Unknown"), 2053 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"), 2054 2055 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6 R5"), 2056 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"), 2057 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"), 2058 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"), 2059 EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"), 2060 2061 EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), 2062 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"), 2063 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK-A005"), 2064 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"), 2065 2066 EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-F3"), 2067 EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-30NV-G7"), 2068 EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15"), 2069 2070 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown"), 2071 EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown"), 2072 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH7-SPB1"), 2073 EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF2-SPL7"), 2074 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown"), 2075 EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH8-SPC1"), 2076 EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown"), 2077 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown"), 2078 EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown"), 2079 2080 EDP_PANEL_ENTRY('S', 'D', 'C', 0x416d, &delay_100_500_e200, "ATNA45AF01"), 2081 2082 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), 2083 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"), 2084 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"), 2085 2086 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"), 2087 2088 { /* sentinal */ } 2089 }; 2090 2091 static const struct edp_panel_entry *find_edp_panel(u32 panel_id) 2092 { 2093 const struct edp_panel_entry *panel; 2094 2095 if (!panel_id) 2096 return NULL; 2097 2098 for (panel = edp_panels; panel->panel_id; panel++) 2099 if (panel->panel_id == panel_id) 2100 return panel; 2101 2102 return NULL; 2103 } 2104 2105 static int panel_edp_platform_probe(struct platform_device *pdev) 2106 { 2107 const struct of_device_id *id; 2108 2109 /* Skip one since "edp-panel" is only supported on DP AUX bus */ 2110 id = of_match_node(platform_of_match + 1, pdev->dev.of_node); 2111 if (!id) 2112 return -ENODEV; 2113 2114 return panel_edp_probe(&pdev->dev, id->data, NULL); 2115 } 2116 2117 static void panel_edp_platform_remove(struct platform_device *pdev) 2118 { 2119 panel_edp_remove(&pdev->dev); 2120 } 2121 2122 static void panel_edp_platform_shutdown(struct platform_device *pdev) 2123 { 2124 panel_edp_shutdown(&pdev->dev); 2125 } 2126 2127 static const struct dev_pm_ops panel_edp_pm_ops = { 2128 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL) 2129 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 2130 pm_runtime_force_resume) 2131 }; 2132 2133 static struct platform_driver panel_edp_platform_driver = { 2134 .driver = { 2135 .name = "panel-edp", 2136 .of_match_table = platform_of_match, 2137 .pm = &panel_edp_pm_ops, 2138 }, 2139 .probe = panel_edp_platform_probe, 2140 .remove_new = panel_edp_platform_remove, 2141 .shutdown = panel_edp_platform_shutdown, 2142 }; 2143 2144 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep) 2145 { 2146 const struct of_device_id *id; 2147 2148 id = of_match_node(platform_of_match, aux_ep->dev.of_node); 2149 if (!id) 2150 return -ENODEV; 2151 2152 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux); 2153 } 2154 2155 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep) 2156 { 2157 panel_edp_remove(&aux_ep->dev); 2158 } 2159 2160 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep) 2161 { 2162 panel_edp_shutdown(&aux_ep->dev); 2163 } 2164 2165 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = { 2166 .driver = { 2167 .name = "panel-simple-dp-aux", 2168 .of_match_table = platform_of_match, /* Same as platform one! */ 2169 .pm = &panel_edp_pm_ops, 2170 }, 2171 .probe = panel_edp_dp_aux_ep_probe, 2172 .remove = panel_edp_dp_aux_ep_remove, 2173 .shutdown = panel_edp_dp_aux_ep_shutdown, 2174 }; 2175 2176 static int __init panel_edp_init(void) 2177 { 2178 int err; 2179 2180 err = platform_driver_register(&panel_edp_platform_driver); 2181 if (err < 0) 2182 return err; 2183 2184 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver); 2185 if (err < 0) 2186 goto err_did_platform_register; 2187 2188 return 0; 2189 2190 err_did_platform_register: 2191 platform_driver_unregister(&panel_edp_platform_driver); 2192 2193 return err; 2194 } 2195 module_init(panel_edp_init); 2196 2197 static void __exit panel_edp_exit(void) 2198 { 2199 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver); 2200 platform_driver_unregister(&panel_edp_platform_driver); 2201 } 2202 module_exit(panel_edp_exit); 2203 2204 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>"); 2205 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels"); 2206 MODULE_LICENSE("GPL and additional rights"); 2207