xref: /linux/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c (revision 55d0969c451159cff86949b38c39171cab962069)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2018 MediaTek Inc.
4  * Author: Jitao Shi <jitao.shi@mediatek.com>
5  */
6 
7 #include <linux/delay.h>
8 #include <linux/gpio/consumer.h>
9 #include <linux/module.h>
10 #include <linux/of.h>
11 #include <linux/regulator/consumer.h>
12 
13 #include <drm/drm_connector.h>
14 #include <drm/drm_crtc.h>
15 #include <drm/drm_mipi_dsi.h>
16 #include <drm/drm_panel.h>
17 
18 #include <video/mipi_display.h>
19 
20 struct boe_panel;
21 
22 struct panel_desc {
23 	const struct drm_display_mode *modes;
24 	unsigned int bpc;
25 
26 	/**
27 	 * @width_mm: width of the panel's active display area
28 	 * @height_mm: height of the panel's active display area
29 	 */
30 	struct {
31 		unsigned int width_mm;
32 		unsigned int height_mm;
33 	} size;
34 
35 	unsigned long mode_flags;
36 	enum mipi_dsi_pixel_format format;
37 	int (*init)(struct boe_panel *boe);
38 	unsigned int lanes;
39 	bool discharge_on_disable;
40 	bool lp11_before_reset;
41 };
42 
43 struct boe_panel {
44 	struct drm_panel base;
45 	struct mipi_dsi_device *dsi;
46 
47 	const struct panel_desc *desc;
48 
49 	enum drm_panel_orientation orientation;
50 	struct regulator *pp3300;
51 	struct regulator *pp1800;
52 	struct regulator *avee;
53 	struct regulator *avdd;
54 	struct gpio_desc *enable_gpio;
55 };
56 
57 #define NT36523_DCS_SWITCH_PAGE	0xff
58 
59 #define nt36523_switch_page(ctx, page) \
60 	mipi_dsi_dcs_write_seq_multi(ctx, NT36523_DCS_SWITCH_PAGE, (page))
61 
62 static void nt36523_enable_reload_cmds(struct mipi_dsi_multi_context *ctx)
63 {
64 	mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01);
65 }
66 
67 static int boe_tv110c9m_init(struct boe_panel *boe)
68 {
69 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
70 
71 	nt36523_switch_page(&ctx, 0x20);
72 	nt36523_enable_reload_cmds(&ctx);
73 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0xd9);
74 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x78);
75 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x5a);
76 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x63);
77 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x91);
78 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x73);
79 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0xe6);
80 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x96, 0xf0);
81 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x00);
82 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x66);
83 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0xa2);
84 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x3b);
85 
86 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d,
87 				     0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
88 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e,
89 				     0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
90 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08,
91 				     0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
92 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7,
93 				     0x03, 0xfd, 0x03, 0xff);
94 
95 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d,
96 				     0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
97 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e,
98 				     0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
99 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08,
100 				     0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
101 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7,
102 				     0x03, 0xfd, 0x03, 0xff);
103 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d,
104 				     0x00, 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9);
105 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e,
106 				     0x01, 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31);
107 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08,
108 				     0x03, 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b);
109 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7,
110 				     0x03, 0xfd, 0x03, 0xff);
111 
112 	nt36523_switch_page(&ctx, 0x21);
113 	nt36523_enable_reload_cmds(&ctx);
114 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65,
115 				     0x00, 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
116 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76,
117 				     0x01, 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
118 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00,
119 				     0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
120 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf,
121 				     0x03, 0xf5, 0x03, 0xe0);
122 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65,
123 				     0x00, 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
124 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76,
125 				     0x01, 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
126 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00,
127 				     0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
128 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf,
129 				     0x03, 0xf5, 0x03, 0xe0);
130 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65,
131 				     0x00, 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1);
132 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76,
133 				     0x01, 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29);
134 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00,
135 				     0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73);
136 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf,
137 				     0x03, 0xf5, 0x03, 0xe0);
138 
139 	nt36523_switch_page(&ctx, 0x24);
140 	nt36523_enable_reload_cmds(&ctx);
141 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x00);
142 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x00);
143 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x1c);
144 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x1c);
145 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x1d);
146 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x1d);
147 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x04);
148 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x04);
149 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x0f);
150 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x0f);
151 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x0e);
152 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x0e);
153 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x0d);
154 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x0d);
155 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x0c);
156 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x0c);
157 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x10, 0x08);
158 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x08);
159 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x00);
160 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x00);
161 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x00);
162 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x00);
163 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x00);
164 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0x00);
165 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x1c);
166 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x1c);
167 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x1d);
168 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x1d);
169 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1c, 0x04);
170 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x04);
171 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x0f);
172 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x0f);
173 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x0e);
174 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x0e);
175 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x0d);
176 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x0d);
177 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x0c);
178 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x0c);
179 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x08);
180 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x08);
181 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0x00);
182 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x00);
183 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x00);
184 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x00);
185 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x20);
186 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x0a);
187 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x44);
188 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x0c);
189 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x32);
190 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0x44);
191 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x40);
192 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x00);
193 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x5d);
194 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x60);
195 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x42);
196 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x06);
197 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x43, 0x06);
198 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x47, 0x66);
199 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4a, 0x5d);
200 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4b, 0x60);
201 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4c, 0x91);
202 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4d, 0x21);
203 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4e, 0x43);
204 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x51, 0x12);
205 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x52, 0x34);
206 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x82, 0x02);
207 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x04);
208 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x21);
209 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x30);
210 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x60);
211 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x50);
212 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x00, 0x06);
213 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x00);
214 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x65, 0x82);
215 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x20);
216 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x3c);
217 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x04);
218 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x97, 0xc0);
219 
220 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
221 				     0x05, 0x05, 0x00, 0x00);
222 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x91, 0x44);
223 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0xa9);
224 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x93, 0x1a);
225 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x94, 0x96);
226 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x55);
227 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xda, 0x0a);
228 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x08);
229 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x05);
230 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0xa9);
231 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x22);
232 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x05);
233 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0xa9);
234 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x05);
235 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0xa9);
236 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe3, 0x05);
237 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0xa9);
238 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x05);
239 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0xa9);
240 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x00);
241 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5d, 0x00);
242 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x8d, 0x00);
243 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x8e, 0x00);
244 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x90);
245 
246 	nt36523_switch_page(&ctx, 0x25);
247 	nt36523_enable_reload_cmds(&ctx);
248 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x00);
249 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x07);
250 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x60);
251 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x50);
252 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x60);
253 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x50);
254 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x60);
255 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x50);
256 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0xe0);
257 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x40, 0x00);
258 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x44, 0x00);
259 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x45, 0x40);
260 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x48, 0x60);
261 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x49, 0x50);
262 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x00);
263 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x00);
264 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5d, 0x00);
265 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0xd0);
266 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x60);
267 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x50);
268 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xf1, 0x10);
269 
270 	nt36523_switch_page(&ctx, 0x2a);
271 	nt36523_enable_reload_cmds(&ctx);
272 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x16);
273 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x16);
274 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x16);
275 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x70, 0x30);
276 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa2, 0xf3);
277 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa3, 0xff);
278 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa4, 0xff);
279 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0xff);
280 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x08);
281 
282 	nt36523_switch_page(&ctx, 0x26);
283 	nt36523_enable_reload_cmds(&ctx);
284 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0xa1);
285 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x31);
286 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x28);
287 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x30);
288 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x16);
289 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x0d);
290 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x00);
291 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x00);
292 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x50);
293 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x56);
294 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x57);
295 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x00);
296 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x10);
297 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0xa0);
298 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x86);
299 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0d);
300 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x7f);
301 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x0c);
302 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1c, 0xbf);
303 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x00);
304 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x00);
305 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x0d);
306 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x7f);
307 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x00);
308 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x65);
309 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x65);
310 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x00);
311 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x65);
312 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x05);
313 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x65);
314 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x05);
315 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x7d);
316 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x00);
317 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x65);
318 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x01);
319 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x11);
320 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x78);
321 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x16);
322 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x04);
323 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x9e);
324 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x4e);
325 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x00);
326 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa9, 0x49);
327 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xaa, 0x4b);
328 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xab, 0x48);
329 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xac, 0x43);
330 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xad, 0x40);
331 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xae, 0x50);
332 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xaf, 0x44);
333 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x54);
334 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x4e);
335 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x4d);
336 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x4c);
337 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x41);
338 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x47);
339 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x53);
340 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x3e);
341 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x51);
342 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x3c);
343 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x3b);
344 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x46);
345 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x45);
346 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x55);
347 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0x3d);
348 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x3f);
349 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x52);
350 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x4a);
351 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x39);
352 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x4f);
353 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x3a);
354 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x42);
355 
356 	nt36523_switch_page(&ctx, 0x27);
357 	nt36523_enable_reload_cmds(&ctx);
358 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x06);
359 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x80);
360 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x75);
361 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x00);
362 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x02);
363 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x00);
364 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5d, 0x00);
365 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x20);
366 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x10);
367 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x60, 0x00);
368 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x2e);
369 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x00);
370 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x63, 0x01);
371 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x43);
372 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x65, 0x2d);
373 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0x00);
374 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x01);
375 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x44);
376 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x00);
377 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x78, 0x00);
378 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x00);
379 
380 	nt36523_switch_page(&ctx, 0x2a);
381 	nt36523_enable_reload_cmds(&ctx);
382 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x2f);
383 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x08);
384 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x00);
385 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x65);
386 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0xf8);
387 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x00);
388 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0x1a);
389 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x00);
390 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x1a);
391 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x00);
392 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x1a);
393 
394 	nt36523_switch_page(&ctx, 0x23);
395 	nt36523_enable_reload_cmds(&ctx);
396 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x80);
397 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x00);
398 
399 	nt36523_switch_page(&ctx, 0xe0);
400 	nt36523_enable_reload_cmds(&ctx);
401 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x60);
402 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0xc0);
403 
404 	nt36523_switch_page(&ctx, 0xf0);
405 	nt36523_enable_reload_cmds(&ctx);
406 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x08);
407 
408 	nt36523_switch_page(&ctx, 0x10);
409 	nt36523_enable_reload_cmds(&ctx);
410 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x01);
411 
412 	nt36523_switch_page(&ctx, 0x20);
413 	nt36523_enable_reload_cmds(&ctx);
414 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x40);
415 
416 	nt36523_switch_page(&ctx, 0x10);
417 	nt36523_enable_reload_cmds(&ctx);
418 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x02);
419 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x00);
420 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x51, 0x00, 0xff);
421 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x24);
422 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00);
423 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x13);
424 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x03, 0x96, 0x1a, 0x04, 0x04);
425 
426 	mipi_dsi_msleep(&ctx, 100);
427 
428 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11);
429 
430 	mipi_dsi_msleep(&ctx, 200);
431 
432 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29);
433 
434 	mipi_dsi_msleep(&ctx, 100);
435 
436 	return 0;
437 };
438 
439 static int inx_hj110iz_init(struct boe_panel *boe)
440 {
441 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
442 
443 	nt36523_switch_page(&ctx, 0x20);
444 	nt36523_enable_reload_cmds(&ctx);
445 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0xd1);
446 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0xc0);
447 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x87);
448 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x4b);
449 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x63);
450 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x91);
451 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x69);
452 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x94, 0x00);
453 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0xf5);
454 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x96, 0xf5);
455 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9d, 0x00);
456 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9e, 0x00);
457 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x98);
458 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0xa2);
459 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0xb3);
460 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x43);
461 
462 	nt36523_switch_page(&ctx, 0x24);
463 	nt36523_enable_reload_cmds(&ctx);
464 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x91, 0x44);
465 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x4c);
466 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x94, 0x86);
467 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x60, 0x96);
468 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0xd0);
469 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x63, 0x70);
470 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xca);
471 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x03);
472 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x03);
473 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x03);
474 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x29);
475 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x22);
476 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x22);
477 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x0b);
478 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x1d);
479 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x1c);
480 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x05);
481 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x08);
482 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x09);
483 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x0a);
484 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x0c);
485 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x0d);
486 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x0e);
487 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x10, 0x0f);
488 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x10);
489 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x11);
490 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x04);
491 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x00);
492 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x03);
493 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x03);
494 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0x03);
495 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x03);
496 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x29);
497 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x22);
498 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x22);
499 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1c, 0x0b);
500 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x1d);
501 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x1c);
502 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x05);
503 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x08);
504 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x09);
505 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x0a);
506 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x0c);
507 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x0d);
508 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x0e);
509 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x0f);
510 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x10);
511 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0x11);
512 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x04);
513 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x00);
514 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x03);
515 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x0a);
516 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x35);
517 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0xa7);
518 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x00);
519 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x46);
520 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x32);
521 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3d, 0x12);
522 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x33);
523 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x40, 0x31);
524 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x41, 0x40);
525 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x42, 0x42);
526 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x47, 0x77);
527 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x48, 0x77);
528 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4a, 0x45);
529 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4b, 0x45);
530 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4c, 0x14);
531 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4d, 0x21);
532 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4e, 0x43);
533 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x4f, 0x65);
534 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x06);
535 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x06);
536 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x21);
537 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x70);
538 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x46);
539 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x32);
540 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x88);
541 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x00, 0x00);
542 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x00);
543 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0xff);
544 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0xff);
545 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7c, 0x00);
546 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x00);
547 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x20);
548 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x3c);
549 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x00);
550 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x00);
551 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x08);
552 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x97, 0x02);
553 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x10);
554 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x55);
555 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd8, 0x55);
556 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x23);
557 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xda, 0x05);
558 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x01);
559 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x65);
560 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x55);
561 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x27);
562 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x01);
563 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x65);
564 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x01);
565 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x65);
566 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe3, 0x01);
567 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0x65);
568 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x01);
569 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x65);
570 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x00);
571 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe8, 0x00);
572 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe9, 0x01);
573 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xea, 0x65);
574 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xeb, 0x01);
575 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xee, 0x65);
576 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xef, 0x01);
577 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xf0, 0x65);
578 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
579 				     0x05, 0x05, 0x00, 0x00);
580 
581 	nt36523_switch_page(&ctx, 0x25);
582 	nt36523_enable_reload_cmds(&ctx);
583 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x00);
584 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xf1, 0x10);
585 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x00);
586 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x46);
587 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x32);
588 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x00);
589 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x46);
590 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x32);
591 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3f, 0x80);
592 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x40, 0x00);
593 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x43, 0x00);
594 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x44, 0x46);
595 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x45, 0x46);
596 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x48, 0x46);
597 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x49, 0x32);
598 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x80);
599 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x00);
600 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5d, 0x46);
601 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x32);
602 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x46);
603 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x60, 0x32);
604 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x46);
605 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x32);
606 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x0c);
607 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6c, 0x0d);
608 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x0d);
609 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x78, 0x00);
610 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0xc5);
611 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x0c);
612 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0xb0);
613 
614 	nt36523_switch_page(&ctx, 0x26);
615 	nt36523_enable_reload_cmds(&ctx);
616 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0xa1);
617 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x31);
618 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0xf4);
619 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x50);
620 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x30);
621 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x16);
622 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x0d);
623 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x00);
624 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x00);
625 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x50);
626 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x40);
627 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0x58);
628 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x00);
629 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x10);
630 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0xa0);
631 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x86);
632 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x00);
633 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x00);
634 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0e);
635 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x31);
636 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x0d);
637 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1c, 0x29);
638 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x0e);
639 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x31);
640 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x00);
641 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x62);
642 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x62);
643 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x06);
644 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x62);
645 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x06);
646 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x7f);
647 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x11);
648 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x89);
649 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x67);
650 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0x0b);
651 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x62);
652 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x06);
653 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x04);
654 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x89);
655 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x4e);
656 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x00);
657 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa9, 0x3f);
658 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xaa, 0x3e);
659 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xab, 0x3d);
660 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xac, 0x3c);
661 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xad, 0x3b);
662 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xae, 0x3a);
663 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xaf, 0x39);
664 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x38);
665 
666 	nt36523_switch_page(&ctx, 0x27);
667 	nt36523_enable_reload_cmds(&ctx);
668 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x11);
669 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd1, 0x54);
670 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x43);
671 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x02);
672 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x18);
673 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x00);
674 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x00);
675 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x00);
676 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x00);
677 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x06);
678 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x80);
679 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x78);
680 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x00);
681 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5b, 0x18);
682 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5c, 0x00);
683 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5d, 0x01);
684 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5e, 0x20);
685 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x5f, 0x10);
686 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x60, 0x00);
687 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x1c);
688 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x00);
689 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x63, 0x01);
690 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x44);
691 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x65, 0x1b);
692 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0x00);
693 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x01);
694 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x44);
695 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x98, 0x01);
696 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x03);
697 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9b, 0xbe);
698 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xab, 0x14);
699 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x08);
700 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x28);
701 
702 	nt36523_switch_page(&ctx, 0x2a);
703 	nt36523_enable_reload_cmds(&ctx);
704 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x2f);
705 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x08);
706 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x24, 0x00);
707 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x62);
708 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0xf8);
709 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x27, 0x00);
710 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0x1a);
711 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x00);
712 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x1a);
713 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x00);
714 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x1a);
715 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x64, 0x96);
716 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x65, 0x10);
717 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0x00);
718 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x67, 0x96);
719 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x10);
720 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x00);
721 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x96);
722 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x10);
723 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x6c, 0x00);
724 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x70, 0x92);
725 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x10);
726 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x00);
727 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x96);
728 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x10);
729 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x96);
730 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x10);
731 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa2, 0x3f);
732 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa3, 0x30);
733 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa4, 0xc0);
734 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x03);
735 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe8, 0x00);
736 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x97, 0x3c);
737 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x98, 0x02);
738 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x99, 0x95);
739 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9a, 0x06);
740 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9b, 0x00);
741 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9c, 0x0b);
742 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9d, 0x0a);
743 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x9e, 0x90);
744 
745 	nt36523_switch_page(&ctx, 0x25);
746 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x02);
747 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x14, 0xd7);
748 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x02);
749 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0xd7);
750 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0xcf);
751 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0f);
752 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x5b);
753 
754 	nt36523_switch_page(&ctx, 0x20);
755 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x24, 0x00, 0x38,
756 				     0x00, 0x4c, 0x00, 0x5e, 0x00, 0x6f, 0x00, 0x7e);
757 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0x8c, 0x00, 0xbe, 0x00, 0xe5, 0x01, 0x27,
758 				     0x01, 0x58, 0x01, 0xa8, 0x01, 0xe8, 0x01, 0xea);
759 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x28, 0x02, 0x71, 0x02, 0x9e, 0x02, 0xda,
760 				     0x03, 0x00, 0x03, 0x31, 0x03, 0x40, 0x03, 0x51);
761 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x62, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9c,
762 				     0x03, 0xaa, 0x03, 0xb2);
763 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x27, 0x00, 0x3d,
764 				     0x00, 0x52, 0x00, 0x64, 0x00, 0x75, 0x00, 0x84);
765 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0x93, 0x00, 0xc5, 0x00, 0xec, 0x01, 0x2c,
766 				     0x01, 0x5d, 0x01, 0xac, 0x01, 0xec, 0x01, 0xee);
767 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x2b, 0x02, 0x73, 0x02, 0xa0, 0x02, 0xdb,
768 				     0x03, 0x01, 0x03, 0x31, 0x03, 0x41, 0x03, 0x51);
769 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x63, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9c,
770 				     0x03, 0xaa, 0x03, 0xb2);
771 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x2a, 0x00, 0x40,
772 				     0x00, 0x56, 0x00, 0x68, 0x00, 0x7a, 0x00, 0x89);
773 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0x98, 0x00, 0xc9, 0x00, 0xf1, 0x01, 0x30,
774 				     0x01, 0x61, 0x01, 0xb0, 0x01, 0xef, 0x01, 0xf1);
775 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x2e, 0x02, 0x76, 0x02, 0xa3, 0x02, 0xdd,
776 				     0x03, 0x02, 0x03, 0x32, 0x03, 0x42, 0x03, 0x53);
777 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x66, 0x03, 0x75, 0x03, 0x89, 0x03, 0x9c,
778 				     0x03, 0xaa, 0x03, 0xb2);
779 
780 	nt36523_switch_page(&ctx, 0x21);
781 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x24, 0x00, 0x38,
782 				     0x00, 0x4c, 0x00, 0x5e, 0x00, 0x6f, 0x00, 0x7e);
783 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0x8c, 0x00, 0xbe, 0x00, 0xe5, 0x01, 0x27,
784 				     0x01, 0x58, 0x01, 0xa8, 0x01, 0xe8, 0x01, 0xea);
785 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x28, 0x02, 0x71, 0x02, 0x9e, 0x02, 0xda,
786 				     0x03, 0x00, 0x03, 0x31, 0x03, 0x40, 0x03, 0x51);
787 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x62, 0x03, 0x77, 0x03, 0x90, 0x03, 0xac,
788 				     0x03, 0xca, 0x03, 0xda);
789 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x0d, 0x00, 0x27, 0x00, 0x3d,
790 				     0x00, 0x52, 0x00, 0x64, 0x00, 0x75, 0x00, 0x84);
791 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0x93, 0x00, 0xc5, 0x00, 0xec, 0x01, 0x2c,
792 				     0x01, 0x5d, 0x01, 0xac, 0x01, 0xec, 0x01, 0xee);
793 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x2b, 0x02, 0x73, 0x02, 0xa0, 0x02, 0xdb,
794 				     0x03, 0x01, 0x03, 0x31, 0x03, 0x41, 0x03, 0x51);
795 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x63, 0x03, 0x77, 0x03, 0x90, 0x03, 0xac,
796 				     0x03, 0xca, 0x03, 0xda);
797 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x0e, 0x00, 0x2a, 0x00, 0x40,
798 				     0x00, 0x56, 0x00, 0x68, 0x00, 0x7a, 0x00, 0x89);
799 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0x98, 0x00, 0xc9, 0x00, 0xf1, 0x01, 0x30,
800 				     0x01, 0x61, 0x01, 0xb0, 0x01, 0xef, 0x01, 0xf1);
801 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x2e, 0x02, 0x76, 0x02, 0xa3, 0x02, 0xdd,
802 				     0x03, 0x02, 0x03, 0x32, 0x03, 0x42, 0x03, 0x53);
803 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x66, 0x03, 0x77, 0x03, 0x90, 0x03, 0xac,
804 				     0x03, 0xca, 0x03, 0xda);
805 
806 	nt36523_switch_page(&ctx, 0xf0);
807 	nt36523_enable_reload_cmds(&ctx);
808 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x08);
809 
810 	nt36523_switch_page(&ctx, 0x10);
811 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x01);
812 
813 	nt36523_switch_page(&ctx, 0x20);
814 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x40);
815 
816 	nt36523_switch_page(&ctx, 0x10);
817 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x02);
818 
819 	nt36523_switch_page(&ctx, 0x10);
820 	nt36523_enable_reload_cmds(&ctx);
821 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01);
822 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x00);
823 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x03, 0xae, 0x1a, 0x04, 0x04);
824 
825 	mipi_dsi_msleep(&ctx, 100);
826 
827 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11);
828 
829 	mipi_dsi_msleep(&ctx, 200);
830 
831 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29);
832 
833 	mipi_dsi_msleep(&ctx, 100);
834 
835 	return 0;
836 };
837 
838 static int boe_init(struct boe_panel *boe)
839 {
840 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
841 
842 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x05);
843 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0xe5);
844 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x52);
845 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00);
846 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x88);
847 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x04);
848 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00);
849 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00);
850 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x03);
851 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x8b);
852 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x1a);
853 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x0f);
854 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x0c);
855 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x02);
856 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x0c);
857 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x02);
858 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01);
859 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x26);
860 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x26);
861 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x00);
862 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x00);
863 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x26);
864 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x26);
865 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x00);
866 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
867 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x03);
868 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x03);
869 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x04);
870 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x04);
871 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x09);
872 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x09);
873 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd8, 0x0a);
874 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x0a);
875 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x0b);
876 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x0b);
877 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x0c);
878 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x0c);
879 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x05);
880 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x05);
881 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd4, 0x06);
882 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd5, 0x06);
883 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x07);
884 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x07);
885 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x08);
886 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x08);
887 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x02);
888 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x00);
889 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x0d);
890 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x17);
891 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x26);
892 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x31);
893 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x1c);
894 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0x2c);
895 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0x33);
896 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x31);
897 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x37);
898 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x37);
899 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x37);
900 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x39);
901 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x2e);
902 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0x2f);
903 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x2f);
904 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x07);
905 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x00);
906 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x0d);
907 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd4, 0x17);
908 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd5, 0x26);
909 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x31);
910 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x3f);
911 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd8, 0x3f);
912 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x3f);
913 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xda, 0x3f);
914 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x37);
915 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x37);
916 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x37);
917 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x39);
918 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x2e);
919 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x2f);
920 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x2f);
921 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x07);
922 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x03);
923 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x0b);
924 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x07);
925 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x00);
926 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x00);
927 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x2a);
928 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x2a);
929 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x43);
930 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x07);
931 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0xc0);
932 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x0d);
933 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x00);
934 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x06);
935 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0xa5);
936 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0xa5);
937 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0x0f);
938 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd5, 0x32);
939 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00);
940 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x00);
941 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x00);
942 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x07);
943 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00);
944 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02);
945 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x0f);
946 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x25);
947 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x39);
948 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x4e);
949 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x72);
950 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x97);
951 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xdc);
952 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x22);
953 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0xa4);
954 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x2b);
955 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x2f);
956 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xa9);
957 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x25);
958 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x61);
959 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x97);
960 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xb2);
961 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xcd);
962 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xd9);
963 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xe7);
964 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xf4);
965 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xfa);
966 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xfc);
967 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
968 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x00);
969 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x16);
970 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0xaf);
971 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0xff);
972 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0xff);
973 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x08);
974 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x04);
975 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x05);
976 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x11);
977 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x24);
978 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x39);
979 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x4f);
980 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x72);
981 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x98);
982 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xdc);
983 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x23);
984 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0xa6);
985 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x2c);
986 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x30);
987 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xaa);
988 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x26);
989 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x62);
990 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x9b);
991 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xb5);
992 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xcf);
993 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xdb);
994 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xe8);
995 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xf5);
996 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xfa);
997 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xfc);
998 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
999 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x00);
1000 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x16);
1001 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0xaf);
1002 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0xff);
1003 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0xff);
1004 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x09);
1005 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x04);
1006 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02);
1007 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x16);
1008 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x24);
1009 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x3b);
1010 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x4f);
1011 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x73);
1012 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x99);
1013 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xe0);
1014 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x26);
1015 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0xad);
1016 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x36);
1017 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x3a);
1018 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xae);
1019 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x2a);
1020 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x66);
1021 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x9e);
1022 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xb8);
1023 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xd1);
1024 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xdd);
1025 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xe9);
1026 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xf6);
1027 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xfa);
1028 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xfc);
1029 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
1030 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x00);
1031 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x16);
1032 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0xaf);
1033 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0xff);
1034 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0xff);
1035 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x0a);
1036 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00);
1037 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02);
1038 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x0f);
1039 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x25);
1040 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x39);
1041 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x4e);
1042 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x72);
1043 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x97);
1044 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xdc);
1045 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x22);
1046 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0xa4);
1047 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x2b);
1048 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x2f);
1049 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xa9);
1050 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x25);
1051 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x61);
1052 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x97);
1053 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xb2);
1054 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xcd);
1055 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xd9);
1056 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xe7);
1057 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xf4);
1058 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xfa);
1059 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xfc);
1060 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
1061 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x00);
1062 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x16);
1063 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0xaf);
1064 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0xff);
1065 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0xff);
1066 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x0b);
1067 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x04);
1068 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x05);
1069 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x11);
1070 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x24);
1071 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x39);
1072 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x4f);
1073 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x72);
1074 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x98);
1075 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xdc);
1076 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x23);
1077 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0xa6);
1078 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x2c);
1079 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x30);
1080 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xaa);
1081 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x26);
1082 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x62);
1083 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x9b);
1084 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xb5);
1085 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xcf);
1086 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xdb);
1087 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xe8);
1088 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xf5);
1089 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xfa);
1090 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xfc);
1091 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
1092 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x00);
1093 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x16);
1094 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0xaf);
1095 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0xff);
1096 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0xff);
1097 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x0c);
1098 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x04);
1099 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02);
1100 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x16);
1101 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x24);
1102 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x3b);
1103 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x4f);
1104 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x73);
1105 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x99);
1106 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xe0);
1107 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x26);
1108 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0xad);
1109 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbc, 0x36);
1110 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x3a);
1111 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0xae);
1112 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x2a);
1113 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x66);
1114 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x9e);
1115 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0xb8);
1116 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0xd1);
1117 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0xdd);
1118 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0xe9);
1119 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xf6);
1120 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0xfa);
1121 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0xfc);
1122 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00);
1123 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x00);
1124 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x16);
1125 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0xaf);
1126 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0xff);
1127 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0xff);
1128 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00);
1129 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x08);
1130 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x04);
1131 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x68);
1132 
1133 	mipi_dsi_msleep(&ctx, 150);
1134 
1135 	return 0;
1136 };
1137 
1138 static int auo_kd101n80_45na_init(struct boe_panel *boe)
1139 {
1140 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
1141 
1142 	msleep(24);
1143 
1144 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x11);
1145 
1146 	mipi_dsi_msleep(&ctx, 120);
1147 
1148 	mipi_dsi_dcs_write_seq_multi(&ctx, 0x29);
1149 
1150 	mipi_dsi_msleep(&ctx, 120);
1151 
1152 	return 0;
1153 };
1154 
1155 static int auo_b101uan08_3_init(struct boe_panel *boe)
1156 {
1157 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
1158 
1159 	msleep(24);
1160 
1161 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01);
1162 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x48);
1163 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x48);
1164 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x47);
1165 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x47);
1166 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x46);
1167 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x46);
1168 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0x45);
1169 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0x45);
1170 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x64);
1171 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x64);
1172 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x4f);
1173 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x4f);
1174 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x40);
1175 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x40);
1176 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0x66);
1177 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x66);
1178 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x4f);
1179 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd1, 0x4f);
1180 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x41);
1181 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x41);
1182 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd4, 0x48);
1183 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd5, 0x48);
1184 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x47);
1185 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x47);
1186 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd8, 0x46);
1187 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x46);
1188 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xda, 0x45);
1189 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x45);
1190 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x64);
1191 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x64);
1192 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x4f);
1193 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x4f);
1194 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x40);
1195 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x40);
1196 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x66);
1197 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe3, 0x66);
1198 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0x4f);
1199 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x4f);
1200 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x41);
1201 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x41);
1202 
1203 	mipi_dsi_msleep(&ctx, 150);
1204 
1205 	return 0;
1206 };
1207 
1208 static int starry_qfh032011_53g_init(struct boe_panel *boe)
1209 {
1210 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
1211 
1212 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01);
1213 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x4f);
1214 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x40);
1215 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x40);
1216 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0x40);
1217 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0x40);
1218 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x4d);
1219 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x52);
1220 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x51);
1221 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x5d);
1222 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0x5b);
1223 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x4b);
1224 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x49);
1225 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd1, 0x47);
1226 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x45);
1227 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x41);
1228 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x50);
1229 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd8, 0x40);
1230 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x40);
1231 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xda, 0x40);
1232 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x40);
1233 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x4e);
1234 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x52);
1235 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x51);
1236 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x5e);
1237 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x5c);
1238 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe3, 0x4c);
1239 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0x4a);
1240 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x48);
1241 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x46);
1242 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x42);
1243 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x03);
1244 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xbe, 0x03);
1245 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x44);
1246 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x07);
1247 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x05);
1248 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x42);
1249 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x3e);
1250 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x60);
1251 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x04);
1252 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x04);
1253 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd4, 0x01);
1254 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd5, 0x00);
1255 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x03);
1256 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x04);
1257 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x01);
1258 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x01);
1259 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe4, 0xf0);
1260 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x0a);
1261 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00);
1262 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x08);
1263 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x08);
1264 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x10);
1265 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x02);
1266 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x00);
1267 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x0a);
1268 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x20);
1269 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc3, 0x24);
1270 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc4, 0x23);
1271 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc5, 0x29);
1272 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0x23);
1273 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc7, 0x1c);
1274 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc8, 0x19);
1275 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x17);
1276 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xca, 0x17);
1277 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x18);
1278 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x1a);
1279 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x1e);
1280 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xce, 0x20);
1281 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x23);
1282 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd0, 0x07);
1283 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd1, 0x00);
1284 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x00);
1285 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd3, 0x0a);
1286 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd4, 0x13);
1287 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd5, 0x1c);
1288 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x1a);
1289 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x13);
1290 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd8, 0x17);
1291 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x1c);
1292 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xda, 0x19);
1293 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdb, 0x17);
1294 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdc, 0x17);
1295 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdd, 0x18);
1296 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xde, 0x1a);
1297 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xdf, 0x1e);
1298 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe0, 0x20);
1299 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x23);
1300 	mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x07);
1301 	mipi_dsi_dcs_write_seq_multi(&ctx, 0X11);
1302 
1303 	mipi_dsi_msleep(&ctx, 120);
1304 
1305 	mipi_dsi_dcs_write_seq_multi(&ctx, 0X29);
1306 
1307 	mipi_dsi_msleep(&ctx, 80);
1308 
1309 	return 0;
1310 };
1311 
1312 static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
1313 {
1314 	return container_of(panel, struct boe_panel, base);
1315 }
1316 
1317 static int boe_panel_disable(struct drm_panel *panel)
1318 {
1319 	struct boe_panel *boe = to_boe_panel(panel);
1320 	struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi };
1321 
1322 	boe->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
1323 
1324 	mipi_dsi_dcs_set_display_off_multi(&ctx);
1325 	mipi_dsi_dcs_enter_sleep_mode_multi(&ctx);
1326 
1327 	mipi_dsi_msleep(&ctx, 150);
1328 
1329 	return ctx.accum_err;
1330 }
1331 
1332 static int boe_panel_unprepare(struct drm_panel *panel)
1333 {
1334 	struct boe_panel *boe = to_boe_panel(panel);
1335 
1336 	if (boe->desc->discharge_on_disable) {
1337 		regulator_disable(boe->avee);
1338 		regulator_disable(boe->avdd);
1339 		usleep_range(5000, 7000);
1340 		gpiod_set_value(boe->enable_gpio, 0);
1341 		usleep_range(5000, 7000);
1342 		regulator_disable(boe->pp1800);
1343 		regulator_disable(boe->pp3300);
1344 	} else {
1345 		gpiod_set_value(boe->enable_gpio, 0);
1346 		usleep_range(1000, 2000);
1347 		regulator_disable(boe->avee);
1348 		regulator_disable(boe->avdd);
1349 		usleep_range(5000, 7000);
1350 		regulator_disable(boe->pp1800);
1351 		regulator_disable(boe->pp3300);
1352 	}
1353 
1354 	return 0;
1355 }
1356 
1357 static int boe_panel_prepare(struct drm_panel *panel)
1358 {
1359 	struct boe_panel *boe = to_boe_panel(panel);
1360 	int ret;
1361 
1362 	gpiod_set_value(boe->enable_gpio, 0);
1363 	usleep_range(1000, 1500);
1364 
1365 	ret = regulator_enable(boe->pp3300);
1366 	if (ret < 0)
1367 		return ret;
1368 
1369 	ret = regulator_enable(boe->pp1800);
1370 	if (ret < 0)
1371 		return ret;
1372 
1373 	usleep_range(3000, 5000);
1374 
1375 	ret = regulator_enable(boe->avdd);
1376 	if (ret < 0)
1377 		goto poweroff1v8;
1378 	ret = regulator_enable(boe->avee);
1379 	if (ret < 0)
1380 		goto poweroffavdd;
1381 
1382 	usleep_range(10000, 11000);
1383 
1384 	if (boe->desc->lp11_before_reset) {
1385 		ret = mipi_dsi_dcs_nop(boe->dsi);
1386 		if (ret < 0) {
1387 			dev_err(&boe->dsi->dev, "Failed to send NOP: %d\n", ret);
1388 			goto poweroff;
1389 		}
1390 		usleep_range(1000, 2000);
1391 	}
1392 	gpiod_set_value(boe->enable_gpio, 1);
1393 	usleep_range(1000, 2000);
1394 	gpiod_set_value(boe->enable_gpio, 0);
1395 	usleep_range(1000, 2000);
1396 	gpiod_set_value(boe->enable_gpio, 1);
1397 	usleep_range(6000, 10000);
1398 
1399 	ret = boe->desc->init(boe);
1400 	if (ret < 0)
1401 		goto poweroff;
1402 
1403 	return 0;
1404 
1405 poweroff:
1406 	gpiod_set_value(boe->enable_gpio, 0);
1407 	regulator_disable(boe->avee);
1408 poweroffavdd:
1409 	regulator_disable(boe->avdd);
1410 poweroff1v8:
1411 	usleep_range(5000, 7000);
1412 	regulator_disable(boe->pp1800);
1413 
1414 	return ret;
1415 }
1416 
1417 static int boe_panel_enable(struct drm_panel *panel)
1418 {
1419 	msleep(130);
1420 	return 0;
1421 }
1422 
1423 static const struct drm_display_mode boe_tv110c9m_default_mode = {
1424 	.clock = 166594,
1425 	.hdisplay = 1200,
1426 	.hsync_start = 1200 + 40,
1427 	.hsync_end = 1200 + 40 + 8,
1428 	.htotal = 1200 + 40 + 8 + 28,
1429 	.vdisplay = 2000,
1430 	.vsync_start = 2000 + 26,
1431 	.vsync_end = 2000 + 26 + 2,
1432 	.vtotal = 2000 + 26 + 2 + 148,
1433 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1434 };
1435 
1436 static const struct panel_desc boe_tv110c9m_desc = {
1437 	.modes = &boe_tv110c9m_default_mode,
1438 	.bpc = 8,
1439 	.size = {
1440 		.width_mm = 143,
1441 		.height_mm = 238,
1442 	},
1443 	.lanes = 4,
1444 	.format = MIPI_DSI_FMT_RGB888,
1445 	.mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1446 			| MIPI_DSI_MODE_VIDEO_HSE
1447 			| MIPI_DSI_CLOCK_NON_CONTINUOUS
1448 			| MIPI_DSI_MODE_VIDEO_BURST,
1449 	.init = boe_tv110c9m_init,
1450 };
1451 
1452 static const struct drm_display_mode inx_hj110iz_default_mode = {
1453 	.clock = 168432,
1454 	.hdisplay = 1200,
1455 	.hsync_start = 1200 + 40,
1456 	.hsync_end = 1200 + 40 + 8,
1457 	.htotal = 1200 + 40 + 8 + 28,
1458 	.vdisplay = 2000,
1459 	.vsync_start = 2000 + 26,
1460 	.vsync_end = 2000 + 26 + 2,
1461 	.vtotal = 2000 + 26 + 2 + 172,
1462 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1463 };
1464 
1465 static const struct panel_desc inx_hj110iz_desc = {
1466 	.modes = &inx_hj110iz_default_mode,
1467 	.bpc = 8,
1468 	.size = {
1469 		.width_mm = 143,
1470 		.height_mm = 238,
1471 	},
1472 	.lanes = 4,
1473 	.format = MIPI_DSI_FMT_RGB888,
1474 	.mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1475 			| MIPI_DSI_MODE_VIDEO_HSE
1476 			| MIPI_DSI_CLOCK_NON_CONTINUOUS
1477 			| MIPI_DSI_MODE_VIDEO_BURST,
1478 	.init = inx_hj110iz_init,
1479 };
1480 
1481 static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
1482 	.clock = 159425,
1483 	.hdisplay = 1200,
1484 	.hsync_start = 1200 + 100,
1485 	.hsync_end = 1200 + 100 + 40,
1486 	.htotal = 1200 + 100 + 40 + 24,
1487 	.vdisplay = 1920,
1488 	.vsync_start = 1920 + 10,
1489 	.vsync_end = 1920 + 10 + 14,
1490 	.vtotal = 1920 + 10 + 14 + 4,
1491 };
1492 
1493 static const struct panel_desc boe_tv101wum_nl6_desc = {
1494 	.modes = &boe_tv101wum_nl6_default_mode,
1495 	.bpc = 8,
1496 	.size = {
1497 		.width_mm = 135,
1498 		.height_mm = 216,
1499 	},
1500 	.lanes = 4,
1501 	.format = MIPI_DSI_FMT_RGB888,
1502 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1503 		      MIPI_DSI_MODE_LPM,
1504 	.init = boe_init,
1505 	.discharge_on_disable = false,
1506 };
1507 
1508 static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
1509 	.clock = 157000,
1510 	.hdisplay = 1200,
1511 	.hsync_start = 1200 + 60,
1512 	.hsync_end = 1200 + 60 + 24,
1513 	.htotal = 1200 + 60 + 24 + 56,
1514 	.vdisplay = 1920,
1515 	.vsync_start = 1920 + 16,
1516 	.vsync_end = 1920 + 16 + 4,
1517 	.vtotal = 1920 + 16 + 4 + 16,
1518 };
1519 
1520 static const struct panel_desc auo_kd101n80_45na_desc = {
1521 	.modes = &auo_kd101n80_45na_default_mode,
1522 	.bpc = 8,
1523 	.size = {
1524 		.width_mm = 135,
1525 		.height_mm = 216,
1526 	},
1527 	.lanes = 4,
1528 	.format = MIPI_DSI_FMT_RGB888,
1529 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1530 		      MIPI_DSI_MODE_LPM,
1531 	.init = auo_kd101n80_45na_init,
1532 	.discharge_on_disable = true,
1533 };
1534 
1535 static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
1536 	.clock = 159916,
1537 	.hdisplay = 1200,
1538 	.hsync_start = 1200 + 80,
1539 	.hsync_end = 1200 + 80 + 24,
1540 	.htotal = 1200 + 80 + 24 + 60,
1541 	.vdisplay = 1920,
1542 	.vsync_start = 1920 + 20,
1543 	.vsync_end = 1920 + 20 + 4,
1544 	.vtotal = 1920 + 20 + 4 + 10,
1545 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1546 };
1547 
1548 static const struct panel_desc boe_tv101wum_n53_desc = {
1549 	.modes = &boe_tv101wum_n53_default_mode,
1550 	.bpc = 8,
1551 	.size = {
1552 		.width_mm = 135,
1553 		.height_mm = 216,
1554 	},
1555 	.lanes = 4,
1556 	.format = MIPI_DSI_FMT_RGB888,
1557 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1558 		      MIPI_DSI_MODE_LPM,
1559 	.init = boe_init,
1560 };
1561 
1562 static const struct drm_display_mode auo_b101uan08_3_default_mode = {
1563 	.clock = 159667,
1564 	.hdisplay = 1200,
1565 	.hsync_start = 1200 + 60,
1566 	.hsync_end = 1200 + 60 + 4,
1567 	.htotal = 1200 + 60 + 4 + 80,
1568 	.vdisplay = 1920,
1569 	.vsync_start = 1920 + 34,
1570 	.vsync_end = 1920 + 34 + 2,
1571 	.vtotal = 1920 + 34 + 2 + 24,
1572 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1573 };
1574 
1575 static const struct panel_desc auo_b101uan08_3_desc = {
1576 	.modes = &auo_b101uan08_3_default_mode,
1577 	.bpc = 8,
1578 	.size = {
1579 		.width_mm = 135,
1580 		.height_mm = 216,
1581 	},
1582 	.lanes = 4,
1583 	.format = MIPI_DSI_FMT_RGB888,
1584 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1585 		      MIPI_DSI_MODE_LPM,
1586 	.init = auo_b101uan08_3_init,
1587 	.lp11_before_reset = true,
1588 };
1589 
1590 static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
1591 	.clock = 159916,
1592 	.hdisplay = 1200,
1593 	.hsync_start = 1200 + 80,
1594 	.hsync_end = 1200 + 80 + 24,
1595 	.htotal = 1200 + 80 + 24 + 60,
1596 	.vdisplay = 1920,
1597 	.vsync_start = 1920 + 20,
1598 	.vsync_end = 1920 + 20 + 4,
1599 	.vtotal = 1920 + 20 + 4 + 10,
1600 	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1601 };
1602 
1603 static const struct panel_desc boe_tv105wum_nw0_desc = {
1604 	.modes = &boe_tv105wum_nw0_default_mode,
1605 	.bpc = 8,
1606 	.size = {
1607 		.width_mm = 141,
1608 		.height_mm = 226,
1609 	},
1610 	.lanes = 4,
1611 	.format = MIPI_DSI_FMT_RGB888,
1612 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1613 		      MIPI_DSI_MODE_LPM,
1614 	.init = boe_init,
1615 	.lp11_before_reset = true,
1616 };
1617 
1618 static const struct drm_display_mode starry_qfh032011_53g_default_mode = {
1619 	.clock = 165731,
1620 	.hdisplay = 1200,
1621 	.hsync_start = 1200 + 100,
1622 	.hsync_end = 1200 + 100 + 10,
1623 	.htotal = 1200 + 100 + 10 + 100,
1624 	.vdisplay = 1920,
1625 	.vsync_start = 1920 + 14,
1626 	.vsync_end = 1920 + 14 + 10,
1627 	.vtotal = 1920 + 14 + 10 + 15,
1628 };
1629 
1630 static const struct panel_desc starry_qfh032011_53g_desc = {
1631 	.modes = &starry_qfh032011_53g_default_mode,
1632 	.bpc = 8,
1633 	.size = {
1634 		.width_mm = 135,
1635 		.height_mm = 216,
1636 	},
1637 	.lanes = 4,
1638 	.format = MIPI_DSI_FMT_RGB888,
1639 	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1640 		      MIPI_DSI_MODE_LPM,
1641 	.init = starry_qfh032011_53g_init,
1642 	.lp11_before_reset = true,
1643 };
1644 
1645 static int boe_panel_get_modes(struct drm_panel *panel,
1646 			       struct drm_connector *connector)
1647 {
1648 	struct boe_panel *boe = to_boe_panel(panel);
1649 	const struct drm_display_mode *m = boe->desc->modes;
1650 	struct drm_display_mode *mode;
1651 
1652 	mode = drm_mode_duplicate(connector->dev, m);
1653 	if (!mode) {
1654 		dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
1655 			m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
1656 		return -ENOMEM;
1657 	}
1658 
1659 	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1660 	drm_mode_set_name(mode);
1661 	drm_mode_probed_add(connector, mode);
1662 
1663 	connector->display_info.width_mm = boe->desc->size.width_mm;
1664 	connector->display_info.height_mm = boe->desc->size.height_mm;
1665 	connector->display_info.bpc = boe->desc->bpc;
1666 	/*
1667 	 * TODO: Remove once all drm drivers call
1668 	 * drm_connector_set_orientation_from_panel()
1669 	 */
1670 	drm_connector_set_panel_orientation(connector, boe->orientation);
1671 
1672 	return 1;
1673 }
1674 
1675 static enum drm_panel_orientation boe_panel_get_orientation(struct drm_panel *panel)
1676 {
1677 	struct boe_panel *boe = to_boe_panel(panel);
1678 
1679 	return boe->orientation;
1680 }
1681 
1682 static const struct drm_panel_funcs boe_panel_funcs = {
1683 	.disable = boe_panel_disable,
1684 	.unprepare = boe_panel_unprepare,
1685 	.prepare = boe_panel_prepare,
1686 	.enable = boe_panel_enable,
1687 	.get_modes = boe_panel_get_modes,
1688 	.get_orientation = boe_panel_get_orientation,
1689 };
1690 
1691 static int boe_panel_add(struct boe_panel *boe)
1692 {
1693 	struct device *dev = &boe->dsi->dev;
1694 	int err;
1695 
1696 	boe->avdd = devm_regulator_get(dev, "avdd");
1697 	if (IS_ERR(boe->avdd))
1698 		return PTR_ERR(boe->avdd);
1699 
1700 	boe->avee = devm_regulator_get(dev, "avee");
1701 	if (IS_ERR(boe->avee))
1702 		return PTR_ERR(boe->avee);
1703 
1704 	boe->pp3300 = devm_regulator_get(dev, "pp3300");
1705 	if (IS_ERR(boe->pp3300))
1706 		return PTR_ERR(boe->pp3300);
1707 
1708 	boe->pp1800 = devm_regulator_get(dev, "pp1800");
1709 	if (IS_ERR(boe->pp1800))
1710 		return PTR_ERR(boe->pp1800);
1711 
1712 	boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
1713 	if (IS_ERR(boe->enable_gpio)) {
1714 		dev_err(dev, "cannot get reset-gpios %ld\n",
1715 			PTR_ERR(boe->enable_gpio));
1716 		return PTR_ERR(boe->enable_gpio);
1717 	}
1718 
1719 	gpiod_set_value(boe->enable_gpio, 0);
1720 
1721 	boe->base.prepare_prev_first = true;
1722 
1723 	drm_panel_init(&boe->base, dev, &boe_panel_funcs,
1724 		       DRM_MODE_CONNECTOR_DSI);
1725 	err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation);
1726 	if (err < 0) {
1727 		dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
1728 		return err;
1729 	}
1730 
1731 	err = drm_panel_of_backlight(&boe->base);
1732 	if (err)
1733 		return err;
1734 
1735 	boe->base.funcs = &boe_panel_funcs;
1736 	boe->base.dev = &boe->dsi->dev;
1737 
1738 	drm_panel_add(&boe->base);
1739 
1740 	return 0;
1741 }
1742 
1743 static int boe_panel_probe(struct mipi_dsi_device *dsi)
1744 {
1745 	struct boe_panel *boe;
1746 	int ret;
1747 	const struct panel_desc *desc;
1748 
1749 	boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL);
1750 	if (!boe)
1751 		return -ENOMEM;
1752 
1753 	desc = of_device_get_match_data(&dsi->dev);
1754 	dsi->lanes = desc->lanes;
1755 	dsi->format = desc->format;
1756 	dsi->mode_flags = desc->mode_flags;
1757 	boe->desc = desc;
1758 	boe->dsi = dsi;
1759 	ret = boe_panel_add(boe);
1760 	if (ret < 0)
1761 		return ret;
1762 
1763 	mipi_dsi_set_drvdata(dsi, boe);
1764 
1765 	ret = mipi_dsi_attach(dsi);
1766 	if (ret)
1767 		drm_panel_remove(&boe->base);
1768 
1769 	return ret;
1770 }
1771 
1772 static void boe_panel_remove(struct mipi_dsi_device *dsi)
1773 {
1774 	struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1775 	int ret;
1776 
1777 	ret = mipi_dsi_detach(dsi);
1778 	if (ret < 0)
1779 		dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
1780 
1781 	if (boe->base.dev)
1782 		drm_panel_remove(&boe->base);
1783 }
1784 
1785 static const struct of_device_id boe_of_match[] = {
1786 	{ .compatible = "boe,tv101wum-nl6",
1787 	  .data = &boe_tv101wum_nl6_desc
1788 	},
1789 	{ .compatible = "auo,kd101n80-45na",
1790 	  .data = &auo_kd101n80_45na_desc
1791 	},
1792 	{ .compatible = "boe,tv101wum-n53",
1793 	  .data = &boe_tv101wum_n53_desc
1794 	},
1795 	{ .compatible = "auo,b101uan08.3",
1796 	  .data = &auo_b101uan08_3_desc
1797 	},
1798 	{ .compatible = "boe,tv105wum-nw0",
1799 	  .data = &boe_tv105wum_nw0_desc
1800 	},
1801 	{ .compatible = "boe,tv110c9m-ll3",
1802 	  .data = &boe_tv110c9m_desc
1803 	},
1804 	{ .compatible = "innolux,hj110iz-01a",
1805 	  .data = &inx_hj110iz_desc
1806 	},
1807 	{ .compatible = "starry,2081101qfh032011-53g",
1808 	  .data = &starry_qfh032011_53g_desc
1809 	},
1810 	{ /* sentinel */ }
1811 };
1812 MODULE_DEVICE_TABLE(of, boe_of_match);
1813 
1814 static struct mipi_dsi_driver boe_panel_driver = {
1815 	.driver = {
1816 		.name = "panel-boe-tv101wum-nl6",
1817 		.of_match_table = boe_of_match,
1818 	},
1819 	.probe = boe_panel_probe,
1820 	.remove = boe_panel_remove,
1821 };
1822 module_mipi_dsi_driver(boe_panel_driver);
1823 
1824 MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
1825 MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver");
1826 MODULE_LICENSE("GPL v2");
1827