xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c (revision 4de93a086eb0315f0bd8e1d6da40186842670b57)
1 /*
2  * Copyright 2014 Martin Peres
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Martin Peres
23  */
24 #include "priv.h"
25 
26 static int
27 gm107_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
28 {
29 	/* nothing to do, it seems hardwired */
30 	return 0;
31 }
32 
33 static int
34 gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
35 {
36 	*divs = nv_rd32(therm, 0x10eb20) & 0x1fff;
37 	*duty = nv_rd32(therm, 0x10eb24) & 0x1fff;
38 	return 0;
39 }
40 
41 static int
42 gm107_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
43 {
44 	nv_mask(therm, 0x10eb10, 0x1fff, divs); /* keep the high bits */
45 	nv_wr32(therm, 0x10eb14, duty | 0x80000000);
46 	return 0;
47 }
48 
49 static int
50 gm107_fan_pwm_clock(struct nvkm_therm *therm, int line)
51 {
52 	return nv_device(therm)->crystal * 1000;
53 }
54 
55 static int
56 gm107_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
57 		 struct nvkm_oclass *oclass, void *data, u32 size,
58 		 struct nvkm_object **pobject)
59 {
60 	struct nvkm_therm_priv *therm;
61 	int ret;
62 
63 	ret = nvkm_therm_create(parent, engine, oclass, &therm);
64 	*pobject = nv_object(therm);
65 	if (ret)
66 		return ret;
67 
68 	therm->base.pwm_ctrl = gm107_fan_pwm_ctrl;
69 	therm->base.pwm_get = gm107_fan_pwm_get;
70 	therm->base.pwm_set = gm107_fan_pwm_set;
71 	therm->base.pwm_clock = gm107_fan_pwm_clock;
72 	therm->base.temp_get = g84_temp_get;
73 	therm->base.fan_sense = gt215_therm_fan_sense;
74 	therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
75 	return nvkm_therm_preinit(&therm->base);
76 }
77 
78 struct nvkm_oclass
79 gm107_therm_oclass = {
80 	.handle = NV_SUBDEV(THERM, 0x117),
81 	.ofuncs = &(struct nvkm_ofuncs) {
82 		.ctor = gm107_therm_ctor,
83 		.dtor = _nvkm_therm_dtor,
84 		.init = gf110_therm_init,
85 		.fini = g84_therm_fini,
86 	},
87 };
88