1 /* 2 * Copyright 2015 Nouveau Project 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 #include "agp.h" 23 #ifdef __NVKM_PCI_AGP_H__ 24 #include <core/option.h> 25 26 struct nvkm_device_agp_quirk { 27 u16 hostbridge_vendor; 28 u16 hostbridge_device; 29 u16 chip_vendor; 30 u16 chip_device; 31 int mode; 32 }; 33 34 static const struct nvkm_device_agp_quirk 35 nvkm_device_agp_quirks[] = { 36 /* VIA Apollo PRO133x / GeForce FX 5600 Ultra - fdo#20341 */ 37 { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_NVIDIA, 0x0311, 2 }, 38 /* SiS 761 does not support AGP cards, use PCI mode */ 39 { PCI_VENDOR_ID_SI, 0x0761, PCI_ANY_ID, PCI_ANY_ID, 0 }, 40 {}, 41 }; 42 43 void 44 nvkm_agp_fini(struct nvkm_pci *pci) 45 { 46 if (pci->agp.acquired) { 47 agp_backend_release(pci->agp.bridge); 48 pci->agp.acquired = false; 49 } 50 } 51 52 /* Ensure AGP controller is in a consistent state in case we need to 53 * execute the VBIOS DEVINIT scripts. 54 */ 55 void 56 nvkm_agp_preinit(struct nvkm_pci *pci) 57 { 58 struct nvkm_device *device = pci->subdev.device; 59 u32 mode = nvkm_pci_rd32(pci, 0x004c); 60 u32 save[2]; 61 62 /* First of all, disable fast writes, otherwise if it's already 63 * enabled in the AGP bridge and we disable the card's AGP 64 * controller we might be locking ourselves out of it. 65 */ 66 if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) { 67 mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW; 68 agp_enable(pci->agp.bridge, mode); 69 } 70 71 /* clear busmaster bit, and disable AGP */ 72 save[0] = nvkm_pci_rd32(pci, 0x0004); 73 nvkm_pci_wr32(pci, 0x0004, save[0] & ~0x00000004); 74 nvkm_pci_wr32(pci, 0x004c, 0x00000000); 75 76 /* reset PGRAPH, PFIFO and PTIMER */ 77 save[1] = nvkm_mask(device, 0x000200, 0x00011100, 0x00000000); 78 nvkm_mask(device, 0x000200, 0x00011100, save[1]); 79 80 /* and restore busmaster bit (gives effect of resetting AGP) */ 81 nvkm_pci_wr32(pci, 0x0004, save[0]); 82 } 83 84 int 85 nvkm_agp_init(struct nvkm_pci *pci) 86 { 87 if (!agp_backend_acquire(pci->pdev)) { 88 nvkm_error(&pci->subdev, "failed to acquire agp\n"); 89 return -ENODEV; 90 } 91 92 agp_enable(pci->agp.bridge, pci->agp.mode); 93 pci->agp.acquired = true; 94 return 0; 95 } 96 97 void 98 nvkm_agp_dtor(struct nvkm_pci *pci) 99 { 100 arch_phys_wc_del(pci->agp.mtrr); 101 } 102 103 void 104 nvkm_agp_ctor(struct nvkm_pci *pci) 105 { 106 const struct nvkm_device_agp_quirk *quirk = nvkm_device_agp_quirks; 107 struct nvkm_subdev *subdev = &pci->subdev; 108 struct nvkm_device *device = subdev->device; 109 struct agp_kern_info info; 110 int mode = -1; 111 112 #ifdef __powerpc__ 113 /* Disable AGP by default on all PowerPC machines for now -- At 114 * least some UniNorth-2 AGP bridges are known to be broken: 115 * DMA from the host to the card works just fine, but writeback 116 * from the card to the host goes straight to memory 117 * untranslated bypassing that GATT somehow, making them quite 118 * painful to deal with... 119 */ 120 mode = 0; 121 #endif 122 mode = nvkm_longopt(device->cfgopt, "NvAGP", mode); 123 124 /* acquire bridge temporarily, so that we can copy its info */ 125 if (!(pci->agp.bridge = agp_backend_acquire(pci->pdev))) { 126 nvkm_warn(subdev, "failed to acquire agp\n"); 127 return; 128 } 129 agp_copy_info(pci->agp.bridge, &info); 130 agp_backend_release(pci->agp.bridge); 131 132 pci->agp.mode = info.mode; 133 pci->agp.base = info.aper_base; 134 pci->agp.size = info.aper_size * 1024 * 1024; 135 pci->agp.cma = info.cant_use_aperture; 136 pci->agp.mtrr = -1; 137 138 /* determine if bridge + chipset combination needs a workaround */ 139 while (quirk->hostbridge_vendor) { 140 if (info.device->vendor == quirk->hostbridge_vendor && 141 info.device->device == quirk->hostbridge_device && 142 (quirk->chip_vendor == (u16)PCI_ANY_ID || 143 pci->pdev->vendor == quirk->chip_vendor) && 144 (quirk->chip_device == (u16)PCI_ANY_ID || 145 pci->pdev->device == quirk->chip_device)) { 146 nvkm_info(subdev, "forcing default agp mode to %dX, " 147 "use NvAGP=<mode> to override\n", 148 quirk->mode); 149 mode = quirk->mode; 150 break; 151 } 152 quirk++; 153 } 154 155 /* apply quirk / user-specified mode */ 156 if (mode >= 1) { 157 if (pci->agp.mode & 0x00000008) 158 mode /= 4; /* AGPv3 */ 159 pci->agp.mode &= ~0x00000007; 160 pci->agp.mode |= (mode & 0x7); 161 } else 162 if (mode == 0) { 163 pci->agp.bridge = NULL; 164 return; 165 } 166 167 /* fast writes appear to be broken on nv18, they make the card 168 * lock up randomly. 169 */ 170 if (device->chipset == 0x18) 171 pci->agp.mode &= ~PCI_AGP_COMMAND_FW; 172 173 pci->agp.mtrr = arch_phys_wc_add(pci->agp.base, pci->agp.size); 174 } 175 #endif 176