xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gv100.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1edf50395SBen Skeggs /*
2edf50395SBen Skeggs  * Copyright 2018 Red Hat Inc.
3edf50395SBen Skeggs  *
4edf50395SBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5edf50395SBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6edf50395SBen Skeggs  * to deal in the Software without restriction, including without limitation
7edf50395SBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8edf50395SBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9edf50395SBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10edf50395SBen Skeggs  *
11edf50395SBen Skeggs  * The above copyright notice and this permission notice shall be included in
12edf50395SBen Skeggs  * all copies or substantial portions of the Software.
13edf50395SBen Skeggs  *
14edf50395SBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15edf50395SBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16edf50395SBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17edf50395SBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18edf50395SBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19edf50395SBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20edf50395SBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21edf50395SBen Skeggs  */
22edf50395SBen Skeggs #include "mem.h"
23edf50395SBen Skeggs #include "vmm.h"
24edf50395SBen Skeggs 
25edf50395SBen Skeggs #include <core/option.h>
26edf50395SBen Skeggs 
27edf50395SBen Skeggs #include <nvif/class.h>
28edf50395SBen Skeggs 
29edf50395SBen Skeggs static const struct nvkm_mmu_func
30edf50395SBen Skeggs gv100_mmu = {
31edf50395SBen Skeggs 	.dma_bits = 47,
32edf50395SBen Skeggs 	.mmu = {{ -1, -1, NVIF_CLASS_MMU_GF100}},
33edf50395SBen Skeggs 	.mem = {{ -1,  0, NVIF_CLASS_MEM_GF100}, gf100_mem_new, gf100_mem_map },
34ab2ee9ffSBen Skeggs 	.vmm = {{ -1,  0, NVIF_CLASS_VMM_GP100}, gv100_vmm_new },
35edf50395SBen Skeggs 	.kind = gm200_mmu_kind,
36edf50395SBen Skeggs 	.kind_sys = true,
37edf50395SBen Skeggs };
38edf50395SBen Skeggs 
39edf50395SBen Skeggs int
gv100_mmu_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_mmu ** pmmu)40*6dd123baSBen Skeggs gv100_mmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
41*6dd123baSBen Skeggs 	      struct nvkm_mmu **pmmu)
42edf50395SBen Skeggs {
43*6dd123baSBen Skeggs 	return nvkm_mmu_new_(&gv100_mmu, device, type, inst, pmmu);
44edf50395SBen Skeggs }
45