xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.c (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 /*
2  * Copyright 2016 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "priv.h"
25 
26 const struct nvkm_mc_map
27 gk104_mc_reset[] = {
28 	{ 0x00000100, NVKM_ENGINE_FIFO },
29 	{ 0x00002000, NVKM_SUBDEV_PMU, 0, true },
30 	{}
31 };
32 
33 const struct nvkm_intr_data
34 gk104_mc_intrs[] = {
35 	{ NVKM_ENGINE_DISP    , 0, 0, 0x04000000, true },
36 	{ NVKM_ENGINE_FIFO    , 0, 0, 0x00000100 },
37 	{ NVKM_SUBDEV_PRIVRING, 0, 0, 0x40000000, true },
38 	{ NVKM_SUBDEV_BUS     , 0, 0, 0x10000000, true },
39 	{ NVKM_SUBDEV_FB      , 0, 0, 0x08002000, true },
40 	{ NVKM_SUBDEV_LTC     , 0, 0, 0x02000000, true },
41 	{ NVKM_SUBDEV_PMU     , 0, 0, 0x01000000, true },
42 	{ NVKM_SUBDEV_GPIO    , 0, 0, 0x00200000, true },
43 	{ NVKM_SUBDEV_I2C     , 0, 0, 0x00200000, true },
44 	{ NVKM_SUBDEV_TIMER   , 0, 0, 0x00100000, true },
45 	{ NVKM_SUBDEV_THERM   , 0, 0, 0x00040000, true },
46 	{ NVKM_SUBDEV_TOP     , 0, 0, 0x00001000 },
47 	{ NVKM_SUBDEV_TOP     , 0, 0, 0xffffefff, true },
48 	{},
49 };
50 
51 static const struct nvkm_mc_func
52 gk104_mc = {
53 	.init = nv50_mc_init,
54 	.intr = &gt215_mc_intr,
55 	.intrs = gk104_mc_intrs,
56 	.intr_nonstall = true,
57 	.reset = gk104_mc_reset,
58 	.device = &nv04_mc_device,
59 	.unk260 = gf100_mc_unk260,
60 };
61 
62 int
63 gk104_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
64 {
65 	return nvkm_mc_new_(&gk104_mc, device, type, inst, pmc);
66 }
67