1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 26 #include <core/device.h> 27 #include <core/option.h> 28 29 static inline void 30 nvkm_mc_unk260(struct nvkm_mc *pmc, u32 data) 31 { 32 const struct nvkm_mc_oclass *impl = (void *)nv_oclass(pmc); 33 if (impl->unk260) 34 impl->unk260(pmc, data); 35 } 36 37 static inline u32 38 nvkm_mc_intr_mask(struct nvkm_mc *pmc) 39 { 40 u32 intr = nv_rd32(pmc, 0x000100); 41 if (intr == 0xffffffff) /* likely fallen off the bus */ 42 intr = 0x00000000; 43 return intr; 44 } 45 46 static irqreturn_t 47 nvkm_mc_intr(int irq, void *arg) 48 { 49 struct nvkm_mc *pmc = arg; 50 const struct nvkm_mc_oclass *oclass = (void *)nv_object(pmc)->oclass; 51 const struct nvkm_mc_intr *map = oclass->intr; 52 struct nvkm_subdev *unit; 53 u32 intr; 54 55 nv_wr32(pmc, 0x000140, 0x00000000); 56 nv_rd32(pmc, 0x000140); 57 intr = nvkm_mc_intr_mask(pmc); 58 if (pmc->use_msi) 59 oclass->msi_rearm(pmc); 60 61 if (intr) { 62 u32 stat = intr = nvkm_mc_intr_mask(pmc); 63 while (map->stat) { 64 if (intr & map->stat) { 65 unit = nvkm_subdev(pmc, map->unit); 66 if (unit && unit->intr) 67 unit->intr(unit); 68 stat &= ~map->stat; 69 } 70 map++; 71 } 72 73 if (stat) 74 nv_error(pmc, "unknown intr 0x%08x\n", stat); 75 } 76 77 nv_wr32(pmc, 0x000140, 0x00000001); 78 return intr ? IRQ_HANDLED : IRQ_NONE; 79 } 80 81 int 82 _nvkm_mc_fini(struct nvkm_object *object, bool suspend) 83 { 84 struct nvkm_mc *pmc = (void *)object; 85 nv_wr32(pmc, 0x000140, 0x00000000); 86 return nvkm_subdev_fini(&pmc->base, suspend); 87 } 88 89 int 90 _nvkm_mc_init(struct nvkm_object *object) 91 { 92 struct nvkm_mc *pmc = (void *)object; 93 int ret = nvkm_subdev_init(&pmc->base); 94 if (ret) 95 return ret; 96 nv_wr32(pmc, 0x000140, 0x00000001); 97 return 0; 98 } 99 100 void 101 _nvkm_mc_dtor(struct nvkm_object *object) 102 { 103 struct nvkm_device *device = nv_device(object); 104 struct nvkm_mc *pmc = (void *)object; 105 free_irq(pmc->irq, pmc); 106 if (pmc->use_msi) 107 pci_disable_msi(device->pdev); 108 nvkm_subdev_destroy(&pmc->base); 109 } 110 111 int 112 nvkm_mc_create_(struct nvkm_object *parent, struct nvkm_object *engine, 113 struct nvkm_oclass *bclass, int length, void **pobject) 114 { 115 const struct nvkm_mc_oclass *oclass = (void *)bclass; 116 struct nvkm_device *device = nv_device(parent); 117 struct nvkm_mc *pmc; 118 int ret; 119 120 ret = nvkm_subdev_create_(parent, engine, bclass, 0, "PMC", 121 "master", length, pobject); 122 pmc = *pobject; 123 if (ret) 124 return ret; 125 126 pmc->unk260 = nvkm_mc_unk260; 127 128 if (nv_device_is_pci(device)) { 129 switch (device->pdev->device & 0x0ff0) { 130 case 0x00f0: 131 case 0x02e0: 132 /* BR02? NFI how these would be handled yet exactly */ 133 break; 134 default: 135 switch (device->chipset) { 136 case 0xaa: 137 /* reported broken, nv also disable it */ 138 break; 139 default: 140 pmc->use_msi = true; 141 break; 142 } 143 } 144 145 pmc->use_msi = nvkm_boolopt(device->cfgopt, "NvMSI", 146 pmc->use_msi); 147 148 if (pmc->use_msi && oclass->msi_rearm) { 149 pmc->use_msi = pci_enable_msi(device->pdev) == 0; 150 if (pmc->use_msi) { 151 nv_info(pmc, "MSI interrupts enabled\n"); 152 oclass->msi_rearm(pmc); 153 } 154 } else { 155 pmc->use_msi = false; 156 } 157 } 158 159 ret = nv_device_get_irq(device, true); 160 if (ret < 0) 161 return ret; 162 pmc->irq = ret; 163 164 ret = request_irq(pmc->irq, nvkm_mc_intr, IRQF_SHARED, "nvkm", pmc); 165 if (ret < 0) 166 return ret; 167 168 return 0; 169 } 170