xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.c (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1dc06e366SMartin Peres /*
2dc06e366SMartin Peres  * Copyright 2015 Martin Peres
3dc06e366SMartin Peres  *
4dc06e366SMartin Peres  * Permission is hereby granted, free of charge, to any person obtaining a
5dc06e366SMartin Peres  * copy of this software and associated documentation files (the "Software"),
6dc06e366SMartin Peres  * to deal in the Software without restriction, including without limitation
7dc06e366SMartin Peres  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8dc06e366SMartin Peres  * and/or sell copies of the Software, and to permit persons to whom the
9dc06e366SMartin Peres  * Software is furnished to do so, subject to the following conditions:
10dc06e366SMartin Peres  *
11dc06e366SMartin Peres  * The above copyright notice and this permission notice shall be included in
12dc06e366SMartin Peres  * all copies or substantial portions of the Software.
13dc06e366SMartin Peres  *
14dc06e366SMartin Peres  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15dc06e366SMartin Peres  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16dc06e366SMartin Peres  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17dc06e366SMartin Peres  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18dc06e366SMartin Peres  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19dc06e366SMartin Peres  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20dc06e366SMartin Peres  * OTHER DEALINGS IN THE SOFTWARE.
21dc06e366SMartin Peres  *
22dc06e366SMartin Peres  * Authors: Martin Peres
23dc06e366SMartin Peres  */
24dc06e366SMartin Peres #include "priv.h"
25dc06e366SMartin Peres 
26b71c0892SKarol Herbst #include <subdev/bios.h>
27b71c0892SKarol Herbst #include <subdev/bios/extdev.h>
28b71c0892SKarol Herbst #include <subdev/bios/iccsense.h>
291efc3c4bSKarol Herbst #include <subdev/bios/power_budget.h>
30b71c0892SKarol Herbst #include <subdev/i2c.h>
31b71c0892SKarol Herbst 
32b71c0892SKarol Herbst static bool
nvkm_iccsense_validate_device(struct i2c_adapter * i2c,u8 addr,enum nvbios_extdev_type type)33b71c0892SKarol Herbst nvkm_iccsense_validate_device(struct i2c_adapter *i2c, u8 addr,
345f1f07deSKarol Herbst 			      enum nvbios_extdev_type type)
35b71c0892SKarol Herbst {
36b71c0892SKarol Herbst 	switch (type) {
37b71c0892SKarol Herbst 	case NVBIOS_EXTDEV_INA209:
38b71c0892SKarol Herbst 	case NVBIOS_EXTDEV_INA219:
395f1f07deSKarol Herbst 		return nv_rd16i2cr(i2c, addr, 0x0) >= 0;
40b71c0892SKarol Herbst 	case NVBIOS_EXTDEV_INA3221:
415f1f07deSKarol Herbst 		return nv_rd16i2cr(i2c, addr, 0xff) == 0x3220 &&
42b71c0892SKarol Herbst 		       nv_rd16i2cr(i2c, addr, 0xfe) == 0x5449;
43b71c0892SKarol Herbst 	default:
44b71c0892SKarol Herbst 		return false;
45b71c0892SKarol Herbst 	}
46b71c0892SKarol Herbst }
47b71c0892SKarol Herbst 
48b71c0892SKarol Herbst static int
nvkm_iccsense_poll_lane(struct i2c_adapter * i2c,u8 addr,u8 shunt_reg,u8 shunt_shift,u8 bus_reg,u8 bus_shift,u8 shunt,u16 lsb)49b71c0892SKarol Herbst nvkm_iccsense_poll_lane(struct i2c_adapter *i2c, u8 addr, u8 shunt_reg,
50b71c0892SKarol Herbst 			u8 shunt_shift, u8 bus_reg, u8 bus_shift, u8 shunt,
51b71c0892SKarol Herbst 			u16 lsb)
52b71c0892SKarol Herbst {
53b71c0892SKarol Herbst 	int vshunt = nv_rd16i2cr(i2c, addr, shunt_reg);
54b71c0892SKarol Herbst 	int vbus = nv_rd16i2cr(i2c, addr, bus_reg);
55b71c0892SKarol Herbst 
56b71c0892SKarol Herbst 	if (vshunt < 0 || vbus < 0)
57b71c0892SKarol Herbst 		return -EINVAL;
58b71c0892SKarol Herbst 
59b71c0892SKarol Herbst 	vshunt >>= shunt_shift;
60b71c0892SKarol Herbst 	vbus >>= bus_shift;
61b71c0892SKarol Herbst 
62b71c0892SKarol Herbst 	return vbus * vshunt * lsb / shunt;
63b71c0892SKarol Herbst }
64b71c0892SKarol Herbst 
65b71c0892SKarol Herbst static int
nvkm_iccsense_ina2x9_read(struct nvkm_iccsense * iccsense,struct nvkm_iccsense_rail * rail,u8 shunt_reg,u8 bus_reg)66b71c0892SKarol Herbst nvkm_iccsense_ina2x9_read(struct nvkm_iccsense *iccsense,
67b71c0892SKarol Herbst                           struct nvkm_iccsense_rail *rail,
68b71c0892SKarol Herbst 			  u8 shunt_reg, u8 bus_reg)
69b71c0892SKarol Herbst {
705f1f07deSKarol Herbst 	return nvkm_iccsense_poll_lane(rail->sensor->i2c, rail->sensor->addr,
715f1f07deSKarol Herbst 				       shunt_reg, 0, bus_reg, 3, rail->mohm,
725f1f07deSKarol Herbst 				       10 * 4);
73b71c0892SKarol Herbst }
74b71c0892SKarol Herbst 
75b71c0892SKarol Herbst static int
nvkm_iccsense_ina209_read(struct nvkm_iccsense * iccsense,struct nvkm_iccsense_rail * rail)76b71c0892SKarol Herbst nvkm_iccsense_ina209_read(struct nvkm_iccsense *iccsense,
77b71c0892SKarol Herbst 			  struct nvkm_iccsense_rail *rail)
78b71c0892SKarol Herbst {
79b71c0892SKarol Herbst 	return nvkm_iccsense_ina2x9_read(iccsense, rail, 3, 4);
80b71c0892SKarol Herbst }
81b71c0892SKarol Herbst 
82b71c0892SKarol Herbst static int
nvkm_iccsense_ina219_read(struct nvkm_iccsense * iccsense,struct nvkm_iccsense_rail * rail)83b71c0892SKarol Herbst nvkm_iccsense_ina219_read(struct nvkm_iccsense *iccsense,
84b71c0892SKarol Herbst 			  struct nvkm_iccsense_rail *rail)
85b71c0892SKarol Herbst {
86b71c0892SKarol Herbst 	return nvkm_iccsense_ina2x9_read(iccsense, rail, 1, 2);
87b71c0892SKarol Herbst }
88b71c0892SKarol Herbst 
89b71c0892SKarol Herbst static int
nvkm_iccsense_ina3221_read(struct nvkm_iccsense * iccsense,struct nvkm_iccsense_rail * rail)90b71c0892SKarol Herbst nvkm_iccsense_ina3221_read(struct nvkm_iccsense *iccsense,
91b71c0892SKarol Herbst 			   struct nvkm_iccsense_rail *rail)
92b71c0892SKarol Herbst {
935f1f07deSKarol Herbst 	return nvkm_iccsense_poll_lane(rail->sensor->i2c, rail->sensor->addr,
945f1f07deSKarol Herbst 				       1 + (rail->idx * 2), 3,
955f1f07deSKarol Herbst 				       2 + (rail->idx * 2), 3, rail->mohm,
96b71c0892SKarol Herbst 				       40 * 8);
97b71c0892SKarol Herbst }
98b71c0892SKarol Herbst 
992e9a43f9SKarol Herbst static void
nvkm_iccsense_sensor_config(struct nvkm_iccsense * iccsense,struct nvkm_iccsense_sensor * sensor)1002e9a43f9SKarol Herbst nvkm_iccsense_sensor_config(struct nvkm_iccsense *iccsense,
1012e9a43f9SKarol Herbst 		            struct nvkm_iccsense_sensor *sensor)
1022e9a43f9SKarol Herbst {
103a8c119a4SKarol Herbst 	struct nvkm_subdev *subdev = &iccsense->subdev;
104a8c119a4SKarol Herbst 	nvkm_trace(subdev, "write config of extdev %i: 0x%04x\n", sensor->id, sensor->config);
105a8c119a4SKarol Herbst 	nv_wr16i2cr(sensor->i2c, sensor->addr, 0x00, sensor->config);
1062e9a43f9SKarol Herbst }
1072e9a43f9SKarol Herbst 
108b71c0892SKarol Herbst int
nvkm_iccsense_read_all(struct nvkm_iccsense * iccsense)109b71c0892SKarol Herbst nvkm_iccsense_read_all(struct nvkm_iccsense *iccsense)
110b71c0892SKarol Herbst {
11192224e75SKarol Herbst 	int result = 0;
11292224e75SKarol Herbst 	struct nvkm_iccsense_rail *rail;
113d03e0f27SKarol Herbst 
114d03e0f27SKarol Herbst 	if (!iccsense)
115d03e0f27SKarol Herbst 		return -EINVAL;
116d03e0f27SKarol Herbst 
11792224e75SKarol Herbst 	list_for_each_entry(rail, &iccsense->rails, head) {
118d03e0f27SKarol Herbst 		int res;
119d03e0f27SKarol Herbst 		if (!rail->read)
120d03e0f27SKarol Herbst 			return -ENODEV;
121d03e0f27SKarol Herbst 
122d03e0f27SKarol Herbst 		res = rail->read(iccsense, rail);
12392224e75SKarol Herbst 		if (res < 0)
124b71c0892SKarol Herbst 			return res;
12592224e75SKarol Herbst 		result += res;
126b71c0892SKarol Herbst 	}
127b71c0892SKarol Herbst 	return result;
128b71c0892SKarol Herbst }
129b71c0892SKarol Herbst 
130b71c0892SKarol Herbst static void *
nvkm_iccsense_dtor(struct nvkm_subdev * subdev)131b71c0892SKarol Herbst nvkm_iccsense_dtor(struct nvkm_subdev *subdev)
132b71c0892SKarol Herbst {
133b71c0892SKarol Herbst 	struct nvkm_iccsense *iccsense = nvkm_iccsense(subdev);
1345f1f07deSKarol Herbst 	struct nvkm_iccsense_sensor *sensor, *tmps;
1355f1f07deSKarol Herbst 	struct nvkm_iccsense_rail *rail, *tmpr;
136b71c0892SKarol Herbst 
1375f1f07deSKarol Herbst 	list_for_each_entry_safe(sensor, tmps, &iccsense->sensors, head) {
1385f1f07deSKarol Herbst 		list_del(&sensor->head);
1395f1f07deSKarol Herbst 		kfree(sensor);
1405f1f07deSKarol Herbst 	}
1415f1f07deSKarol Herbst 	list_for_each_entry_safe(rail, tmpr, &iccsense->rails, head) {
14292224e75SKarol Herbst 		list_del(&rail->head);
14392224e75SKarol Herbst 		kfree(rail);
14492224e75SKarol Herbst 	}
145b71c0892SKarol Herbst 
146b71c0892SKarol Herbst 	return iccsense;
147b71c0892SKarol Herbst }
148b71c0892SKarol Herbst 
1495f1f07deSKarol Herbst static struct nvkm_iccsense_sensor*
nvkm_iccsense_create_sensor(struct nvkm_iccsense * iccsense,u8 id)1505f1f07deSKarol Herbst nvkm_iccsense_create_sensor(struct nvkm_iccsense *iccsense, u8 id)
151b71c0892SKarol Herbst {
1525f1f07deSKarol Herbst 	struct nvkm_subdev *subdev = &iccsense->subdev;
153b71c0892SKarol Herbst 	struct nvkm_bios *bios = subdev->device->bios;
154b71c0892SKarol Herbst 	struct nvkm_i2c *i2c = subdev->device->i2c;
155b71c0892SKarol Herbst 	struct nvbios_extdev_func extdev;
156b71c0892SKarol Herbst 	struct nvkm_i2c_bus *i2c_bus;
1575f1f07deSKarol Herbst 	struct nvkm_iccsense_sensor *sensor;
158b71c0892SKarol Herbst 	u8 addr;
159b71c0892SKarol Herbst 
1605f1f07deSKarol Herbst 	if (!i2c || !bios || nvbios_extdev_parse(bios, id, &extdev))
1615f1f07deSKarol Herbst 		return NULL;
162b71c0892SKarol Herbst 
163b71c0892SKarol Herbst 	if (extdev.type == 0xff)
1645f1f07deSKarol Herbst 		return NULL;
1655f1f07deSKarol Herbst 
1665f1f07deSKarol Herbst 	if (extdev.type != NVBIOS_EXTDEV_INA209 &&
1675f1f07deSKarol Herbst 	    extdev.type != NVBIOS_EXTDEV_INA219 &&
1685f1f07deSKarol Herbst 	    extdev.type != NVBIOS_EXTDEV_INA3221) {
1695f1f07deSKarol Herbst 		iccsense->data_valid = false;
1705f1f07deSKarol Herbst 		nvkm_error(subdev, "Unknown sensor type %x, power reading "
1715f1f07deSKarol Herbst 			   "disabled\n", extdev.type);
1725f1f07deSKarol Herbst 		return NULL;
1735f1f07deSKarol Herbst 	}
174b71c0892SKarol Herbst 
175b71c0892SKarol Herbst 	if (extdev.bus)
176b71c0892SKarol Herbst 		i2c_bus = nvkm_i2c_bus_find(i2c, NVKM_I2C_BUS_SEC);
177b71c0892SKarol Herbst 	else
178b71c0892SKarol Herbst 		i2c_bus = nvkm_i2c_bus_find(i2c, NVKM_I2C_BUS_PRI);
179b71c0892SKarol Herbst 	if (!i2c_bus)
1805f1f07deSKarol Herbst 		return NULL;
181b71c0892SKarol Herbst 
182b71c0892SKarol Herbst 	addr = extdev.addr >> 1;
183b71c0892SKarol Herbst 	if (!nvkm_iccsense_validate_device(&i2c_bus->i2c, addr,
1845f1f07deSKarol Herbst 					   extdev.type)) {
185b71c0892SKarol Herbst 		iccsense->data_valid = false;
1865f1f07deSKarol Herbst 		nvkm_warn(subdev, "found invalid sensor id: %i, power reading"
1875f1f07deSKarol Herbst 			  "might be invalid\n", id);
1885f1f07deSKarol Herbst 		return NULL;
189b71c0892SKarol Herbst 	}
190b71c0892SKarol Herbst 
1915f1f07deSKarol Herbst 	sensor = kmalloc(sizeof(*sensor), GFP_KERNEL);
1925f1f07deSKarol Herbst 	if (!sensor)
1935f1f07deSKarol Herbst 		return NULL;
1945f1f07deSKarol Herbst 
1955f1f07deSKarol Herbst 	list_add_tail(&sensor->head, &iccsense->sensors);
1965f1f07deSKarol Herbst 	sensor->id = id;
1975f1f07deSKarol Herbst 	sensor->type = extdev.type;
1985f1f07deSKarol Herbst 	sensor->i2c = &i2c_bus->i2c;
1995f1f07deSKarol Herbst 	sensor->addr = addr;
200a8c119a4SKarol Herbst 	sensor->config = 0x0;
2015f1f07deSKarol Herbst 	return sensor;
2025f1f07deSKarol Herbst }
2035f1f07deSKarol Herbst 
2045f1f07deSKarol Herbst static struct nvkm_iccsense_sensor*
nvkm_iccsense_get_sensor(struct nvkm_iccsense * iccsense,u8 id)2055f1f07deSKarol Herbst nvkm_iccsense_get_sensor(struct nvkm_iccsense *iccsense, u8 id)
2065f1f07deSKarol Herbst {
2075f1f07deSKarol Herbst 	struct nvkm_iccsense_sensor *sensor;
2085f1f07deSKarol Herbst 	list_for_each_entry(sensor, &iccsense->sensors, head) {
2095f1f07deSKarol Herbst 		if (sensor->id == id)
2105f1f07deSKarol Herbst 			return sensor;
2115f1f07deSKarol Herbst 	}
2125f1f07deSKarol Herbst 	return nvkm_iccsense_create_sensor(iccsense, id);
2135f1f07deSKarol Herbst }
2145f1f07deSKarol Herbst 
2155f1f07deSKarol Herbst static int
nvkm_iccsense_oneinit(struct nvkm_subdev * subdev)2165f1f07deSKarol Herbst nvkm_iccsense_oneinit(struct nvkm_subdev *subdev)
2175f1f07deSKarol Herbst {
2185f1f07deSKarol Herbst 	struct nvkm_iccsense *iccsense = nvkm_iccsense(subdev);
2195f1f07deSKarol Herbst 	struct nvkm_bios *bios = subdev->device->bios;
2201efc3c4bSKarol Herbst 	struct nvbios_power_budget budget;
2215f1f07deSKarol Herbst 	struct nvbios_iccsense stbl;
2221efc3c4bSKarol Herbst 	int i, ret;
2235f1f07deSKarol Herbst 
2241efc3c4bSKarol Herbst 	if (!bios)
2251efc3c4bSKarol Herbst 		return 0;
2261efc3c4bSKarol Herbst 
2271efc3c4bSKarol Herbst 	ret = nvbios_power_budget_header(bios, &budget);
2281efc3c4bSKarol Herbst 	if (!ret && budget.cap_entry != 0xff) {
2291efc3c4bSKarol Herbst 		struct nvbios_power_budget_entry entry;
2301efc3c4bSKarol Herbst 		ret = nvbios_power_budget_entry(bios, &budget,
2311efc3c4bSKarol Herbst 		                                budget.cap_entry, &entry);
2321efc3c4bSKarol Herbst 		if (!ret) {
2331efc3c4bSKarol Herbst 			iccsense->power_w_max  = entry.avg_w;
2341efc3c4bSKarol Herbst 			iccsense->power_w_crit = entry.max_w;
2351efc3c4bSKarol Herbst 		}
2361efc3c4bSKarol Herbst 	}
2371efc3c4bSKarol Herbst 
2381efc3c4bSKarol Herbst 	if (nvbios_iccsense_parse(bios, &stbl) || !stbl.nr_entry)
2395f1f07deSKarol Herbst 		return 0;
2405f1f07deSKarol Herbst 
2415f1f07deSKarol Herbst 	iccsense->data_valid = true;
2425f1f07deSKarol Herbst 	for (i = 0; i < stbl.nr_entry; ++i) {
243a8c119a4SKarol Herbst 		struct pwr_rail_t *pwr_rail = &stbl.rail[i];
2445f1f07deSKarol Herbst 		struct nvkm_iccsense_sensor *sensor;
245a8c119a4SKarol Herbst 		int r;
246a8c119a4SKarol Herbst 
247a8c119a4SKarol Herbst 		if (pwr_rail->mode != 1 || !pwr_rail->resistor_count)
248a8c119a4SKarol Herbst 			continue;
249a8c119a4SKarol Herbst 
250a8c119a4SKarol Herbst 		sensor = nvkm_iccsense_get_sensor(iccsense, pwr_rail->extdev_id);
251a8c119a4SKarol Herbst 		if (!sensor)
252a8c119a4SKarol Herbst 			continue;
253a8c119a4SKarol Herbst 
254a8c119a4SKarol Herbst 		if (!sensor->config)
255a8c119a4SKarol Herbst 			sensor->config = pwr_rail->config;
256a8c119a4SKarol Herbst 		else if (sensor->config != pwr_rail->config)
257a8c119a4SKarol Herbst 			nvkm_error(subdev, "config mismatch found for extdev %i\n", pwr_rail->extdev_id);
258a8c119a4SKarol Herbst 
259a8c119a4SKarol Herbst 		for (r = 0; r < pwr_rail->resistor_count; ++r) {
260a8c119a4SKarol Herbst 			struct nvkm_iccsense_rail *rail;
261a8c119a4SKarol Herbst 			struct pwr_rail_resistor_t *res = &pwr_rail->resistors[r];
2626aa85f11SBen Skeggs 			int (*read)(struct nvkm_iccsense *,
2636aa85f11SBen Skeggs 				    struct nvkm_iccsense_rail *);
2645f1f07deSKarol Herbst 
265a8c119a4SKarol Herbst 			if (!res->mohm || !res->enabled)
2665f1f07deSKarol Herbst 				continue;
2675f1f07deSKarol Herbst 
2685f1f07deSKarol Herbst 			switch (sensor->type) {
269b71c0892SKarol Herbst 			case NVBIOS_EXTDEV_INA209:
2706aa85f11SBen Skeggs 				read = nvkm_iccsense_ina209_read;
271b71c0892SKarol Herbst 				break;
272b71c0892SKarol Herbst 			case NVBIOS_EXTDEV_INA219:
2736aa85f11SBen Skeggs 				read = nvkm_iccsense_ina219_read;
274b71c0892SKarol Herbst 				break;
275b71c0892SKarol Herbst 			case NVBIOS_EXTDEV_INA3221:
2766aa85f11SBen Skeggs 				read = nvkm_iccsense_ina3221_read;
277b71c0892SKarol Herbst 				break;
2785f1f07deSKarol Herbst 			default:
2795f1f07deSKarol Herbst 				continue;
280b71c0892SKarol Herbst 			}
281b71c0892SKarol Herbst 
2826aa85f11SBen Skeggs 			rail = kmalloc(sizeof(*rail), GFP_KERNEL);
2836aa85f11SBen Skeggs 			if (!rail)
2846aa85f11SBen Skeggs 				return -ENOMEM;
285a8c119a4SKarol Herbst 
2866aa85f11SBen Skeggs 			rail->read = read;
2875f1f07deSKarol Herbst 			rail->sensor = sensor;
288a8c119a4SKarol Herbst 			rail->idx = r;
289a8c119a4SKarol Herbst 			rail->mohm = res->mohm;
290a8c119a4SKarol Herbst 			nvkm_debug(subdev, "create rail for extdev %i: { idx: %i, mohm: %i }\n", pwr_rail->extdev_id, r, rail->mohm);
29192224e75SKarol Herbst 			list_add_tail(&rail->head, &iccsense->rails);
292b71c0892SKarol Herbst 		}
293a8c119a4SKarol Herbst 	}
294b71c0892SKarol Herbst 	return 0;
295b71c0892SKarol Herbst }
296b71c0892SKarol Herbst 
2972e9a43f9SKarol Herbst static int
nvkm_iccsense_init(struct nvkm_subdev * subdev)2982e9a43f9SKarol Herbst nvkm_iccsense_init(struct nvkm_subdev *subdev)
2992e9a43f9SKarol Herbst {
3002e9a43f9SKarol Herbst 	struct nvkm_iccsense *iccsense = nvkm_iccsense(subdev);
3012e9a43f9SKarol Herbst 	struct nvkm_iccsense_sensor *sensor;
3022e9a43f9SKarol Herbst 	list_for_each_entry(sensor, &iccsense->sensors, head)
3032e9a43f9SKarol Herbst 		nvkm_iccsense_sensor_config(iccsense, sensor);
3042e9a43f9SKarol Herbst 	return 0;
3052e9a43f9SKarol Herbst }
3062e9a43f9SKarol Herbst 
307f3a8b664SBen Skeggs static const struct nvkm_subdev_func
308f3a8b664SBen Skeggs iccsense_func = {
309b71c0892SKarol Herbst 	.oneinit = nvkm_iccsense_oneinit,
3102e9a43f9SKarol Herbst 	.init = nvkm_iccsense_init,
311b71c0892SKarol Herbst 	.dtor = nvkm_iccsense_dtor,
312b71c0892SKarol Herbst };
313dc06e366SMartin Peres 
314dc06e366SMartin Peres void
nvkm_iccsense_ctor(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_iccsense * iccsense)315*4dea1a96SBen Skeggs nvkm_iccsense_ctor(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
316dc06e366SMartin Peres 		   struct nvkm_iccsense *iccsense)
317dc06e366SMartin Peres {
318*4dea1a96SBen Skeggs 	nvkm_subdev_ctor(&iccsense_func, device, type, inst, &iccsense->subdev);
319dc06e366SMartin Peres }
320dc06e366SMartin Peres 
321dc06e366SMartin Peres int
nvkm_iccsense_new_(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_iccsense ** iccsense)322*4dea1a96SBen Skeggs nvkm_iccsense_new_(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
323dc06e366SMartin Peres 		   struct nvkm_iccsense **iccsense)
324dc06e366SMartin Peres {
325dc06e366SMartin Peres 	if (!(*iccsense = kzalloc(sizeof(**iccsense), GFP_KERNEL)))
326dc06e366SMartin Peres 		return -ENOMEM;
3275f1f07deSKarol Herbst 	INIT_LIST_HEAD(&(*iccsense)->sensors);
32892224e75SKarol Herbst 	INIT_LIST_HEAD(&(*iccsense)->rails);
329*4dea1a96SBen Skeggs 	nvkm_iccsense_ctor(device, type, inst, *iccsense);
330dc06e366SMartin Peres 	return 0;
331dc06e366SMartin Peres }
332