1befe75aeSBen Skeggs /* SPDX-License-Identifier: MIT 2befe75aeSBen Skeggs * 3befe75aeSBen Skeggs * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. 4befe75aeSBen Skeggs */ 5befe75aeSBen Skeggs #ifndef __NVKM_RM_GPU_H__ 6befe75aeSBen Skeggs #define __NVKM_RM_GPU_H__ 7befe75aeSBen Skeggs #include "rm.h" 8befe75aeSBen Skeggs 9befe75aeSBen Skeggs struct nvkm_rm_gpu { 100fac5141SBen Skeggs struct { 110fac5141SBen Skeggs struct { 120fac5141SBen Skeggs u32 root; 130fac5141SBen Skeggs u32 caps; 140fac5141SBen Skeggs u32 core; 150fac5141SBen Skeggs u32 wndw; 160fac5141SBen Skeggs u32 wimm; 170fac5141SBen Skeggs u32 curs; 180fac5141SBen Skeggs } class; 190fac5141SBen Skeggs } disp; 20cd3c6228SBen Skeggs 21cd3c6228SBen Skeggs struct { 22cd3c6228SBen Skeggs u32 class; 23cd3c6228SBen Skeggs } usermode; 24678bb27eSBen Skeggs 25678bb27eSBen Skeggs struct { 26678bb27eSBen Skeggs struct { 27678bb27eSBen Skeggs u32 class; 2856c36f59SBen Skeggs u32 (*doorbell_handle)(struct nvkm_chan *); 29678bb27eSBen Skeggs } chan; 30678bb27eSBen Skeggs } fifo; 317c2d25f1SBen Skeggs 327c2d25f1SBen Skeggs struct { 337c2d25f1SBen Skeggs u32 class; 34*284ad706SBen Skeggs u32 (*grce_mask)(struct nvkm_device *); 357c2d25f1SBen Skeggs } ce; 367c2d25f1SBen Skeggs 377c2d25f1SBen Skeggs struct { 387c2d25f1SBen Skeggs struct { 397c2d25f1SBen Skeggs u32 i2m; 407c2d25f1SBen Skeggs u32 twod; 417c2d25f1SBen Skeggs u32 threed; 427c2d25f1SBen Skeggs u32 compute; 437c2d25f1SBen Skeggs } class; 447c2d25f1SBen Skeggs } gr; 457c2d25f1SBen Skeggs 467c2d25f1SBen Skeggs struct { 477c2d25f1SBen Skeggs u32 class; 487c2d25f1SBen Skeggs } nvdec; 497c2d25f1SBen Skeggs 507c2d25f1SBen Skeggs struct { 517c2d25f1SBen Skeggs u32 class; 527c2d25f1SBen Skeggs } nvenc; 537c2d25f1SBen Skeggs 547c2d25f1SBen Skeggs struct { 557c2d25f1SBen Skeggs u32 class; 567c2d25f1SBen Skeggs } nvjpg; 577c2d25f1SBen Skeggs 587c2d25f1SBen Skeggs struct { 597c2d25f1SBen Skeggs u32 class; 607c2d25f1SBen Skeggs } ofa; 61befe75aeSBen Skeggs }; 62befe75aeSBen Skeggs 63befe75aeSBen Skeggs extern const struct nvkm_rm_gpu tu1xx_gpu; 64befe75aeSBen Skeggs extern const struct nvkm_rm_gpu ga100_gpu; 65befe75aeSBen Skeggs extern const struct nvkm_rm_gpu ga1xx_gpu; 66befe75aeSBen Skeggs extern const struct nvkm_rm_gpu ad10x_gpu; 6744f93b20SBen Skeggs extern const struct nvkm_rm_gpu gh100_gpu; 6832cb1cc3SBen Skeggs extern const struct nvkm_rm_gpu gb10x_gpu; 69*284ad706SBen Skeggs extern const struct nvkm_rm_gpu gb20x_gpu; 70befe75aeSBen Skeggs #endif 71