xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1c28efb15SBen Skeggs /*
2c28efb15SBen Skeggs  * Copyright 2021 Red Hat Inc.
3c28efb15SBen Skeggs  *
4c28efb15SBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5c28efb15SBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6c28efb15SBen Skeggs  * to deal in the Software without restriction, including without limitation
7c28efb15SBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c28efb15SBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9c28efb15SBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10c28efb15SBen Skeggs  *
11c28efb15SBen Skeggs  * The above copyright notice and this permission notice shall be included in
12c28efb15SBen Skeggs  * all copies or substantial portions of the Software.
13c28efb15SBen Skeggs  *
14c28efb15SBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15c28efb15SBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16c28efb15SBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17c28efb15SBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18c28efb15SBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19c28efb15SBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20c28efb15SBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21c28efb15SBen Skeggs  */
22c28efb15SBen Skeggs #include "priv.h"
23c28efb15SBen Skeggs 
24*2cfad4b0SBen Skeggs #include <subdev/gsp.h>
25*2cfad4b0SBen Skeggs 
26c28efb15SBen Skeggs static void
ga102_gpio_reset(struct nvkm_gpio * gpio,u8 match)27c28efb15SBen Skeggs ga102_gpio_reset(struct nvkm_gpio *gpio, u8 match)
28c28efb15SBen Skeggs {
29c28efb15SBen Skeggs 	struct nvkm_device *device = gpio->subdev.device;
30c28efb15SBen Skeggs 	struct nvkm_bios *bios = device->bios;
31c28efb15SBen Skeggs 	u8 ver, len;
32c28efb15SBen Skeggs 	u16 entry;
33c28efb15SBen Skeggs 	int ent = -1;
34c28efb15SBen Skeggs 
35c28efb15SBen Skeggs 	while ((entry = dcb_gpio_entry(bios, 0, ++ent, &ver, &len))) {
36c28efb15SBen Skeggs 		u32 data = nvbios_rd32(bios, entry);
37c28efb15SBen Skeggs 		u8  line =   (data & 0x0000003f);
38c28efb15SBen Skeggs 		u8  defs = !!(data & 0x00000080);
39c28efb15SBen Skeggs 		u8  func =   (data & 0x0000ff00) >> 8;
40c28efb15SBen Skeggs 		u8  unk0 =   (data & 0x00ff0000) >> 16;
41c28efb15SBen Skeggs 		u8  unk1 =   (data & 0x1f000000) >> 24;
42c28efb15SBen Skeggs 
43c28efb15SBen Skeggs 		if ( func  == DCB_GPIO_UNUSED ||
44c28efb15SBen Skeggs 		    (match != DCB_GPIO_UNUSED && match != func))
45c28efb15SBen Skeggs 			continue;
46c28efb15SBen Skeggs 
47c28efb15SBen Skeggs 		nvkm_gpio_set(gpio, 0, func, line, defs);
48c28efb15SBen Skeggs 
49c28efb15SBen Skeggs 		nvkm_mask(device, 0x021200 + (line * 4), 0xff, unk0);
50c28efb15SBen Skeggs 		if (unk1--)
51c28efb15SBen Skeggs 			nvkm_mask(device, 0x00d740 + (unk1 * 4), 0xff, line);
52c28efb15SBen Skeggs 	}
53c28efb15SBen Skeggs }
54c28efb15SBen Skeggs 
55c28efb15SBen Skeggs static int
ga102_gpio_drive(struct nvkm_gpio * gpio,int line,int dir,int out)56c28efb15SBen Skeggs ga102_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
57c28efb15SBen Skeggs {
58c28efb15SBen Skeggs 	struct nvkm_device *device = gpio->subdev.device;
59c28efb15SBen Skeggs 	u32 data = ((dir ^ 1) << 13) | (out << 12);
60c28efb15SBen Skeggs 	nvkm_mask(device, 0x021200 + (line * 4), 0x00003000, data);
61c28efb15SBen Skeggs 	nvkm_mask(device, 0x00d604, 0x00000001, 0x00000001); /* update? */
62c28efb15SBen Skeggs 	return 0;
63c28efb15SBen Skeggs }
64c28efb15SBen Skeggs 
65c28efb15SBen Skeggs static int
ga102_gpio_sense(struct nvkm_gpio * gpio,int line)66c28efb15SBen Skeggs ga102_gpio_sense(struct nvkm_gpio *gpio, int line)
67c28efb15SBen Skeggs {
68c28efb15SBen Skeggs 	struct nvkm_device *device = gpio->subdev.device;
69c28efb15SBen Skeggs 	return !!(nvkm_rd32(device, 0x021200 + (line * 4)) & 0x00004000);
70c28efb15SBen Skeggs }
71c28efb15SBen Skeggs 
72c28efb15SBen Skeggs static void
ga102_gpio_intr_stat(struct nvkm_gpio * gpio,u32 * hi,u32 * lo)73c28efb15SBen Skeggs ga102_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
74c28efb15SBen Skeggs {
75c28efb15SBen Skeggs 	struct nvkm_device *device = gpio->subdev.device;
76c28efb15SBen Skeggs 	u32 intr0 = nvkm_rd32(device, 0x021640);
77c28efb15SBen Skeggs 	u32 intr1 = nvkm_rd32(device, 0x02164c);
78c28efb15SBen Skeggs 	u32 stat0 = nvkm_rd32(device, 0x021648) & intr0;
79c28efb15SBen Skeggs 	u32 stat1 = nvkm_rd32(device, 0x021654) & intr1;
80c28efb15SBen Skeggs 	*lo = (stat1 & 0xffff0000) | (stat0 >> 16);
81c28efb15SBen Skeggs 	*hi = (stat1 << 16) | (stat0 & 0x0000ffff);
82c28efb15SBen Skeggs 	nvkm_wr32(device, 0x021640, intr0);
83c28efb15SBen Skeggs 	nvkm_wr32(device, 0x02164c, intr1);
84c28efb15SBen Skeggs }
85c28efb15SBen Skeggs 
86c28efb15SBen Skeggs static void
ga102_gpio_intr_mask(struct nvkm_gpio * gpio,u32 type,u32 mask,u32 data)87c28efb15SBen Skeggs ga102_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
88c28efb15SBen Skeggs {
89c28efb15SBen Skeggs 	struct nvkm_device *device = gpio->subdev.device;
90c28efb15SBen Skeggs 	u32 inte0 = nvkm_rd32(device, 0x021648);
91c28efb15SBen Skeggs 	u32 inte1 = nvkm_rd32(device, 0x021654);
92c28efb15SBen Skeggs 	if (type & NVKM_GPIO_LO)
93c28efb15SBen Skeggs 		inte0 = (inte0 & ~(mask << 16)) | (data << 16);
94c28efb15SBen Skeggs 	if (type & NVKM_GPIO_HI)
95c28efb15SBen Skeggs 		inte0 = (inte0 & ~(mask & 0xffff)) | (data & 0xffff);
96c28efb15SBen Skeggs 	mask >>= 16;
97c28efb15SBen Skeggs 	data >>= 16;
98c28efb15SBen Skeggs 	if (type & NVKM_GPIO_LO)
99c28efb15SBen Skeggs 		inte1 = (inte1 & ~(mask << 16)) | (data << 16);
100c28efb15SBen Skeggs 	if (type & NVKM_GPIO_HI)
101c28efb15SBen Skeggs 		inte1 = (inte1 & ~mask) | data;
102c28efb15SBen Skeggs 	nvkm_wr32(device, 0x021648, inte0);
103c28efb15SBen Skeggs 	nvkm_wr32(device, 0x021654, inte1);
104c28efb15SBen Skeggs }
105c28efb15SBen Skeggs 
106c28efb15SBen Skeggs static const struct nvkm_gpio_func
107c28efb15SBen Skeggs ga102_gpio = {
108c28efb15SBen Skeggs 	.lines = 32,
109c28efb15SBen Skeggs 	.intr_stat = ga102_gpio_intr_stat,
110c28efb15SBen Skeggs 	.intr_mask = ga102_gpio_intr_mask,
111c28efb15SBen Skeggs 	.drive = ga102_gpio_drive,
112c28efb15SBen Skeggs 	.sense = ga102_gpio_sense,
113c28efb15SBen Skeggs 	.reset = ga102_gpio_reset,
114c28efb15SBen Skeggs };
115c28efb15SBen Skeggs 
116c28efb15SBen Skeggs int
ga102_gpio_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_gpio ** pgpio)11701055c01SBen Skeggs ga102_gpio_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
11801055c01SBen Skeggs 	       struct nvkm_gpio **pgpio)
119c28efb15SBen Skeggs {
120*2cfad4b0SBen Skeggs 	if (nvkm_gsp_rm(device->gsp))
121*2cfad4b0SBen Skeggs 		return -ENODEV;
122*2cfad4b0SBen Skeggs 
12301055c01SBen Skeggs 	return nvkm_gpio_new_(&ga102_gpio, device, type, inst, pgpio);
124c28efb15SBen Skeggs }
125