xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fsp/base.c (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1*44f93b20SBen Skeggs /* SPDX-License-Identifier: MIT
2*44f93b20SBen Skeggs  *
3*44f93b20SBen Skeggs  * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
4*44f93b20SBen Skeggs  */
5*44f93b20SBen Skeggs #include "priv.h"
6*44f93b20SBen Skeggs 
7*44f93b20SBen Skeggs int
8*44f93b20SBen Skeggs nvkm_fsp_boot_gsp_fmc(struct nvkm_fsp *fsp, u64 args_addr, u32 rsvd_size, bool resume,
9*44f93b20SBen Skeggs 		      u64 img_addr, const u8 *hash, const u8 *pkey, const u8 *sig)
10*44f93b20SBen Skeggs {
11*44f93b20SBen Skeggs 	return fsp->func->cot.boot_gsp_fmc(fsp, args_addr, rsvd_size, resume,
12*44f93b20SBen Skeggs 					   img_addr, hash, pkey, sig);
13*44f93b20SBen Skeggs }
14*44f93b20SBen Skeggs 
15*44f93b20SBen Skeggs bool
16*44f93b20SBen Skeggs nvkm_fsp_verify_gsp_fmc(struct nvkm_fsp *fsp, u32 hash_size, u32 pkey_size, u32 sig_size)
17*44f93b20SBen Skeggs {
18*44f93b20SBen Skeggs 	return hash_size == fsp->func->cot.size_hash &&
19*44f93b20SBen Skeggs 	       pkey_size == fsp->func->cot.size_pkey &&
20*44f93b20SBen Skeggs 	        sig_size == fsp->func->cot.size_sig;
21*44f93b20SBen Skeggs }
22*44f93b20SBen Skeggs 
23*44f93b20SBen Skeggs static int
24*44f93b20SBen Skeggs nvkm_fsp_preinit(struct nvkm_subdev *subdev)
25*44f93b20SBen Skeggs {
26*44f93b20SBen Skeggs 	struct nvkm_fsp *fsp = nvkm_fsp(subdev);
27*44f93b20SBen Skeggs 
28*44f93b20SBen Skeggs 	return fsp->func->wait_secure_boot(fsp);
29*44f93b20SBen Skeggs }
30*44f93b20SBen Skeggs 
31*44f93b20SBen Skeggs static void *
32*44f93b20SBen Skeggs nvkm_fsp_dtor(struct nvkm_subdev *subdev)
33*44f93b20SBen Skeggs {
34*44f93b20SBen Skeggs 	struct nvkm_fsp *fsp = nvkm_fsp(subdev);
35*44f93b20SBen Skeggs 
36*44f93b20SBen Skeggs 	nvkm_falcon_dtor(&fsp->falcon);
37*44f93b20SBen Skeggs 	return fsp;
38*44f93b20SBen Skeggs }
39*44f93b20SBen Skeggs 
40*44f93b20SBen Skeggs static const struct nvkm_falcon_func
41*44f93b20SBen Skeggs nvkm_fsp_flcn = {
42*44f93b20SBen Skeggs 	.emem_pio = &gp102_flcn_emem_pio,
43*44f93b20SBen Skeggs };
44*44f93b20SBen Skeggs 
45*44f93b20SBen Skeggs static const struct nvkm_subdev_func
46*44f93b20SBen Skeggs nvkm_fsp = {
47*44f93b20SBen Skeggs 	.dtor = nvkm_fsp_dtor,
48*44f93b20SBen Skeggs 	.preinit = nvkm_fsp_preinit,
49*44f93b20SBen Skeggs };
50*44f93b20SBen Skeggs 
51*44f93b20SBen Skeggs int
52*44f93b20SBen Skeggs nvkm_fsp_new_(const struct nvkm_fsp_func *func,
53*44f93b20SBen Skeggs 	      struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
54*44f93b20SBen Skeggs 	      struct nvkm_fsp **pfsp)
55*44f93b20SBen Skeggs {
56*44f93b20SBen Skeggs 	struct nvkm_fsp *fsp;
57*44f93b20SBen Skeggs 
58*44f93b20SBen Skeggs 	fsp = *pfsp = kzalloc(sizeof(*fsp), GFP_KERNEL);
59*44f93b20SBen Skeggs 	if (!fsp)
60*44f93b20SBen Skeggs 		return -ENOMEM;
61*44f93b20SBen Skeggs 
62*44f93b20SBen Skeggs 	fsp->func = func;
63*44f93b20SBen Skeggs 	nvkm_subdev_ctor(&nvkm_fsp, device, type, inst, &fsp->subdev);
64*44f93b20SBen Skeggs 
65*44f93b20SBen Skeggs 	return nvkm_falcon_ctor(&nvkm_fsp_flcn, &fsp->subdev, "fsp", 0x8f2000, &fsp->falcon);
66*44f93b20SBen Skeggs }
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