1 /* 2 * Copyright 2013 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "nv50.h" 25 26 #include <subdev/bios.h> 27 #include <subdev/bios/dcb.h> 28 #include <subdev/bios/disp.h> 29 #include <subdev/bios/init.h> 30 #include <subdev/bios/pll.h> 31 #include <subdev/clk/pll.h> 32 #include <subdev/ibus.h> 33 #include <subdev/vga.h> 34 35 int 36 nv50_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq) 37 { 38 struct nvkm_subdev *subdev = &init->subdev; 39 struct nvkm_device *device = subdev->device; 40 struct nvkm_bios *bios = device->bios; 41 struct nvbios_pll info; 42 int N1, M1, N2, M2, P; 43 int ret; 44 45 ret = nvbios_pll_parse(bios, type, &info); 46 if (ret) { 47 nvkm_error(subdev, "failed to retrieve pll data, %d\n", ret); 48 return ret; 49 } 50 51 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); 52 if (!ret) { 53 nvkm_error(subdev, "failed pll calculation\n"); 54 return ret; 55 } 56 57 switch (info.type) { 58 case PLL_VPLL0: 59 case PLL_VPLL1: 60 nvkm_wr32(device, info.reg + 0, 0x10000611); 61 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); 62 nvkm_mask(device, info.reg + 8, 0x7fff00ff, (P << 28) | 63 (M2 << 16) | N2); 64 break; 65 case PLL_MEMORY: 66 nvkm_mask(device, info.reg + 0, 0x01ff0000, 67 (P << 22) | 68 (info.bias_p << 19) | 69 (P << 16)); 70 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); 71 break; 72 default: 73 nvkm_mask(device, info.reg + 0, 0x00070000, (P << 16)); 74 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); 75 break; 76 } 77 78 return 0; 79 } 80 81 static u64 82 nv50_devinit_disable(struct nvkm_devinit *init) 83 { 84 struct nvkm_device *device = init->subdev.device; 85 u32 r001540 = nvkm_rd32(device, 0x001540); 86 u64 disable = 0ULL; 87 88 if (!(r001540 & 0x40000000)) 89 disable |= (1ULL << NVDEV_ENGINE_MPEG); 90 91 return disable; 92 } 93 94 void 95 nv50_devinit_preinit(struct nvkm_devinit *base) 96 { 97 struct nv50_devinit *init = nv50_devinit(base); 98 struct nvkm_subdev *subdev = &init->base.subdev; 99 struct nvkm_device *device = subdev->device; 100 struct nvkm_subdev *ibus = device->ibus; 101 102 /* our heuristics can't detect whether the board has had its 103 * devinit scripts executed or not if the display engine is 104 * missing, assume it's a secondary gpu which requires post 105 */ 106 if (!init->base.post) { 107 u64 disable = nvkm_devinit_disable(&init->base); 108 if (disable & (1ULL << NVDEV_ENGINE_DISP)) 109 init->base.post = true; 110 } 111 112 /* magic to detect whether or not x86 vbios code has executed 113 * the devinit scripts to initialise the board 114 */ 115 if (!init->base.post) { 116 if (!nvkm_rdvgac(device, 0, 0x00) && 117 !nvkm_rdvgac(device, 0, 0x1a)) { 118 nvkm_debug(subdev, "adaptor not initialised\n"); 119 init->base.post = true; 120 } 121 } 122 123 /* some boards appear to require certain init register timeouts 124 * to be bumped before runing devinit scripts. not a clue why 125 * the vbios engineers didn't make the scripts just work... 126 */ 127 if (init->base.post && ibus) 128 nvkm_object_init(&ibus->object); 129 } 130 131 void 132 nv50_devinit_init(struct nvkm_devinit *base) 133 { 134 struct nv50_devinit *init = nv50_devinit(base); 135 struct nvkm_subdev *subdev = &init->base.subdev; 136 struct nvkm_device *device = subdev->device; 137 struct nvkm_bios *bios = device->bios; 138 struct nvbios_outp info; 139 struct dcb_output outp; 140 u8 ver = 0xff, hdr, cnt, len; 141 int i = 0; 142 143 /* if we ran the init tables, we have to execute the first script 144 * pointer of each dcb entry's display encoder table in order 145 * to properly initialise each encoder. 146 */ 147 while (init->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) { 148 if (nvbios_outp_match(bios, outp.hasht, outp.hashm, 149 &ver, &hdr, &cnt, &len, &info)) { 150 struct nvbios_init exec = { 151 .subdev = subdev, 152 .bios = bios, 153 .offset = info.script[0], 154 .outp = &outp, 155 .crtc = -1, 156 .execute = 1, 157 }; 158 159 nvbios_exec(&exec); 160 } 161 i++; 162 } 163 } 164 165 int 166 nv50_devinit_new_(const struct nvkm_devinit_func *func, 167 struct nvkm_device *device, int index, 168 struct nvkm_devinit **pinit) 169 { 170 struct nv50_devinit *init; 171 172 if (!(init = kzalloc(sizeof(*init), GFP_KERNEL))) 173 return -ENOMEM; 174 *pinit = &init->base; 175 176 nvkm_devinit_ctor(func, device, index, &init->base); 177 return 0; 178 } 179 180 static const struct nvkm_devinit_func 181 nv50_devinit = { 182 .preinit = nv50_devinit_preinit, 183 .init = nv50_devinit_init, 184 .post = nv04_devinit_post, 185 .pll_set = nv50_devinit_pll_set, 186 .disable = nv50_devinit_disable, 187 }; 188 189 int 190 nv50_devinit_new(struct nvkm_device *device, int index, 191 struct nvkm_devinit **pinit) 192 { 193 return nv50_devinit_new_(&nv50_devinit, device, index, pinit); 194 } 195