xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c (revision ac35d19fe871c81b9d78053d675095b597270304)
1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 #include "nv50.h"
25 
26 #include <subdev/bios.h>
27 #include <subdev/bios/bit.h>
28 #include <subdev/bios/pmu.h>
29 #include <subdev/timer.h>
30 
31 static void
32 pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec)
33 {
34 	struct nvkm_device *device = init->base.subdev.device;
35 	struct nvkm_bios *bios = device->bios;
36 	int i;
37 
38 	nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu);
39 	for (i = 0; i < len; i += 4) {
40 		if ((i & 0xff) == 0)
41 			nvkm_wr32(device, 0x10a188, (pmu + i) >> 8);
42 		nvkm_wr32(device, 0x10a184, nvbios_rd32(bios, img + i));
43 	}
44 
45 	while (i & 0xff) {
46 		nvkm_wr32(device, 0x10a184, 0x00000000);
47 		i += 4;
48 	}
49 }
50 
51 static void
52 pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len)
53 {
54 	struct nvkm_device *device = init->base.subdev.device;
55 	struct nvkm_bios *bios = device->bios;
56 	int i;
57 
58 	nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu);
59 	for (i = 0; i < len; i += 4)
60 		nvkm_wr32(device, 0x10a1c4, nvbios_rd32(bios, img + i));
61 }
62 
63 static u32
64 pmu_args(struct nv50_devinit *init, u32 argp, u32 argi)
65 {
66 	struct nvkm_device *device = init->base.subdev.device;
67 	nvkm_wr32(device, 0x10a1c0, argp);
68 	nvkm_wr32(device, 0x10a1c0, nvkm_rd32(device, 0x10a1c4) + argi);
69 	return nvkm_rd32(device, 0x10a1c4);
70 }
71 
72 static void
73 pmu_exec(struct nv50_devinit *init, u32 init_addr)
74 {
75 	struct nvkm_device *device = init->base.subdev.device;
76 	nvkm_wr32(device, 0x10a104, init_addr);
77 	nvkm_wr32(device, 0x10a10c, 0x00000000);
78 	nvkm_wr32(device, 0x10a100, 0x00000002);
79 }
80 
81 static int
82 pmu_load(struct nv50_devinit *init, u8 type, bool post,
83 	 u32 *init_addr_pmu, u32 *args_addr_pmu)
84 {
85 	struct nvkm_subdev *subdev = &init->base.subdev;
86 	struct nvkm_bios *bios = subdev->device->bios;
87 	struct nvbios_pmuR pmu;
88 
89 	if (!nvbios_pmuRm(bios, type, &pmu))
90 		return -EINVAL;
91 
92 	if (!post)
93 		return 0;
94 
95 	pmu_code(init, pmu.boot_addr_pmu, pmu.boot_addr, pmu.boot_size, false);
96 	pmu_code(init, pmu.code_addr_pmu, pmu.code_addr, pmu.code_size, true);
97 	pmu_data(init, pmu.data_addr_pmu, pmu.data_addr, pmu.data_size);
98 
99 	if (init_addr_pmu) {
100 		*init_addr_pmu = pmu.init_addr_pmu;
101 		*args_addr_pmu = pmu.args_addr_pmu;
102 		return 0;
103 	}
104 
105 	return pmu_exec(init, pmu.init_addr_pmu), 0;
106 }
107 
108 void
109 gm200_devinit_preos(struct nv50_devinit *init, bool post)
110 {
111 	/* Optional: Execute PRE_OS application on PMU, which should at
112 	 * least take care of fans until a full PMU has been loaded.
113 	 */
114 	pmu_load(init, 0x01, post, NULL, NULL);
115 }
116 
117 int
118 gm200_devinit_post(struct nvkm_devinit *base, bool post)
119 {
120 	struct nv50_devinit *init = nv50_devinit(base);
121 	struct nvkm_subdev *subdev = &init->base.subdev;
122 	struct nvkm_device *device = subdev->device;
123 	struct nvkm_bios *bios = device->bios;
124 	struct bit_entry bit_I;
125 	u32 exec, args;
126 	int ret;
127 
128 	if (bit_entry(bios, 'I', &bit_I) || bit_I.version != 1 ||
129 					    bit_I.length < 0x1c) {
130 		nvkm_error(subdev, "VBIOS PMU init data not found\n");
131 		return -EINVAL;
132 	}
133 
134 	/* Upload DEVINIT application from VBIOS onto PMU. */
135 	ret = pmu_load(init, 0x04, post, &exec, &args);
136 	if (ret) {
137 		nvkm_error(subdev, "VBIOS PMU/DEVINIT not found\n");
138 		return ret;
139 	}
140 
141 	/* Upload tables required by opcodes in boot scripts. */
142 	if (post) {
143 		u32 pmu = pmu_args(init, args + 0x08, 0x08);
144 		u32 img = nvbios_rd16(bios, bit_I.offset + 0x14);
145 		u32 len = nvbios_rd16(bios, bit_I.offset + 0x16);
146 		pmu_data(init, pmu, img, len);
147 	}
148 
149 	/* Upload boot scripts. */
150 	if (post) {
151 		u32 pmu = pmu_args(init, args + 0x08, 0x10);
152 		u32 img = nvbios_rd16(bios, bit_I.offset + 0x18);
153 		u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a);
154 		pmu_data(init, pmu, img, len);
155 	}
156 
157 	/* Execute DEVINIT. */
158 	if (post) {
159 		nvkm_wr32(device, 0x10a040, 0x00005000);
160 		pmu_exec(init, exec);
161 		if (nvkm_msec(device, 2000,
162 			if (nvkm_rd32(device, 0x10a040) & 0x00002000)
163 				break;
164 		) < 0)
165 			return -ETIMEDOUT;
166 	}
167 
168 	gm200_devinit_preos(init, post);
169 	return 0;
170 }
171 
172 static const struct nvkm_devinit_func
173 gm200_devinit = {
174 	.preinit = gf100_devinit_preinit,
175 	.init = nv50_devinit_init,
176 	.post = gm200_devinit_post,
177 	.pll_set = gf100_devinit_pll_set,
178 	.disable = gm107_devinit_disable,
179 };
180 
181 int
182 gm200_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
183 		  struct nvkm_devinit **pinit)
184 {
185 	return nv50_devinit_new_(&gm200_devinit, device, type, inst, pinit);
186 }
187