xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/priv.h (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */
26625f55cSBen Skeggs #ifndef __NVKM_CLK_PRIV_H__
36625f55cSBen Skeggs #define __NVKM_CLK_PRIV_H__
46625f55cSBen Skeggs #define nvkm_clk(p) container_of((p), struct nvkm_clk, subdev)
56625f55cSBen Skeggs #include <subdev/clk.h>
66625f55cSBen Skeggs 
76625f55cSBen Skeggs struct nvkm_clk_func {
86625f55cSBen Skeggs 	int (*init)(struct nvkm_clk *);
96625f55cSBen Skeggs 	void (*fini)(struct nvkm_clk *);
106625f55cSBen Skeggs 	int (*read)(struct nvkm_clk *, enum nv_clk_src);
116625f55cSBen Skeggs 	int (*calc)(struct nvkm_clk *, struct nvkm_cstate *);
126625f55cSBen Skeggs 	int (*prog)(struct nvkm_clk *);
136625f55cSBen Skeggs 	void (*tidy)(struct nvkm_clk *);
146625f55cSBen Skeggs 	struct nvkm_pstate *pstates;
156625f55cSBen Skeggs 	int nr_pstates;
166625f55cSBen Skeggs 	struct nvkm_domain domains[];
176625f55cSBen Skeggs };
186625f55cSBen Skeggs 
19*98fd7f83SBen Skeggs int nvkm_clk_ctor(const struct nvkm_clk_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
206625f55cSBen Skeggs 		  bool allow_reclock, struct nvkm_clk *);
21*98fd7f83SBen Skeggs int nvkm_clk_new_(const struct nvkm_clk_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
226625f55cSBen Skeggs 		  bool allow_reclock, struct nvkm_clk **);
236625f55cSBen Skeggs 
246625f55cSBen Skeggs int nv04_clk_pll_calc(struct nvkm_clk *, struct nvbios_pll *, int clk,
256625f55cSBen Skeggs 		      struct nvkm_pll_vals *);
266625f55cSBen Skeggs int nv04_clk_pll_prog(struct nvkm_clk *, u32 reg1, struct nvkm_pll_vals *);
276625f55cSBen Skeggs #endif
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