1 /* 2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef __NVKM_CLK_GK20A_H__ 25 #define __NVKM_CLK_GK20A_H__ 26 27 #define GK20A_CLK_GPC_MDIV 1000 28 29 #define SYS_GPCPLL_CFG_BASE 0x00137000 30 31 /* All frequencies in Khz */ 32 struct gk20a_clk_pllg_params { 33 u32 min_vco, max_vco; 34 u32 min_u, max_u; 35 u32 min_m, max_m; 36 u32 min_n, max_n; 37 u32 min_pl, max_pl; 38 }; 39 40 struct gk20a_pll { 41 u32 m; 42 u32 n; 43 u32 pl; 44 }; 45 46 struct gk20a_clk { 47 struct nvkm_clk base; 48 const struct gk20a_clk_pllg_params *params; 49 struct gk20a_pll pll; 50 u32 parent_rate; 51 52 u32 (*div_to_pl)(u32); 53 u32 (*pl_to_div)(u32); 54 }; 55 #define gk20a_clk(p) container_of((p), struct gk20a_clk, base) 56 57 int _gk20a_clk_ctor(struct nvkm_device *, int, const struct nvkm_clk_func *, 58 const struct gk20a_clk_pllg_params *, struct gk20a_clk *); 59 void gk20a_clk_fini(struct nvkm_clk *); 60 int gk20a_clk_read(struct nvkm_clk *, enum nv_clk_src); 61 int gk20a_clk_calc(struct nvkm_clk *, struct nvkm_cstate *); 62 int gk20a_clk_prog(struct nvkm_clk *); 63 void gk20a_clk_tidy(struct nvkm_clk *); 64 65 #endif 66