xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include <subdev/bus.h>
25 
26 struct nvkm_hwsq {
27 	struct nvkm_bus *pbus;
28 	u32 addr;
29 	u32 data;
30 	struct {
31 		u8 data[512];
32 		u8 size;
33 	} c;
34 };
35 
36 static void
37 hwsq_cmd(struct nvkm_hwsq *hwsq, int size, u8 data[])
38 {
39 	memcpy(&hwsq->c.data[hwsq->c.size], data, size * sizeof(data[0]));
40 	hwsq->c.size += size;
41 }
42 
43 int
44 nvkm_hwsq_init(struct nvkm_bus *pbus, struct nvkm_hwsq **phwsq)
45 {
46 	struct nvkm_hwsq *hwsq;
47 
48 	hwsq = *phwsq = kmalloc(sizeof(*hwsq), GFP_KERNEL);
49 	if (hwsq) {
50 		hwsq->pbus = pbus;
51 		hwsq->addr = ~0;
52 		hwsq->data = ~0;
53 		memset(hwsq->c.data, 0x7f, sizeof(hwsq->c.data));
54 		hwsq->c.size = 0;
55 	}
56 
57 	return hwsq ? 0 : -ENOMEM;
58 }
59 
60 int
61 nvkm_hwsq_fini(struct nvkm_hwsq **phwsq, bool exec)
62 {
63 	struct nvkm_hwsq *hwsq = *phwsq;
64 	int ret = 0, i;
65 	if (hwsq) {
66 		struct nvkm_bus *pbus = hwsq->pbus;
67 		hwsq->c.size = (hwsq->c.size + 4) / 4;
68 		if (hwsq->c.size <= pbus->hwsq_size) {
69 			if (exec)
70 				ret = pbus->hwsq_exec(pbus, (u32 *)hwsq->c.data,
71 						      hwsq->c.size);
72 			if (ret)
73 				nv_error(pbus, "hwsq exec failed: %d\n", ret);
74 		} else {
75 			nv_error(pbus, "hwsq ucode too large\n");
76 			ret = -ENOSPC;
77 		}
78 
79 		for (i = 0; ret && i < hwsq->c.size; i++)
80 			nv_error(pbus, "\t0x%08x\n", ((u32 *)hwsq->c.data)[i]);
81 
82 		*phwsq = NULL;
83 		kfree(hwsq);
84 	}
85 	return ret;
86 }
87 
88 void
89 nvkm_hwsq_wr32(struct nvkm_hwsq *hwsq, u32 addr, u32 data)
90 {
91 	nv_debug(hwsq->pbus, "R[%06x] = 0x%08x\n", addr, data);
92 
93 	if (hwsq->data != data) {
94 		if ((data & 0xffff0000) != (hwsq->data & 0xffff0000)) {
95 			hwsq_cmd(hwsq, 5, (u8[]){ 0xe2, data, data >> 8,
96 						  data >> 16, data >> 24 });
97 		} else {
98 			hwsq_cmd(hwsq, 3, (u8[]){ 0x42, data, data >> 8 });
99 		}
100 	}
101 
102 	if ((addr & 0xffff0000) != (hwsq->addr & 0xffff0000)) {
103 		hwsq_cmd(hwsq, 5, (u8[]){ 0xe0, addr, addr >> 8,
104 					  addr >> 16, addr >> 24 });
105 	} else {
106 		hwsq_cmd(hwsq, 3, (u8[]){ 0x40, addr, addr >> 8 });
107 	}
108 
109 	hwsq->addr = addr;
110 	hwsq->data = data;
111 }
112 
113 void
114 nvkm_hwsq_setf(struct nvkm_hwsq *hwsq, u8 flag, int data)
115 {
116 	nv_debug(hwsq->pbus, " FLAG[%02x] = %d\n", flag, data);
117 	flag += 0x80;
118 	if (data >= 0)
119 		flag += 0x20;
120 	if (data >= 1)
121 		flag += 0x20;
122 	hwsq_cmd(hwsq, 1, (u8[]){ flag });
123 }
124 
125 void
126 nvkm_hwsq_wait(struct nvkm_hwsq *hwsq, u8 flag, u8 data)
127 {
128 	nv_debug(hwsq->pbus, " WAIT[%02x] = %d\n", flag, data);
129 	hwsq_cmd(hwsq, 3, (u8[]){ 0x5f, flag, data });
130 }
131 
132 void
133 nvkm_hwsq_nsec(struct nvkm_hwsq *hwsq, u32 nsec)
134 {
135 	u8 shift = 0, usec = nsec / 1000;
136 	while (usec & ~3) {
137 		usec >>= 2;
138 		shift++;
139 	}
140 
141 	nv_debug(hwsq->pbus, "    DELAY = %d ns\n", nsec);
142 	hwsq_cmd(hwsq, 1, (u8[]){ 0x00 | (shift << 2) | usec });
143 }
144