xref: /linux/drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.c (revision 58d416351e6df1a41d415958ccdd8eb9c2173fed)
1 /*
2  * Copyright 2012 Nouveau Community
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Martin Peres <martin.peres@labri.fr>
23  *          Ben Skeggs
24  */
25 #include "priv.h"
26 
27 static void
28 gf100_bus_intr(struct nvkm_bus *bus)
29 {
30 	struct nvkm_subdev *subdev = &bus->subdev;
31 	struct nvkm_device *device = subdev->device;
32 	u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
33 
34 	if (stat & 0x0000000e) {
35 		u32 addr = nvkm_rd32(device, 0x009084);
36 		u32 data = nvkm_rd32(device, 0x009088);
37 
38 		nvkm_error(subdev,
39 			   "MMIO %s of %08x FAULT at %06x [ %s%s%s]\n",
40 			   (addr & 0x00000002) ? "write" : "read", data,
41 			   (addr & 0x00fffffc),
42 			   (stat & 0x00000002) ? "!ENGINE " : "",
43 			   (stat & 0x00000004) ? "PRIVRING " : "",
44 			   (stat & 0x00000008) ? "TIMEOUT " : "");
45 
46 		nvkm_wr32(device, 0x009084, 0x00000000);
47 		nvkm_wr32(device, 0x001100, (stat & 0x0000000e));
48 		stat &= ~0x0000000e;
49 	}
50 
51 	if (stat) {
52 		nvkm_error(subdev, "intr %08x\n", stat);
53 		nvkm_mask(device, 0x001140, stat, 0x00000000);
54 	}
55 }
56 
57 static void
58 gf100_bus_init(struct nvkm_bus *bus)
59 {
60 	struct nvkm_device *device = bus->subdev.device;
61 	nvkm_wr32(device, 0x001100, 0xffffffff);
62 	nvkm_wr32(device, 0x001140, 0x0000000e);
63 }
64 
65 static const struct nvkm_bus_func
66 gf100_bus = {
67 	.init = gf100_bus_init,
68 	.intr = gf100_bus_intr,
69 };
70 
71 int
72 gf100_bus_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
73 	      struct nvkm_bus **pbus)
74 {
75 	return nvkm_bus_new_(&gf100_bus, device, type, inst, pbus);
76 }
77