1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */ 232932281SBen Skeggs #ifndef __NV50_BAR_H__ 332932281SBen Skeggs #define __NV50_BAR_H__ 432932281SBen Skeggs #define nv50_bar(p) container_of((p), struct nv50_bar, base) 532932281SBen Skeggs #include "priv.h" 632932281SBen Skeggs 732932281SBen Skeggs struct nv50_bar { 832932281SBen Skeggs struct nvkm_bar base; 932932281SBen Skeggs u32 pgd_addr; 1032932281SBen Skeggs struct nvkm_gpuobj *mem; 1132932281SBen Skeggs struct nvkm_gpuobj *pad; 1232932281SBen Skeggs struct nvkm_gpuobj *pgd; 13fc584e1aSBen Skeggs struct nvkm_vmm *bar1_vmm; 1432932281SBen Skeggs struct nvkm_gpuobj *bar1; 15fc584e1aSBen Skeggs struct nvkm_vmm *bar2_vmm; 16269fe32dSBen Skeggs struct nvkm_gpuobj *bar2; 1732932281SBen Skeggs }; 1832932281SBen Skeggs 19*917b24a3SBen Skeggs int nv50_bar_new_(const struct nvkm_bar_func *, struct nvkm_device *, enum nvkm_subdev_type, 2032932281SBen Skeggs int, u32 pgd_addr, struct nvkm_bar **); 2132932281SBen Skeggs void *nv50_bar_dtor(struct nvkm_bar *); 2232932281SBen Skeggs int nv50_bar_oneinit(struct nvkm_bar *); 23e69dae85SBen Skeggs void nv50_bar_init(struct nvkm_bar *); 247313cfa4SBen Skeggs void nv50_bar_bar1_init(struct nvkm_bar *); 257313cfa4SBen Skeggs void nv50_bar_bar1_wait(struct nvkm_bar *); 26570889dcSBen Skeggs struct nvkm_vmm *nv50_bar_bar1_vmm(struct nvkm_bar *); 2748fe0247SBen Skeggs void nv50_bar_bar2_init(struct nvkm_bar *); 28a78dbce9SBen Skeggs struct nvkm_vmm *nv50_bar_bar2_vmm(struct nvkm_bar *); 2932932281SBen Skeggs #endif 30