xref: /linux/drivers/gpu/drm/nouveau/nvkm/falcon/base.c (revision 9f2c9170934eace462499ba0bfe042cc72900173) 
1 /*
2  * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20  * DEALINGS IN THE SOFTWARE.
21  */
22 #include "priv.h"
23 
24 #include <subdev/mc.h>
25 #include <subdev/timer.h>
26 #include <subdev/top.h>
27 
28 static const struct nvkm_falcon_func_dma *
29 nvkm_falcon_dma(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)
30 {
31 	switch (*mem_type) {
32 	case IMEM: return falcon->func->imem_dma;
33 	case DMEM: return falcon->func->dmem_dma;
34 	default:
35 		return NULL;
36 	}
37 }
38 
39 int
40 nvkm_falcon_dma_wr(struct nvkm_falcon *falcon, const u8 *img, u64 dma_addr, u32 dma_base,
41 		   enum nvkm_falcon_mem mem_type, u32 mem_base, int len, bool sec)
42 {
43 	const struct nvkm_falcon_func_dma *dma = nvkm_falcon_dma(falcon, &mem_type, &mem_base);
44 	const char *type = nvkm_falcon_mem(mem_type);
45 	const int dmalen = 256;
46 	u32 dma_start = 0;
47 	u32 dst, src, cmd;
48 	int ret, i;
49 
50 	if (WARN_ON(!dma->xfer))
51 		return -EINVAL;
52 
53 	if (mem_type == DMEM) {
54 		dma_start = dma_base;
55 		dma_addr += dma_base;
56 	}
57 
58 	FLCN_DBG(falcon, "%s %08x <- %08x bytes at %08x (%010llx %08x)",
59 		 type, mem_base, len, dma_base, dma_addr - dma_base, dma_start);
60 	if (WARN_ON(!len || (len & (dmalen - 1))))
61 		return -EINVAL;
62 
63 	ret = dma->init(falcon, dma_addr, dmalen, mem_type, sec, &cmd);
64 	if (ret)
65 		return ret;
66 
67 	dst = mem_base;
68 	src = dma_base;
69 	if (len) {
70 		while (len >= dmalen) {
71 			dma->xfer(falcon, dst, src - dma_start, cmd);
72 
73 			if (img && nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
74 				for (i = 0; i < dmalen; i += 4, mem_base += 4) {
75 					const int w = 8, x = (i / 4) % w;
76 
77 					if (x == 0)
78 						printk(KERN_INFO "%s %08x <-", type, mem_base);
79 					printk(KERN_CONT " %08x", *(u32 *)(img + src + i));
80 					if (x == (w - 1) || ((i + 4) == dmalen))
81 						printk(KERN_CONT " <- %08x+%08x", dma_base,
82 						       src + i - dma_base - (x * 4));
83 					if (i == (7 * 4))
84 						printk(KERN_CONT " *");
85 				}
86 			}
87 
88 			if (nvkm_msec(falcon->owner->device, 2000,
89 				if (dma->done(falcon))
90 					break;
91 			) < 0)
92 				return -ETIMEDOUT;
93 
94 			src += dmalen;
95 			dst += dmalen;
96 			len -= dmalen;
97 		}
98 		WARN_ON(len);
99 	}
100 
101 	return 0;
102 }
103 
104 static const struct nvkm_falcon_func_pio *
105 nvkm_falcon_pio(struct nvkm_falcon *falcon, enum nvkm_falcon_mem *mem_type, u32 *mem_base)
106 {
107 	switch (*mem_type) {
108 	case IMEM:
109 		return falcon->func->imem_pio;
110 	case DMEM:
111 		if (!falcon->func->emem_addr || *mem_base < falcon->func->emem_addr)
112 			return falcon->func->dmem_pio;
113 
114 		*mem_base -= falcon->func->emem_addr;
115 		fallthrough;
116 	case EMEM:
117 		return falcon->func->emem_pio;
118 	default:
119 		return NULL;
120 	}
121 }
122 
123 int
124 nvkm_falcon_pio_rd(struct nvkm_falcon *falcon, u8 port, enum nvkm_falcon_mem mem_type, u32 mem_base,
125 		   const u8 *img, u32 img_base, int len)
126 {
127 	const struct nvkm_falcon_func_pio *pio = nvkm_falcon_pio(falcon, &mem_type, &mem_base);
128 	const char *type = nvkm_falcon_mem(mem_type);
129 	int xfer_len;
130 
131 	if (WARN_ON(!pio || !pio->rd))
132 		return -EINVAL;
133 
134 	FLCN_DBG(falcon, "%s %08x -> %08x bytes at %08x", type, mem_base, len, img_base);
135 	if (WARN_ON(!len || (len & (pio->min - 1))))
136 		return -EINVAL;
137 
138 	pio->rd_init(falcon, port, mem_base);
139 	do {
140 		xfer_len = min(len, pio->max);
141 		pio->rd(falcon, port, img, xfer_len);
142 
143 		if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
144 			for (img_base = 0; img_base < xfer_len; img_base += 4, mem_base += 4) {
145 				if (((img_base / 4) % 8) == 0)
146 					printk(KERN_INFO "%s %08x ->", type, mem_base);
147 				printk(KERN_CONT " %08x", *(u32 *)(img + img_base));
148 			}
149 		}
150 
151 		img += xfer_len;
152 		len -= xfer_len;
153 	} while (len);
154 
155 	return 0;
156 }
157 
158 int
159 nvkm_falcon_pio_wr(struct nvkm_falcon *falcon, const u8 *img, u32 img_base, u8 port,
160 		   enum nvkm_falcon_mem mem_type, u32 mem_base, int len, u16 tag, bool sec)
161 {
162 	const struct nvkm_falcon_func_pio *pio = nvkm_falcon_pio(falcon, &mem_type, &mem_base);
163 	const char *type = nvkm_falcon_mem(mem_type);
164 	int xfer_len;
165 
166 	if (WARN_ON(!pio || !pio->wr))
167 		return -EINVAL;
168 
169 	FLCN_DBG(falcon, "%s %08x <- %08x bytes at %08x", type, mem_base, len, img_base);
170 	if (WARN_ON(!len || (len & (pio->min - 1))))
171 		return -EINVAL;
172 
173 	pio->wr_init(falcon, port, sec, mem_base);
174 	do {
175 		xfer_len = min(len, pio->max);
176 		pio->wr(falcon, port, img, xfer_len, tag++);
177 
178 		if (nvkm_printk_ok(falcon->owner, falcon->user, NV_DBG_TRACE)) {
179 			for (img_base = 0; img_base < xfer_len; img_base += 4, mem_base += 4) {
180 				if (((img_base / 4) % 8) == 0)
181 					printk(KERN_INFO "%s %08x <-", type, mem_base);
182 				printk(KERN_CONT " %08x", *(u32 *)(img + img_base));
183 				if ((img_base / 4) == 7 && mem_type == IMEM)
184 					printk(KERN_CONT " %04x", tag - 1);
185 			}
186 		}
187 
188 		img += xfer_len;
189 		len -= xfer_len;
190 	} while (len);
191 
192 	return 0;
193 }
194 
195 void
196 nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start,
197 		      u32 size, u16 tag, u8 port, bool secure)
198 {
199 	if (secure && !falcon->secret) {
200 		nvkm_warn(falcon->user,
201 			  "writing with secure tag on a non-secure falcon!\n");
202 		return;
203 	}
204 
205 	falcon->func->load_imem(falcon, data, start, size, tag, port,
206 				secure);
207 }
208 
209 void
210 nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start,
211 		      u32 size, u8 port)
212 {
213 	mutex_lock(&falcon->dmem_mutex);
214 
215 	falcon->func->load_dmem(falcon, data, start, size, port);
216 
217 	mutex_unlock(&falcon->dmem_mutex);
218 }
219 
220 void
221 nvkm_falcon_start(struct nvkm_falcon *falcon)
222 {
223 	falcon->func->start(falcon);
224 }
225 
226 int
227 nvkm_falcon_reset(struct nvkm_falcon *falcon)
228 {
229 	int ret;
230 
231 	ret = falcon->func->disable(falcon);
232 	if (WARN_ON(ret))
233 		return ret;
234 
235 	return nvkm_falcon_enable(falcon);
236 }
237 
238 static int
239 nvkm_falcon_oneinit(struct nvkm_falcon *falcon)
240 {
241 	const struct nvkm_falcon_func *func = falcon->func;
242 	const struct nvkm_subdev *subdev = falcon->owner;
243 	u32 reg;
244 
245 	if (!falcon->addr) {
246 		falcon->addr = nvkm_top_addr(subdev->device, subdev->type, subdev->inst);
247 		if (WARN_ON(!falcon->addr))
248 			return -ENODEV;
249 	}
250 
251 	reg = nvkm_falcon_rd32(falcon, 0x12c);
252 	falcon->version = reg & 0xf;
253 	falcon->secret = (reg >> 4) & 0x3;
254 	falcon->code.ports = (reg >> 8) & 0xf;
255 	falcon->data.ports = (reg >> 12) & 0xf;
256 
257 	reg = nvkm_falcon_rd32(falcon, 0x108);
258 	falcon->code.limit = (reg & 0x1ff) << 8;
259 	falcon->data.limit = (reg & 0x3fe00) >> 1;
260 
261 	if (func->debug) {
262 		u32 val = nvkm_falcon_rd32(falcon, func->debug);
263 		falcon->debug = (val >> 20) & 0x1;
264 	}
265 
266 	return 0;
267 }
268 
269 void
270 nvkm_falcon_put(struct nvkm_falcon *falcon, struct nvkm_subdev *user)
271 {
272 	if (unlikely(!falcon))
273 		return;
274 
275 	mutex_lock(&falcon->mutex);
276 	if (falcon->user == user) {
277 		nvkm_debug(falcon->user, "released %s falcon\n", falcon->name);
278 		falcon->user = NULL;
279 	}
280 	mutex_unlock(&falcon->mutex);
281 }
282 
283 int
284 nvkm_falcon_get(struct nvkm_falcon *falcon, struct nvkm_subdev *user)
285 {
286 	int ret = 0;
287 
288 	mutex_lock(&falcon->mutex);
289 	if (falcon->user) {
290 		nvkm_error(user, "%s falcon already acquired by %s!\n",
291 			   falcon->name, falcon->user->name);
292 		mutex_unlock(&falcon->mutex);
293 		return -EBUSY;
294 	}
295 
296 	nvkm_debug(user, "acquired %s falcon\n", falcon->name);
297 	if (!falcon->oneinit)
298 		ret = nvkm_falcon_oneinit(falcon);
299 	falcon->user = user;
300 	mutex_unlock(&falcon->mutex);
301 	return ret;
302 }
303 
304 void
305 nvkm_falcon_dtor(struct nvkm_falcon *falcon)
306 {
307 }
308 
309 int
310 nvkm_falcon_ctor(const struct nvkm_falcon_func *func,
311 		 struct nvkm_subdev *subdev, const char *name, u32 addr,
312 		 struct nvkm_falcon *falcon)
313 {
314 	falcon->func = func;
315 	falcon->owner = subdev;
316 	falcon->name = name;
317 	falcon->addr = addr;
318 	falcon->addr2 = func->addr2;
319 	mutex_init(&falcon->mutex);
320 	mutex_init(&falcon->dmem_mutex);
321 	return 0;
322 }
323