xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.h (revision d0034a7a4ac7fae708146ac0059b9c47a1543f0d)
1b7019ac5SIlia Mirkin /* SPDX-License-Identifier: MIT */
2b8bf04e1SBen Skeggs #ifndef __NV20_GR_H__
3b8bf04e1SBen Skeggs #define __NV20_GR_H__
427f3d6cfSBen Skeggs #define nv20_gr(p) container_of((p), struct nv20_gr, base)
527f3d6cfSBen Skeggs #include "priv.h"
6b8bf04e1SBen Skeggs 
7bfee3f3dSBen Skeggs struct nv20_gr {
8e3c71eb2SBen Skeggs 	struct nvkm_gr base;
9227c95d9SBen Skeggs 	struct nvkm_memory *ctxtab;
10b8bf04e1SBen Skeggs };
11b8bf04e1SBen Skeggs 
12*864d37c3SBen Skeggs int nv20_gr_new_(const struct nvkm_gr_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
13*864d37c3SBen Skeggs 		 struct nvkm_gr **);
14c85ee6caSBen Skeggs void *nv20_gr_dtor(struct nvkm_gr *);
15c85ee6caSBen Skeggs int nv20_gr_oneinit(struct nvkm_gr *);
16c85ee6caSBen Skeggs int nv20_gr_init(struct nvkm_gr *);
17c85ee6caSBen Skeggs void nv20_gr_intr(struct nvkm_gr *);
18c85ee6caSBen Skeggs void nv20_gr_tile(struct nvkm_gr *, int, struct nvkm_fb_tile *);
19c85ee6caSBen Skeggs 
20c85ee6caSBen Skeggs int nv30_gr_init(struct nvkm_gr *);
21c85ee6caSBen Skeggs 
2227f3d6cfSBen Skeggs #define nv20_gr_chan(p) container_of((p), struct nv20_gr_chan, object)
234246b92cSBen Skeggs #include <core/object.h>
2427f3d6cfSBen Skeggs 
25b8bf04e1SBen Skeggs struct nv20_gr_chan {
2627f3d6cfSBen Skeggs 	struct nvkm_object object;
2727f3d6cfSBen Skeggs 	struct nv20_gr *gr;
28b8bf04e1SBen Skeggs 	int chid;
2927f3d6cfSBen Skeggs 	struct nvkm_memory *inst;
30b8bf04e1SBen Skeggs };
31b8bf04e1SBen Skeggs 
3227f3d6cfSBen Skeggs void *nv20_gr_chan_dtor(struct nvkm_object *);
3327f3d6cfSBen Skeggs int nv20_gr_chan_init(struct nvkm_object *);
3427f3d6cfSBen Skeggs int nv20_gr_chan_fini(struct nvkm_object *, bool);
35b8bf04e1SBen Skeggs #endif
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