xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.c (revision c411ed854584a71b0e86ac3019b60e4789d88086)
1 /*
2  * Copyright 2017 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "gf100.h"
25 #include "ctxgf100.h"
26 
27 #include <nvif/class.h>
28 
29 static const struct gf100_gr_func
30 gp107_gr = {
31 	.init = gp100_gr_init,
32 	.init_gpc_mmu = gm200_gr_init_gpc_mmu,
33 	.init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
34 	.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
35 	.init_swdx_pes_mask = gp102_gr_init_swdx_pes_mask,
36 	.init_num_active_ltcs = gp100_gr_init_num_active_ltcs,
37 	.rops = gm200_gr_rops,
38 	.ppc_nr = 1,
39 	.grctx = &gp107_grctx,
40 	.sclass = {
41 		{ -1, -1, FERMI_TWOD_A },
42 		{ -1, -1, KEPLER_INLINE_TO_MEMORY_B },
43 		{ -1, -1, PASCAL_B, &gf100_fermi },
44 		{ -1, -1, PASCAL_COMPUTE_B },
45 		{}
46 	}
47 };
48 
49 int
50 gp107_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
51 {
52 	return gm200_gr_new_(&gp107_gr, device, index, pgr);
53 }
54