xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 /*
2  * Copyright 2013 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "gf100.h"
25 #include "ctxgf100.h"
26 
27 #include <nvif/class.h>
28 
29 /*******************************************************************************
30  * PGRAPH register lists
31  ******************************************************************************/
32 
33 static const struct gf100_gr_init
34 gf110_gr_init_sm_0[] = {
35 	{ 0x419e00,   1, 0x04, 0x00000000 },
36 	{ 0x419ea0,   1, 0x04, 0x00000000 },
37 	{ 0x419ea4,   1, 0x04, 0x00000100 },
38 	{ 0x419ea8,   1, 0x04, 0x00001100 },
39 	{ 0x419eac,   1, 0x04, 0x11100f02 },
40 	{ 0x419eb0,   1, 0x04, 0x00000003 },
41 	{ 0x419eb4,   4, 0x04, 0x00000000 },
42 	{ 0x419ec8,   1, 0x04, 0x06060618 },
43 	{ 0x419ed0,   1, 0x04, 0x0eff0e38 },
44 	{ 0x419ed4,   1, 0x04, 0x011104f1 },
45 	{ 0x419edc,   1, 0x04, 0x00000000 },
46 	{ 0x419f00,   1, 0x04, 0x00000000 },
47 	{ 0x419f2c,   1, 0x04, 0x00000000 },
48 	{}
49 };
50 
51 static const struct gf100_gr_pack
52 gf110_gr_pack_mmio[] = {
53 	{ gf100_gr_init_main_0 },
54 	{ gf100_gr_init_fe_0 },
55 	{ gf100_gr_init_pri_0 },
56 	{ gf100_gr_init_rstr2d_0 },
57 	{ gf100_gr_init_pd_0 },
58 	{ gf100_gr_init_ds_0 },
59 	{ gf100_gr_init_scc_0 },
60 	{ gf100_gr_init_prop_0 },
61 	{ gf100_gr_init_gpc_unk_0 },
62 	{ gf100_gr_init_setup_0 },
63 	{ gf100_gr_init_crstr_0 },
64 	{ gf108_gr_init_setup_1 },
65 	{ gf100_gr_init_zcull_0 },
66 	{ gf100_gr_init_gpm_0 },
67 	{ gf100_gr_init_gpc_unk_1 },
68 	{ gf100_gr_init_gcc_0 },
69 	{ gf100_gr_init_tpccs_0 },
70 	{ gf100_gr_init_tex_0 },
71 	{ gf100_gr_init_pe_0 },
72 	{ gf100_gr_init_l1c_0 },
73 	{ gf100_gr_init_wwdx_0 },
74 	{ gf100_gr_init_tpccs_1 },
75 	{ gf100_gr_init_mpc_0 },
76 	{ gf110_gr_init_sm_0 },
77 	{ gf100_gr_init_be_0 },
78 	{ gf100_gr_init_fe_1 },
79 	{ gf100_gr_init_pe_1 },
80 	{}
81 };
82 
83 /*******************************************************************************
84  * PGRAPH engine/subdev functions
85  ******************************************************************************/
86 
87 static const struct gf100_gr_func
88 gf110_gr = {
89 	.oneinit_tiles = gf100_gr_oneinit_tiles,
90 	.oneinit_sm_id = gf100_gr_oneinit_sm_id,
91 	.init = gf100_gr_init,
92 	.init_gpc_mmu = gf100_gr_init_gpc_mmu,
93 	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,
94 	.init_zcull = gf100_gr_init_zcull,
95 	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
96 	.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
97 	.init_40601c = gf100_gr_init_40601c,
98 	.init_419cc0 = gf100_gr_init_419cc0,
99 	.init_419eb4 = gf100_gr_init_419eb4,
100 	.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
101 	.init_shader_exceptions = gf100_gr_init_shader_exceptions,
102 	.init_rop_exceptions = gf100_gr_init_rop_exceptions,
103 	.init_exception2 = gf100_gr_init_exception2,
104 	.init_400054 = gf100_gr_init_400054,
105 	.trap_mp = gf100_gr_trap_mp,
106 	.mmio = gf110_gr_pack_mmio,
107 	.fecs.ucode = &gf100_gr_fecs_ucode,
108 	.fecs.reset = gf100_gr_fecs_reset,
109 	.gpccs.ucode = &gf100_gr_gpccs_ucode,
110 	.rops = gf100_gr_rops,
111 	.grctx = &gf110_grctx,
112 	.zbc = &gf100_gr_zbc,
113 	.sclass = {
114 		{ -1, -1, FERMI_TWOD_A },
115 		{ -1, -1, FERMI_MEMORY_TO_MEMORY_FORMAT_A },
116 		{ -1, -1, FERMI_A, &gf100_fermi },
117 		{ -1, -1, FERMI_B, &gf100_fermi },
118 		{ -1, -1, FERMI_C, &gf100_fermi },
119 		{ -1, -1, FERMI_COMPUTE_A },
120 		{ -1, -1, FERMI_COMPUTE_B },
121 		{}
122 	}
123 };
124 
125 static const struct gf100_gr_fwif
126 gf110_gr_fwif[] = {
127 	{ -1, gf100_gr_load, &gf110_gr },
128 	{ -1, gf100_gr_nofw, &gf110_gr },
129 	{}
130 };
131 
132 int
133 gf110_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
134 {
135 	return gf100_gr_new_(gf110_gr_fwif, device, type, inst, pgr);
136 }
137