xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1 /*
2  * Copyright 2015 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs <bskeggs@redhat.com>
23  */
24 #include "priv.h"
25 
26 #include <engine/fifo.h>
27 
28 u32
29 nvkm_gr_ctxsw_inst(struct nvkm_device *device)
30 {
31 	struct nvkm_gr *gr = device->gr;
32 	if (gr && gr->func->ctxsw.inst)
33 		return gr->func->ctxsw.inst(gr);
34 	return 0;
35 }
36 
37 int
38 nvkm_gr_ctxsw_resume(struct nvkm_device *device)
39 {
40 	struct nvkm_gr *gr = device->gr;
41 	if (gr && gr->func->ctxsw.resume)
42 		return gr->func->ctxsw.resume(gr);
43 	return 0;
44 }
45 
46 int
47 nvkm_gr_ctxsw_pause(struct nvkm_device *device)
48 {
49 	struct nvkm_gr *gr = device->gr;
50 	if (gr && gr->func->ctxsw.pause)
51 		return gr->func->ctxsw.pause(gr);
52 	return 0;
53 }
54 
55 static bool
56 nvkm_gr_chsw_load(struct nvkm_engine *engine)
57 {
58 	struct nvkm_gr *gr = nvkm_gr(engine);
59 	if (gr->func->chsw_load)
60 		return gr->func->chsw_load(gr);
61 	return false;
62 }
63 
64 static void
65 nvkm_gr_tile(struct nvkm_engine *engine, int region, struct nvkm_fb_tile *tile)
66 {
67 	struct nvkm_gr *gr = nvkm_gr(engine);
68 	if (gr->func->tile)
69 		gr->func->tile(gr, region, tile);
70 }
71 
72 u64
73 nvkm_gr_units(struct nvkm_gr *gr)
74 {
75 	if (gr->func->units)
76 		return gr->func->units(gr);
77 	return 0;
78 }
79 
80 int
81 nvkm_gr_tlb_flush(struct nvkm_gr *gr)
82 {
83 	if (gr->func->tlb_flush)
84 		return gr->func->tlb_flush(gr);
85 	return -ENODEV;
86 }
87 
88 static int
89 nvkm_gr_oclass_get(struct nvkm_oclass *oclass, int index)
90 {
91 	struct nvkm_gr *gr = nvkm_gr(oclass->engine);
92 	int c = 0;
93 
94 	if (gr->func->object_get) {
95 		int ret = gr->func->object_get(gr, index, &oclass->base);
96 		if (oclass->base.oclass)
97 			return index;
98 		return ret;
99 	}
100 
101 	while (gr->func->sclass[c].oclass) {
102 		if (c++ == index) {
103 			oclass->base = gr->func->sclass[index];
104 			return index;
105 		}
106 	}
107 
108 	return c;
109 }
110 
111 static int
112 nvkm_gr_cclass_new(struct nvkm_chan *chan, const struct nvkm_oclass *oclass,
113 		   struct nvkm_object **pobject)
114 {
115 	struct nvkm_gr *gr = nvkm_gr(oclass->engine);
116 	if (gr->func->chan_new)
117 		return gr->func->chan_new(gr, chan, oclass, pobject);
118 	return 0;
119 }
120 
121 static void
122 nvkm_gr_intr(struct nvkm_engine *engine)
123 {
124 	struct nvkm_gr *gr = nvkm_gr(engine);
125 	gr->func->intr(gr);
126 }
127 
128 static int
129 nvkm_gr_nonstall(struct nvkm_engine *engine)
130 {
131 	struct nvkm_gr *gr = nvkm_gr(engine);
132 
133 	if (gr->func->nonstall)
134 		return gr->func->nonstall(gr);
135 
136 	return -EINVAL;
137 }
138 
139 static int
140 nvkm_gr_oneinit(struct nvkm_engine *engine)
141 {
142 	struct nvkm_gr *gr = nvkm_gr(engine);
143 	if (gr->func->oneinit)
144 		return gr->func->oneinit(gr);
145 	return 0;
146 }
147 
148 static int
149 nvkm_gr_reset(struct nvkm_engine *engine)
150 {
151 	struct nvkm_gr *gr = nvkm_gr(engine);
152 
153 	if (gr->func->reset)
154 		return gr->func->reset(gr);
155 
156 	return -ENOSYS;
157 }
158 
159 static int
160 nvkm_gr_init(struct nvkm_engine *engine)
161 {
162 	struct nvkm_gr *gr = nvkm_gr(engine);
163 
164 	if (gr->func->init)
165 		return gr->func->init(gr);
166 
167 	return 0;
168 }
169 
170 static int
171 nvkm_gr_fini(struct nvkm_engine *engine, bool suspend)
172 {
173 	struct nvkm_gr *gr = nvkm_gr(engine);
174 	if (gr->func->fini)
175 		return gr->func->fini(gr, suspend);
176 	return 0;
177 }
178 
179 static void *
180 nvkm_gr_dtor(struct nvkm_engine *engine)
181 {
182 	struct nvkm_gr *gr = nvkm_gr(engine);
183 	if (gr->func->dtor)
184 		return gr->func->dtor(gr);
185 	return gr;
186 }
187 
188 static const struct nvkm_engine_func
189 nvkm_gr = {
190 	.dtor = nvkm_gr_dtor,
191 	.oneinit = nvkm_gr_oneinit,
192 	.init = nvkm_gr_init,
193 	.fini = nvkm_gr_fini,
194 	.reset = nvkm_gr_reset,
195 	.nonstall = nvkm_gr_nonstall,
196 	.intr = nvkm_gr_intr,
197 	.tile = nvkm_gr_tile,
198 	.chsw_load = nvkm_gr_chsw_load,
199 	.fifo.cclass = nvkm_gr_cclass_new,
200 	.fifo.sclass = nvkm_gr_oclass_get,
201 };
202 
203 int
204 nvkm_gr_ctor(const struct nvkm_gr_func *func, struct nvkm_device *device,
205 	     enum nvkm_subdev_type type, int inst, bool enable, struct nvkm_gr *gr)
206 {
207 	gr->func = func;
208 	return nvkm_engine_ctor(&nvkm_gr, device, type, inst, enable, &gr->engine);
209 }
210