1 /* 2 * Copyright 2016 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "runl.h" 25 #include "gk104.h" 26 #include "changk104.h" 27 28 #include <subdev/fault.h> 29 30 #include <nvif/class.h> 31 32 static const struct nvkm_runl_func 33 gp100_runl = { 34 }; 35 36 const struct nvkm_enum 37 gp100_fifo_fault_engine[] = { 38 { 0x01, "DISPLAY" }, 39 { 0x03, "IFB", NULL, NVKM_ENGINE_IFB }, 40 { 0x04, "BAR1", NULL, NVKM_SUBDEV_BAR }, 41 { 0x05, "BAR2", NULL, NVKM_SUBDEV_INSTMEM }, 42 { 0x06, "HOST0", NULL, NVKM_ENGINE_FIFO }, 43 { 0x07, "HOST1", NULL, NVKM_ENGINE_FIFO }, 44 { 0x08, "HOST2", NULL, NVKM_ENGINE_FIFO }, 45 { 0x09, "HOST3", NULL, NVKM_ENGINE_FIFO }, 46 { 0x0a, "HOST4", NULL, NVKM_ENGINE_FIFO }, 47 { 0x0b, "HOST5", NULL, NVKM_ENGINE_FIFO }, 48 { 0x0c, "HOST6", NULL, NVKM_ENGINE_FIFO }, 49 { 0x0d, "HOST7", NULL, NVKM_ENGINE_FIFO }, 50 { 0x0e, "HOST8", NULL, NVKM_ENGINE_FIFO }, 51 { 0x0f, "HOST9", NULL, NVKM_ENGINE_FIFO }, 52 { 0x10, "HOST10", NULL, NVKM_ENGINE_FIFO }, 53 { 0x13, "PERF" }, 54 { 0x17, "PMU" }, 55 { 0x18, "PTP" }, 56 { 0x1f, "PHYSICAL" }, 57 {} 58 }; 59 60 static const struct nvkm_fifo_func_mmu_fault 61 gp100_fifo_mmu_fault = { 62 .recover = gk104_fifo_fault, 63 }; 64 65 void 66 gp100_fifo_intr_mmu_fault_unit(struct nvkm_fifo *fifo, int unit) 67 { 68 struct nvkm_device *device = fifo->engine.subdev.device; 69 u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10)); 70 u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10)); 71 u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10)); 72 u32 type = nvkm_rd32(device, 0x00280c + (unit * 0x10)); 73 struct nvkm_fault_data info; 74 75 info.inst = (u64)inst << 12; 76 info.addr = ((u64)vahi << 32) | valo; 77 info.time = 0; 78 info.engine = unit; 79 info.valid = 1; 80 info.gpc = (type & 0x1f000000) >> 24; 81 info.hub = (type & 0x00100000) >> 20; 82 info.access = (type & 0x00070000) >> 16; 83 info.client = (type & 0x00007f00) >> 8; 84 info.reason = (type & 0x0000001f); 85 86 nvkm_fifo_fault(fifo, &info); 87 } 88 89 static const struct nvkm_fifo_func 90 gp100_fifo = { 91 .dtor = gk104_fifo_dtor, 92 .oneinit = gk104_fifo_oneinit, 93 .chid_nr = gm200_fifo_chid_nr, 94 .chid_ctor = gk110_fifo_chid_ctor, 95 .runq_nr = gm200_fifo_runq_nr, 96 .runl_ctor = gk104_fifo_runl_ctor, 97 .init = gk104_fifo_init, 98 .init_pbdmas = gk104_fifo_init_pbdmas, 99 .fini = gk104_fifo_fini, 100 .intr = gk104_fifo_intr, 101 .intr_mmu_fault_unit = gp100_fifo_intr_mmu_fault_unit, 102 .mmu_fault = &gp100_fifo_mmu_fault, 103 .fault.access = gk104_fifo_fault_access, 104 .fault.engine = gp100_fifo_fault_engine, 105 .fault.reason = gk104_fifo_fault_reason, 106 .fault.hubclient = gk104_fifo_fault_hubclient, 107 .fault.gpcclient = gk104_fifo_fault_gpcclient, 108 .engine_id = gk104_fifo_engine_id, 109 .recover_chan = gk104_fifo_recover_chan, 110 .runlist = &gm107_fifo_runlist, 111 .pbdma = &gm200_fifo_pbdma, 112 .nonstall = &gf100_fifo_nonstall, 113 .runl = &gp100_runl, 114 .runq = &gk208_runq, 115 .engn = &gk104_engn, 116 .engn_ce = &gk104_engn_ce, 117 .cgrp = {{ 0, 0, KEPLER_CHANNEL_GROUP_A }, &gk110_cgrp, .force = true }, 118 .chan = {{ 0, 0, PASCAL_CHANNEL_GPFIFO_A }, &gm107_chan, .ctor = &gk104_fifo_gpfifo_new }, 119 }; 120 121 int 122 gp100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, 123 struct nvkm_fifo **pfifo) 124 { 125 return gk104_fifo_new_(&gp100_fifo, device, type, inst, 0, pfifo); 126 } 127