xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1c39f472eSBen Skeggs /*
2c39f472eSBen Skeggs  * Copyright 2012 Red Hat Inc.
3c39f472eSBen Skeggs  *
4c39f472eSBen Skeggs  * Permission is hereby granted, free of charge, to any person obtaining a
5c39f472eSBen Skeggs  * copy of this software and associated documentation files (the "Software"),
6c39f472eSBen Skeggs  * to deal in the Software without restriction, including without limitation
7c39f472eSBen Skeggs  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c39f472eSBen Skeggs  * and/or sell copies of the Software, and to permit persons to whom the
9c39f472eSBen Skeggs  * Software is furnished to do so, subject to the following conditions:
10c39f472eSBen Skeggs  *
11c39f472eSBen Skeggs  * The above copyright notice and this permission notice shall be included in
12c39f472eSBen Skeggs  * all copies or substantial portions of the Software.
13c39f472eSBen Skeggs  *
14c39f472eSBen Skeggs  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15c39f472eSBen Skeggs  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16c39f472eSBen Skeggs  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17c39f472eSBen Skeggs  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18c39f472eSBen Skeggs  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19c39f472eSBen Skeggs  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20c39f472eSBen Skeggs  * OTHER DEALINGS IN THE SOFTWARE.
21c39f472eSBen Skeggs  *
22c39f472eSBen Skeggs  * Authors: Ben Skeggs
23c39f472eSBen Skeggs  */
24c39f472eSBen Skeggs #include "priv.h"
25a1c93078SBen Skeggs #include "head.h"
26c39f472eSBen Skeggs 
27168c0299SBen Skeggs #include <nvif/class.h>
28168c0299SBen Skeggs 
2970aa8670SBen Skeggs static void
nv04_head_vblank_put(struct nvkm_head * head)30*acbe9ecfSBen Skeggs nv04_head_vblank_put(struct nvkm_head *head)
31*acbe9ecfSBen Skeggs {
32*acbe9ecfSBen Skeggs 	struct nvkm_device *device = head->disp->engine.subdev.device;
33*acbe9ecfSBen Skeggs 	nvkm_wr32(device, 0x600140 + (head->id * 0x2000) , 0x00000000);
34*acbe9ecfSBen Skeggs }
35*acbe9ecfSBen Skeggs 
36*acbe9ecfSBen Skeggs static void
nv04_head_vblank_get(struct nvkm_head * head)37*acbe9ecfSBen Skeggs nv04_head_vblank_get(struct nvkm_head *head)
38*acbe9ecfSBen Skeggs {
39*acbe9ecfSBen Skeggs 	struct nvkm_device *device = head->disp->engine.subdev.device;
40*acbe9ecfSBen Skeggs 	nvkm_wr32(device, 0x600140 + (head->id * 0x2000) , 0x00000001);
41*acbe9ecfSBen Skeggs }
42*acbe9ecfSBen Skeggs 
43*acbe9ecfSBen Skeggs static void
nv04_head_rgpos(struct nvkm_head * head,u16 * hline,u16 * vline)44*acbe9ecfSBen Skeggs nv04_head_rgpos(struct nvkm_head *head, u16 *hline, u16 *vline)
45*acbe9ecfSBen Skeggs {
46*acbe9ecfSBen Skeggs 	struct nvkm_device *device = head->disp->engine.subdev.device;
47*acbe9ecfSBen Skeggs 	u32 data = nvkm_rd32(device, 0x600868 + (head->id * 0x2000));
48*acbe9ecfSBen Skeggs 	*hline = (data & 0xffff0000) >> 16;
49*acbe9ecfSBen Skeggs 	*vline = (data & 0x0000ffff);
50*acbe9ecfSBen Skeggs }
51*acbe9ecfSBen Skeggs 
52*acbe9ecfSBen Skeggs static void
nv04_head_state(struct nvkm_head * head,struct nvkm_head_state * state)53*acbe9ecfSBen Skeggs nv04_head_state(struct nvkm_head *head, struct nvkm_head_state *state)
54*acbe9ecfSBen Skeggs {
55*acbe9ecfSBen Skeggs 	struct nvkm_device *device = head->disp->engine.subdev.device;
56*acbe9ecfSBen Skeggs 	const u32 hoff = head->id * 0x0200;
57*acbe9ecfSBen Skeggs 	state->vblanks = nvkm_rd32(device, 0x680800 + hoff) & 0x0000ffff;
58*acbe9ecfSBen Skeggs 	state->vtotal  = nvkm_rd32(device, 0x680804 + hoff) & 0x0000ffff;
59*acbe9ecfSBen Skeggs 	state->vblanke = state->vtotal - 1;
60*acbe9ecfSBen Skeggs 	state->hblanks = nvkm_rd32(device, 0x680820 + hoff) & 0x0000ffff;
61*acbe9ecfSBen Skeggs 	state->htotal  = nvkm_rd32(device, 0x680824 + hoff) & 0x0000ffff;
62*acbe9ecfSBen Skeggs 	state->hblanke = state->htotal - 1;
63*acbe9ecfSBen Skeggs }
64*acbe9ecfSBen Skeggs 
65*acbe9ecfSBen Skeggs static const struct nvkm_head_func
66*acbe9ecfSBen Skeggs nv04_head = {
67*acbe9ecfSBen Skeggs 	.state = nv04_head_state,
68*acbe9ecfSBen Skeggs 	.rgpos = nv04_head_rgpos,
69*acbe9ecfSBen Skeggs 	.vblank_get = nv04_head_vblank_get,
70*acbe9ecfSBen Skeggs 	.vblank_put = nv04_head_vblank_put,
71*acbe9ecfSBen Skeggs };
72*acbe9ecfSBen Skeggs 
73*acbe9ecfSBen Skeggs static int
nv04_head_new(struct nvkm_disp * disp,int id)74*acbe9ecfSBen Skeggs nv04_head_new(struct nvkm_disp *disp, int id)
75*acbe9ecfSBen Skeggs {
76*acbe9ecfSBen Skeggs 	return nvkm_head_new_(&nv04_head, disp, id);
77*acbe9ecfSBen Skeggs }
78*acbe9ecfSBen Skeggs 
79*acbe9ecfSBen Skeggs static void
nv04_disp_intr(struct nvkm_disp * disp)8070aa8670SBen Skeggs nv04_disp_intr(struct nvkm_disp *disp)
81c39f472eSBen Skeggs {
8270aa8670SBen Skeggs 	struct nvkm_subdev *subdev = &disp->engine.subdev;
8370aa8670SBen Skeggs 	struct nvkm_device *device = subdev->device;
842fde1f1cSBen Skeggs 	u32 crtc0 = nvkm_rd32(device, 0x600100);
852fde1f1cSBen Skeggs 	u32 crtc1 = nvkm_rd32(device, 0x602100);
86c39f472eSBen Skeggs 	u32 pvideo;
87c39f472eSBen Skeggs 
88c39f472eSBen Skeggs 	if (crtc0 & 0x00000001) {
89fd166a18SBen Skeggs 		nvkm_disp_vblank(disp, 0);
902fde1f1cSBen Skeggs 		nvkm_wr32(device, 0x600100, 0x00000001);
91c39f472eSBen Skeggs 	}
92c39f472eSBen Skeggs 
93c39f472eSBen Skeggs 	if (crtc1 & 0x00000001) {
94fd166a18SBen Skeggs 		nvkm_disp_vblank(disp, 1);
952fde1f1cSBen Skeggs 		nvkm_wr32(device, 0x602100, 0x00000001);
96c39f472eSBen Skeggs 	}
97c39f472eSBen Skeggs 
9870aa8670SBen Skeggs 	if (device->chipset >= 0x10 && device->chipset <= 0x40) {
992fde1f1cSBen Skeggs 		pvideo = nvkm_rd32(device, 0x8100);
100c39f472eSBen Skeggs 		if (pvideo & ~0x11)
10184407824SBen Skeggs 			nvkm_info(subdev, "PVIDEO intr: %08x\n", pvideo);
1022fde1f1cSBen Skeggs 		nvkm_wr32(device, 0x8100, pvideo);
103c39f472eSBen Skeggs 	}
104c39f472eSBen Skeggs }
105c39f472eSBen Skeggs 
1060ce41e3cSBen Skeggs static const struct nvkm_disp_func
1070ce41e3cSBen Skeggs nv04_disp = {
10870aa8670SBen Skeggs 	.intr = nv04_disp_intr,
109168c0299SBen Skeggs 	.root = { 0, 0, NV04_DISP },
110168c0299SBen Skeggs 	.user = { {} },
1110ce41e3cSBen Skeggs };
1120ce41e3cSBen Skeggs 
11370aa8670SBen Skeggs int
nv04_disp_new(struct nvkm_device * device,enum nvkm_subdev_type type,int inst,struct nvkm_disp ** pdisp)114a7f000ecSBen Skeggs nv04_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
115a7f000ecSBen Skeggs 	      struct nvkm_disp **pdisp)
116c39f472eSBen Skeggs {
117a1c93078SBen Skeggs 	int ret, i;
118a1c93078SBen Skeggs 
119a7f000ecSBen Skeggs 	ret = nvkm_disp_new_(&nv04_disp, device, type, inst, pdisp);
120a1c93078SBen Skeggs 	if (ret)
121a1c93078SBen Skeggs 		return ret;
122a1c93078SBen Skeggs 
123a1c93078SBen Skeggs 	for (i = 0; i < 2; i++) {
124a1c93078SBen Skeggs 		ret = nv04_head_new(*pdisp, i);
125a1c93078SBen Skeggs 		if (ret)
126a1c93078SBen Skeggs 			return ret;
127a1c93078SBen Skeggs 	}
128a1c93078SBen Skeggs 
129a1c93078SBen Skeggs 	return 0;
130c39f472eSBen Skeggs }
131