xref: /linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c (revision 2274ce7e368174f7711a16a389fa256b1c89ce46)
1 /*
2  * Copyright 2017 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 #include "priv.h"
23 #include "chan.h"
24 #include "head.h"
25 #include "ior.h"
26 
27 #include <nvif/class.h>
28 
29 static const struct nvkm_ior_func_dp
30 mcp89_sor_dp = {
31 	.lanes = { 3, 2, 1, 0 },
32 	.links = g94_sor_dp_links,
33 	.power = g94_sor_dp_power,
34 	.pattern = g94_sor_dp_pattern,
35 	.drive = g94_sor_dp_drive,
36 	.audio = gt215_sor_dp_audio,
37 	.audio_sym = g94_sor_dp_audio_sym,
38 	.activesym = g94_sor_dp_activesym,
39 	.watermark = g94_sor_dp_watermark,
40 };
41 
42 static const struct nvkm_ior_func
43 mcp89_sor = {
44 	.state = g94_sor_state,
45 	.power = nv50_sor_power,
46 	.clock = nv50_sor_clock,
47 	.bl = &gt215_sor_bl,
48 	.hdmi = &gt215_sor_hdmi,
49 	.dp = &mcp89_sor_dp,
50 	.hda = &gt215_sor_hda,
51 };
52 
53 static int
54 mcp89_sor_new(struct nvkm_disp *disp, int id)
55 {
56 	return nvkm_ior_new_(&mcp89_sor, disp, SOR, id, true);
57 }
58 
59 static const struct nvkm_disp_func
60 mcp89_disp = {
61 	.oneinit = nv50_disp_oneinit,
62 	.init = nv50_disp_init,
63 	.fini = nv50_disp_fini,
64 	.intr = nv50_disp_intr,
65 	.super = nv50_disp_super,
66 	.uevent = &nv50_disp_chan_uevent,
67 	.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
68 	.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
69 	.sor = { .cnt = g94_sor_cnt, .new = mcp89_sor_new },
70 	.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
71 	.root = { 0,0,GT214_DISP },
72 	.user = {
73 		{{0,0,GT214_DISP_CURSOR             }, nvkm_disp_chan_new, &nv50_disp_curs },
74 		{{0,0,GT214_DISP_OVERLAY            }, nvkm_disp_chan_new, &nv50_disp_oimm },
75 		{{0,0,GT214_DISP_BASE_CHANNEL_DMA   }, nvkm_disp_chan_new, & g84_disp_base },
76 		{{0,0,GT214_DISP_CORE_CHANNEL_DMA   }, nvkm_disp_core_new, & g94_disp_core },
77 		{{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly },
78 		{}
79 	},
80 };
81 
82 int
83 mcp89_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
84 	       struct nvkm_disp **pdisp)
85 {
86 	return nvkm_disp_new_(&mcp89_disp, device, type, inst, pdisp);
87 }
88