1 /* 2 * Copyright 2015 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include "priv.h" 25 #include <core/enum.h> 26 27 #include <nvif/class.h> 28 29 static const struct nvkm_enum 30 gp100_ce_launcherr_report[] = { 31 { 0x0, "NO_ERR" }, 32 { 0x1, "2D_LAYER_EXCEEDS_DEPTH" }, 33 { 0x2, "INVALID_ALIGNMENT" }, 34 { 0x3, "MEM2MEM_RECT_OUT_OF_BOUNDS" }, 35 { 0x4, "SRC_LINE_EXCEEDS_PITCH" }, 36 { 0x5, "SRC_LINE_EXCEEDS_NEG_PITCH" }, 37 { 0x6, "DST_LINE_EXCEEDS_PITCH" }, 38 { 0x7, "DST_LINE_EXCEEDS_NEG_PITCH" }, 39 { 0x8, "BAD_SRC_PIXEL_COMP_REF" }, 40 { 0x9, "INVALID_VALUE" }, 41 { 0xa, "UNUSED_FIELD" }, 42 { 0xb, "INVALID_OPERATION" }, 43 { 0xc, "NO_RESOURCES" }, 44 { 0xd, "INVALID_CONFIG" }, 45 {} 46 }; 47 48 static void 49 gp100_ce_intr_launcherr(struct nvkm_engine *ce, const u32 base) 50 { 51 struct nvkm_subdev *subdev = &ce->subdev; 52 struct nvkm_device *device = subdev->device; 53 u32 stat = nvkm_rd32(device, 0x104418 + base); 54 const struct nvkm_enum *en = 55 nvkm_enum_find(gp100_ce_launcherr_report, stat & 0x0000000f); 56 nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : ""); 57 } 58 59 void 60 gp100_ce_intr(struct nvkm_engine *ce) 61 { 62 const u32 base = (ce->subdev.index - NVKM_ENGINE_CE0) * 0x80; 63 struct nvkm_subdev *subdev = &ce->subdev; 64 struct nvkm_device *device = subdev->device; 65 u32 mask = nvkm_rd32(device, 0x10440c + base); 66 u32 intr = nvkm_rd32(device, 0x104410 + base) & mask; 67 if (intr & 0x00000001) { //XXX: guess 68 nvkm_warn(subdev, "BLOCKPIPE\n"); 69 nvkm_wr32(device, 0x104410 + base, 0x00000001); 70 intr &= ~0x00000001; 71 } 72 if (intr & 0x00000002) { //XXX: guess 73 nvkm_warn(subdev, "NONBLOCKPIPE\n"); 74 nvkm_wr32(device, 0x104410 + base, 0x00000002); 75 intr &= ~0x00000002; 76 } 77 if (intr & 0x00000004) { 78 gp100_ce_intr_launcherr(ce, base); 79 nvkm_wr32(device, 0x104410 + base, 0x00000004); 80 intr &= ~0x00000004; 81 } 82 if (intr) { 83 nvkm_warn(subdev, "intr %08x\n", intr); 84 nvkm_wr32(device, 0x104410 + base, intr); 85 } 86 } 87 88 static const struct nvkm_engine_func 89 gp100_ce = { 90 .intr = gp100_ce_intr, 91 .sclass = { 92 { -1, -1, PASCAL_DMA_COPY_A }, 93 {} 94 } 95 }; 96 97 int 98 gp100_ce_new(struct nvkm_device *device, int index, 99 struct nvkm_engine **pengine) 100 { 101 return nvkm_engine_new_(&gp100_ce, device, index, true, pengine); 102 } 103