1 /* 2 * Copyright 2012 Red Hat Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: Ben Skeggs 23 */ 24 #include <engine/ce.h> 25 #include <engine/falcon.h> 26 #include "fuc/gf100.fuc3.h" 27 28 /******************************************************************************* 29 * Copy object classes 30 ******************************************************************************/ 31 32 static struct nvkm_oclass 33 gf100_ce0_sclass[] = { 34 { 0x90b5, &nvkm_object_ofuncs }, 35 {}, 36 }; 37 38 static struct nvkm_oclass 39 gf100_ce1_sclass[] = { 40 { 0x90b8, &nvkm_object_ofuncs }, 41 {}, 42 }; 43 44 /******************************************************************************* 45 * PCE context 46 ******************************************************************************/ 47 48 static struct nvkm_ofuncs 49 gf100_ce_context_ofuncs = { 50 .ctor = _nvkm_falcon_context_ctor, 51 .dtor = _nvkm_falcon_context_dtor, 52 .init = _nvkm_falcon_context_init, 53 .fini = _nvkm_falcon_context_fini, 54 .rd32 = _nvkm_falcon_context_rd32, 55 .wr32 = _nvkm_falcon_context_wr32, 56 }; 57 58 static struct nvkm_oclass 59 gf100_ce0_cclass = { 60 .handle = NV_ENGCTX(CE0, 0xc0), 61 .ofuncs = &gf100_ce_context_ofuncs, 62 }; 63 64 static struct nvkm_oclass 65 gf100_ce1_cclass = { 66 .handle = NV_ENGCTX(CE1, 0xc0), 67 .ofuncs = &gf100_ce_context_ofuncs, 68 }; 69 70 /******************************************************************************* 71 * PCE engine/subdev functions 72 ******************************************************************************/ 73 74 static int 75 gf100_ce_init(struct nvkm_object *object) 76 { 77 struct nvkm_falcon *ce = (void *)object; 78 int ret; 79 80 ret = nvkm_falcon_init(ce); 81 if (ret) 82 return ret; 83 84 nv_wo32(ce, 0x084, nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0); 85 return 0; 86 } 87 88 static int 89 gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 90 struct nvkm_oclass *oclass, void *data, u32 size, 91 struct nvkm_object **pobject) 92 { 93 struct nvkm_falcon *ce; 94 int ret; 95 96 ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, true, 97 "PCE0", "ce0", &ce); 98 *pobject = nv_object(ce); 99 if (ret) 100 return ret; 101 102 nv_subdev(ce)->unit = 0x00000040; 103 nv_subdev(ce)->intr = gt215_ce_intr; 104 nv_engine(ce)->cclass = &gf100_ce0_cclass; 105 nv_engine(ce)->sclass = gf100_ce0_sclass; 106 nv_falcon(ce)->code.data = gf100_ce_code; 107 nv_falcon(ce)->code.size = sizeof(gf100_ce_code); 108 nv_falcon(ce)->data.data = gf100_ce_data; 109 nv_falcon(ce)->data.size = sizeof(gf100_ce_data); 110 return 0; 111 } 112 113 static int 114 gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, 115 struct nvkm_oclass *oclass, void *data, u32 size, 116 struct nvkm_object **pobject) 117 { 118 struct nvkm_falcon *ce; 119 int ret; 120 121 ret = nvkm_falcon_create(parent, engine, oclass, 0x105000, true, 122 "PCE1", "ce1", &ce); 123 *pobject = nv_object(ce); 124 if (ret) 125 return ret; 126 127 nv_subdev(ce)->unit = 0x00000080; 128 nv_subdev(ce)->intr = gt215_ce_intr; 129 nv_engine(ce)->cclass = &gf100_ce1_cclass; 130 nv_engine(ce)->sclass = gf100_ce1_sclass; 131 nv_falcon(ce)->code.data = gf100_ce_code; 132 nv_falcon(ce)->code.size = sizeof(gf100_ce_code); 133 nv_falcon(ce)->data.data = gf100_ce_data; 134 nv_falcon(ce)->data.size = sizeof(gf100_ce_data); 135 return 0; 136 } 137 138 struct nvkm_oclass 139 gf100_ce0_oclass = { 140 .handle = NV_ENGINE(CE0, 0xc0), 141 .ofuncs = &(struct nvkm_ofuncs) { 142 .ctor = gf100_ce0_ctor, 143 .dtor = _nvkm_falcon_dtor, 144 .init = gf100_ce_init, 145 .fini = _nvkm_falcon_fini, 146 .rd32 = _nvkm_falcon_rd32, 147 .wr32 = _nvkm_falcon_wr32, 148 }, 149 }; 150 151 struct nvkm_oclass 152 gf100_ce1_oclass = { 153 .handle = NV_ENGINE(CE1, 0xc0), 154 .ofuncs = &(struct nvkm_ofuncs) { 155 .ctor = gf100_ce1_ctor, 156 .dtor = _nvkm_falcon_dtor, 157 .init = gf100_ce_init, 158 .fini = _nvkm_falcon_fini, 159 .rd32 = _nvkm_falcon_rd32, 160 .wr32 = _nvkm_falcon_wr32, 161 }, 162 }; 163